| /NextBSD/sys/x86/iommu/ |
| HD | intel_ctx.c | 74 static void dmar_unref_domain_locked(struct dmar_unit *dmar,
79 dmar_ensure_ctx_page(struct dmar_unit *dmar, int bus) in dmar_ensure_ctx_page() argument
88 ctxm = dmar_pgalloc(dmar->ctx_obj, 1 + bus, DMAR_PGF_NOALLOC); in dmar_ensure_ctx_page()
99 ctxm = dmar_pgalloc(dmar->ctx_obj, 1 + bus, DMAR_PGF_ZERO | in dmar_ensure_ctx_page()
101 re = dmar_map_pgtbl(dmar->ctx_obj, 0, DMAR_PGF_NOALLOC, &sf); in dmar_ensure_ctx_page()
105 dmar_flush_root_to_ram(dmar, re); in dmar_ensure_ctx_page()
115 ctxp = dmar_map_pgtbl(ctx->domain->dmar->ctx_obj, 1 + in dmar_map_ctx_entry()
147 unit = domain->dmar; in ctx_id_entry_init()
180 dmar_flush_for_ctx_entry(struct dmar_unit *dmar, bool force) in dmar_flush_for_ctx_entry() argument
189 if ((dmar->hw_cap & DMAR_CAP_CM) == 0 && !force) in dmar_flush_for_ctx_entry()
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| HD | intel_utils.c | 124 sagaw = DMAR_CAP_SAGAW(domain->dmar->hw_cap); in domain_set_agaw()
133 device_printf(domain->dmar->dev, in domain_set_agaw()
202 cap_sps = DMAR_CAP_SPS(domain->dmar->hw_cap); in domain_is_sp_lvl()
578 dmar_barrier_enter(struct dmar_unit *dmar, u_int barrier_id) in dmar_barrier_enter() argument
582 DMAR_LOCK(dmar); in dmar_barrier_enter()
583 if ((dmar->barrier_flags & f_done) != 0) { in dmar_barrier_enter()
584 DMAR_UNLOCK(dmar); in dmar_barrier_enter()
588 if ((dmar->barrier_flags & f_inproc) != 0) { in dmar_barrier_enter()
589 while ((dmar->barrier_flags & f_inproc) != 0) { in dmar_barrier_enter()
590 dmar->barrier_flags |= f_wakeup; in dmar_barrier_enter()
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| HD | intel_dmar.h | 105 struct dmar_unit *dmar; /* (c) */ member
241 #define DMAR_LOCK(dmar) mtx_lock(&(dmar)->lock) argument
242 #define DMAR_UNLOCK(dmar) mtx_unlock(&(dmar)->lock) argument
243 #define DMAR_ASSERT_LOCKED(dmar) mtx_assert(&(dmar)->lock, MA_OWNED) argument
245 #define DMAR_FAULT_LOCK(dmar) mtx_lock_spin(&(dmar)->fault_lock) argument
246 #define DMAR_FAULT_UNLOCK(dmar) mtx_unlock_spin(&(dmar)->fault_lock) argument
247 #define DMAR_FAULT_ASSERT_LOCKED(dmar) mtx_assert(&(dmar)->fault_lock, MA_OWNED) argument
249 #define DMAR_IS_COHERENT(dmar) (((dmar)->hw_ecap & DMAR_ECAP_C) != 0) argument
250 #define DMAR_HAS_QI(dmar) (((dmar)->hw_ecap & DMAR_ECAP_QI) != 0) argument
251 #define DMAR_X2APIC(dmar) \ argument
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| HD | intel_quirks.c | 87 dmar_match_quirks(struct dmar_unit *dmar, in dmar_match_quirks() argument
110 device_printf(dmar->dev, in dmar_match_quirks()
114 nb_quirk->quirk(dmar, nb); in dmar_match_quirks()
118 device_printf(dmar->dev, "cannot find northbridge\n"); in dmar_match_quirks()
137 device_printf(dmar->dev, in dmar_match_quirks()
141 cpu_quirk->quirk(dmar); in dmar_match_quirks()
221 dmar_quirks_pre_use(struct dmar_unit *dmar) in dmar_quirks_pre_use() argument
224 if (!dmar_barrier_enter(dmar, DMAR_BARRIER_USEQ)) in dmar_quirks_pre_use()
226 DMAR_LOCK(dmar); in dmar_quirks_pre_use()
227 dmar_match_quirks(dmar, pre_use_nb, nitems(pre_use_nb), in dmar_quirks_pre_use()
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| HD | busdma_dmar.c | 209 dmar_instantiate_ctx(struct dmar_unit *dmar, device_t dev, bool rmrr) in dmar_instantiate_ctx() argument
228 ctx = dmar_get_ctx_for_dev(dmar, requester, rid, disabled, rmrr); in dmar_instantiate_ctx()
236 DMAR_LOCK(dmar); in dmar_instantiate_ctx()
239 DMAR_UNLOCK(dmar); in dmar_instantiate_ctx()
241 dmar_free_ctx_locked(dmar, ctx); in dmar_instantiate_ctx()
251 struct dmar_unit *dmar; in dmar_get_dma_tag() local
255 dmar = dmar_find(child); in dmar_get_dma_tag()
257 if (dmar == NULL) in dmar_get_dma_tag()
259 if (!dmar->dma_enabled) in dmar_get_dma_tag()
261 dmar_quirks_pre_use(dmar); in dmar_get_dma_tag()
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| HD | intel_drv.c | 582 DRIVER_MODULE(dmar, acpi, dmar_driver, dmar_devclass, 0, 0);
583 MODULE_DEPEND(dmar, acpi, 1, 1, 1);
931 struct dmar_unit *dmar; member
976 if (resmem->Segment != iria->dmar->segment) in dmar_inst_rmrr_iter()
979 printf("dmar%d: RMRR [%jx,%jx]\n", iria->dmar->unit, in dmar_inst_rmrr_iter()
995 dmar_print_path(iria->dmar->dev, "RMRR scope", in dmar_inst_rmrr_iter()
1009 if (dev_dmar != iria->dmar) { in dmar_inst_rmrr_iter()
1018 dmar_instantiate_ctx(iria->dmar, dev, true); in dmar_inst_rmrr_iter()
1029 dmar_instantiate_rmrr_ctxs(struct dmar_unit *dmar) in dmar_instantiate_rmrr_ctxs() argument
1034 if (!dmar_barrier_enter(dmar, DMAR_BARRIER_RMRR)) in dmar_instantiate_rmrr_ctxs()
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| HD | intel_idpgtbl.c | 194 dmar_pglvl_supported(domain->dmar, tbl->pglvl) && in domain_get_idmap_pgtbl()
213 dmar_pglvl_supported(domain->dmar, tbl->pglvl) && in domain_get_idmap_pgtbl()
254 unit = domain->dmar; in domain_get_idmap_pgtbl()
408 dmar_flush_pte_to_ram(domain->dmar, ptep); in domain_pgtbl_map_pte()
489 dmar_flush_pte_to_ram(domain->dmar, pte); in domain_map_buf_locked()
505 unit = domain->dmar; in domain_map_buf()
582 dmar_flush_pte_to_ram(domain->dmar, pte); in domain_unmap_clear_pte()
704 DMAR_LOCK(domain->dmar); in domain_alloc_pgtbl()
706 DMAR_UNLOCK(domain->dmar); in domain_alloc_pgtbl()
718 KASSERT((domain->dmar->hw_ecap & DMAR_ECAP_PT) != 0 && in domain_free_pgtbl()
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| HD | intel_qi.c | 223 unit = domain->dmar; in dmar_qi_invalidate_locked()
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| /NextBSD/sys/amd64/vmm/intel/ |
| HD | vtd.c | 247 ACPI_TABLE_DMAR *dmar; in vtd_init() local
271 status = AcpiGetTable(ACPI_SIG_DMAR, 0, (ACPI_TABLE_HEADER **)&dmar); in vtd_init()
275 end = (char *)dmar + dmar->Header.Length; in vtd_init()
276 remaining = dmar->Header.Length - sizeof(ACPI_TABLE_DMAR); in vtd_init()
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| /NextBSD/usr.sbin/acpi/acpidump/ |
| HD | acpi.c | 967 ACPI_TABLE_DMAR *dmar; in acpi_handle_dmar() local
971 dmar = (ACPI_TABLE_DMAR *)sdp; in acpi_handle_dmar()
972 printf("\tHost Address Width=%d\n", dmar->Width + 1); in acpi_handle_dmar()
977 PRINTFLAG(dmar->Flags, INTR_REMAP); in acpi_handle_dmar()
978 PRINTFLAG(dmar->Flags, X2APIC_OPT_OUT); in acpi_handle_dmar()
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