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Searched refs:cmdr (Results 1 – 6 of 6) sorted by relevance

/NextBSD/sys/arm/amlogic/aml8726/
HDaml8726_mmc.c223 uint32_t cmdr; in aml8726_mmc_start_command() local
246 cmdr = AML_MMC_CMD_START_BIT | AML_MMC_CMD_TRANS_BIT_HOST | cmd->opcode; in aml8726_mmc_start_command()
260 cmdr |= AML_MMC_CMD_RESP_CRC7_FROM_8; in aml8726_mmc_start_command()
261 cmdr |= (133 << AML_MMC_CMD_RESP_BITS_SHIFT); in aml8726_mmc_start_command()
263 cmdr |= (45 << AML_MMC_CMD_RESP_BITS_SHIFT); in aml8726_mmc_start_command()
266 cmdr |= AML_MMC_CMD_RESP_NO_CRC7; in aml8726_mmc_start_command()
269 cmdr |= AML_MMC_CMD_CHECK_DAT0_BUSY; in aml8726_mmc_start_command()
283 cmdr |= (((data->len / block_size) - 1) << in aml8726_mmc_start_command()
313 cmdr |= AML_MMC_CMD_RESP_HAS_DATA; in aml8726_mmc_start_command()
319 cmdr |= AML_MMC_CMD_CMD_HAS_DATA; in aml8726_mmc_start_command()
[all …]
/NextBSD/sys/arm/at91/
HDat91_mci.c610 uint32_t cmdr, mr; in at91_mci_start_cmd() local
621 cmdr = cmd->opcode; in at91_mci_start_cmd()
624 cmdr |= MCI_CMDR_OPDCMD; in at91_mci_start_cmd()
629 cmdr |= MCI_CMDR_RSPTYP_NO; in at91_mci_start_cmd()
631 cmdr |= MCI_CMDR_MAXLAT; in at91_mci_start_cmd()
633 cmdr |= MCI_CMDR_RSPTYP_136; in at91_mci_start_cmd()
635 cmdr |= MCI_CMDR_RSPTYP_48; in at91_mci_start_cmd()
659 cmdr |= MCI_CMDR_TRCMD_STOP; in at91_mci_start_cmd()
669 cmdr, cmd->opcode, cmd->arg); in at91_mci_start_cmd()
672 WR4(sc, MCI_CMDR, cmdr); in at91_mci_start_cmd()
[all …]
/NextBSD/sys/dev/mmc/host/
HDdwmmc.c876 uint32_t cmdr; in dwmmc_start_cmd() local
889 cmdr = cmd->opcode; in dwmmc_start_cmd()
896 cmdr |= SDMMC_CMD_STOP_ABORT; in dwmmc_start_cmd()
898 cmdr |= SDMMC_CMD_WAIT_PRVDATA; in dwmmc_start_cmd()
902 cmdr |= SDMMC_CMD_RESP_EXP; in dwmmc_start_cmd()
904 cmdr |= SDMMC_CMD_RESP_LONG; in dwmmc_start_cmd()
908 cmdr |= SDMMC_CMD_RESP_CRC; in dwmmc_start_cmd()
913 cmdr |= SDMMC_CMD_USE_HOLD_REG; in dwmmc_start_cmd()
917 cmdr |= SDMMC_CMD_SEND_INIT; in dwmmc_start_cmd()
924 cmdr |= SDMMC_CMD_SEND_ASTOP; in dwmmc_start_cmd()
[all …]
/NextBSD/sys/dev/hifn/
HDhifn7751var.h92 struct hifn_desc cmdr[HIFN_D_CMD_RSIZE+1]; member
114 #define HIFN_CMDR_SYNC(sc, i, f) HIFN_RING_SYNC((sc), cmdr, (i), (f))
HDhifn7751.c1137 offsetof(struct hifn_dma, cmdr[0])); in hifn_init_pci_registers()
1348 dma->cmdr[HIFN_D_CMD_RSIZE].l = htole32(HIFN_D_VALID | in hifn_alloc_slot()
1416 dma->cmdr[cmdi].l = htole32(16 | masks); in hifn_writeramaddr()
1476 dma->cmdr[cmdi].l = htole32(8 | masks); in hifn_readramaddr()
1522 dma->cmdr[i].p = htole32(sc->sc_dma_physaddr + in hifn_init_dma()
1528 dma->cmdr[HIFN_D_CMD_RSIZE].p = in hifn_init_dma()
1529 htole32(sc->sc_dma_physaddr + offsetof(struct hifn_dma, cmdr[0])); in hifn_init_dma()
2001 dma->cmdr[HIFN_D_CMD_RSIZE].l = htole32(HIFN_D_VALID | in hifn_crypto()
2011 dma->cmdr[cmdi].l = htole32(cmdlen | HIFN_D_VALID | HIFN_D_LAST | in hifn_crypto()
2279 if (dma->cmdr[i].l & htole32(HIFN_D_VALID)) { in hifn_intr()
/NextBSD/sys/dev/mn/
HDif_mn.c97 u_int8_t cmdr, mode, rah1, rah2, ral1, ral2; member
939 sc->f54w->cmdr = 0x51; in f54_init()