| /NextBSD/usr.sbin/nandsim/ |
| HD | nandsim_cfgparse.c | 388 create_chips(struct rcfile *f, struct sim_chip **chips, int *cnt) in create_chips() argument 448 *chips = chipsptr; in create_chips() 453 destroy_chips(struct sim_chip *chips) in destroy_chips() argument 456 free(chips); in destroy_chips() 465 struct sim_chip *chips; in parse_config() local 489 if (create_chips(f, &chips, &chipsectionscnt) != 0) { in parse_config() 498 destroy_chips(chips); in parse_config() 502 if (validate_chips(chips, chipsectionscnt, ctrls, in parse_config() 505 destroy_chips(chips); in parse_config() 516 destroy_chips(chips); in parse_config() [all …]
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| /NextBSD/sys/dev/nand/ |
| HD | nandsim.c | 244 if (ctrls[chip->ctrl_num].chips[chip->num]) { in nandsim_create_chip() 255 ctrls[chip->ctrl_num].chips[chip->num] = sim_chip; in nandsim_create_chip() 275 if (!ctrl_conf->created || !ctrl_conf->chips[chip->chip_num]) in nandsim_destroy_chip() 281 free(ctrl_conf->chips[chip->chip_num], M_NANDSIM); in nandsim_destroy_chip() 282 ctrl_conf->chips[chip->chip_num] = NULL; in nandsim_destroy_chip() 300 if (!ctrl_conf->chips[chip->num]) in nandsim_chip_status() 303 memcpy(chip, ctrl_conf->chips[chip->num], sizeof(*chip)); in nandsim_chip_status() 401 return (sc->chips[chip_num]); in get_nandsim_chip() 606 sim_conf = ctrls[mod->ctrl_num].chips[mod->chip_num]; in nandsim_modify()
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| HD | nandsim_ctrl.c | 124 chip = params->chips[i]; in nandsim_attach() 126 sc->chips[i] = nandsim_chip_init(sc, i, chip); in nandsim_attach() 155 if (sc->chips[i] != NULL) in nandsim_detach() 156 nandsim_chip_destroy(sc->chips[i]); in nandsim_detach() 173 sc->active_chip = sc->chips[cs]; in nandsim_select_cs()
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| HD | nandsim_chip.h | 56 struct nandsim_chip *chips[MAX_CS_NUM]; member 128 struct sim_chip *chips[MAX_CTRL_CS]; member
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| /NextBSD/sys/dev/bxe/ |
| HD | bxe_dump.h | 62 uint32_t chips; member 71 uint32_t chips; member
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| /NextBSD/tools/tools/ifinfo/ |
| HD | rfc1650.c | 89 const char *const *chips; member 122 printf("%s\n", chipset_names[vendor].chips[part]); in identify_chipset()
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| /NextBSD/sys/powerpc/conf/ |
| HD | DEFAULTS | 9 # UART chips on this platform
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| /NextBSD/sys/amd64/conf/ |
| HD | DEFAULTS | 15 # UART chips on this platform
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| /NextBSD/sys/sparc64/conf/ |
| HD | DEFAULTS | 11 # UART chips on this platform
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| /NextBSD/sys/i386/conf/ |
| HD | DEFAULTS | 19 # UART chips on this platform
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| /NextBSD/sys/pc98/conf/ |
| HD | DEFAULTS | 20 # UART chips on this platform
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| /NextBSD/contrib/llvm/lib/Target/X86/ |
| HD | X86.td | 83 // explicit. Also, it seems this would be the default state for most chips 447 // TODO: We should probably add 'FeatureFastUAMem' to all of the AMD chips. 485 // be good for modern chips without enabling instruction set encodings past the 492 // knobs which need to be tuned differently for AMD chips, we might consider
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| /NextBSD/lib/libz/contrib/asm686/ |
| HD | README.686 | 43 in it. On the Pentium 4 and AMD64 chips, it continues to run about 8%
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| /NextBSD/sys/dev/aic7xxx/ |
| HD | aic7xxx.reg | 196 mask SOFS_ULTRA2 0x7f /* Sync offset U2 chips */ 228 /* ALT_MODE registers (Ultra2 and Ultra160 chips) */ 237 /* ALT_MODE register on Ultra160 chips */ 252 /* ALT_MODE register on Ultra160 chips */ 353 * SCSI ID for the aic7890/91 chips 689 * On the aic78X0 chips, Board Control is replaced by the DSCommand 1515 * host cannot directly access these registers. On later chips, this 1517 * Even on later chips, many of these locations are initialized by
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| /NextBSD/contrib/ofed/libmthca/ |
| HD | README | 19 libmthca currently supports HCAs based on the following Mellanox chips:
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| /NextBSD/usr.bin/fortune/ |
| HD | README | 19 Let the chips fall all over the prairie and let the bonehead wowsers yelp.
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| /NextBSD/sys/dev/sym/ |
| HD | README.sym | 7 * This driver also supports the following Symbios/LSI PCI-SCSI chips:
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| /NextBSD/sys/conf/ |
| HD | NOTES | 2001 # SiS 7016 and NS DP83815 PCI fast ethernet controller chips. 2009 # SMC91C90/92/94/95 chips. 2027 # Technologies VT3043 `Rhine I' and VT86C100A `Rhine II' chips, 2043 # integrated 3c905B-TX chips in certain Dell Optiplex and Dell 2044 # Precision desktop machines and the integrated 3c905-TX chips 2135 #device ath_ar5210 # AR5210 chips 2136 #device ath_ar5211 # AR5211 chips 2137 #device ath_ar5212 # AR5212 chips 2144 #device ath_ar5416 # AR5416 chips 2155 #device ath_ar9160 # AR9160 chips [all …]
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| /NextBSD/sys/dev/agp/ |
| HD | agp_if.m | 100 # code which is used by certain integrated agp graphics chips
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| /NextBSD/contrib/gcc/config/arm/ |
| HD | arm-generic.md | 25 ; Strictly, we should model a 4-deep write buffer for ARM7xx based chips
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| /NextBSD/contrib/gdtoa/ |
| HD | README | 50 and software emulations of Motorola 68xxx chips 53 xL IEEE extended precision, as on Motorola 68xxx chips 54 Q quad precision, as on Sun Sparc chips
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| /NextBSD/tools/tools/tinybsd/conf/wrap/ |
| HD | TINYBSD | 87 device sn # SMC's 9000 series of Ethernet chips
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| /NextBSD/tools/tools/tinybsd/conf/bridge/ |
| HD | TINYBSD | 119 device sn # SMC's 9000 series of Ethernet chips
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| /NextBSD/tools/tools/tinybsd/conf/vpn/ |
| HD | TINYBSD | 119 device sn # SMC's 9000 series of Ethernet chips
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| /NextBSD/sys/dev/firewire/ |
| HD | 00README | 116 chips should work.
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