| /NextBSD/sys/arm/altera/socfpga/ |
| HD | socfpga_common.h | 36 #define WRITE4(_sc, _reg, _val) bus_write_4((_sc)->res[0], _reg, _val) argument 37 #define WRITE2(_sc, _reg, _val) bus_write_2((_sc)->res[0], _reg, _val) argument 38 #define WRITE1(_sc, _reg, _val) bus_write_1((_sc)->res[0], _reg, _val) argument
|
| /NextBSD/sys/arm/samsung/exynos/ |
| HD | exynos5_common.h | 31 #define WRITE4(_sc, _reg, _val) \ argument 32 bus_space_write_4(_sc->bst, _sc->bsh, _reg, _val) 35 #define WRITE2(_sc, _reg, _val) \ argument 36 bus_space_write_2(_sc->bst, _sc->bsh, _reg, _val) 39 #define WRITE1(_sc, _reg, _val) \ argument 40 bus_space_write_1(_sc->bst, _sc->bsh, _reg, _val)
|
| /NextBSD/sys/arm/freescale/vybrid/ |
| HD | vf_common.h | 31 #define WRITE4(_sc, _reg, _val) \ argument 32 bus_space_write_4(_sc->bst, _sc->bsh, _reg, _val) 35 #define WRITE2(_sc, _reg, _val) \ argument 36 bus_space_write_2(_sc->bst, _sc->bsh, _reg, _val) 39 #define WRITE1(_sc, _reg, _val) \ argument 40 bus_space_write_1(_sc->bst, _sc->bsh, _reg, _val)
|
| HD | vf_edma.h | 113 #define TCD_WRITE4(_sc, _reg, _val) \ argument 114 bus_space_write_4(_sc->bst_tcd, _sc->bsh_tcd, _reg, _val) 117 #define TCD_WRITE2(_sc, _reg, _val) \ argument 118 bus_space_write_2(_sc->bst_tcd, _sc->bsh_tcd, _reg, _val) 121 #define TCD_WRITE1(_sc, _reg, _val) \ argument 122 bus_space_write_1(_sc->bst_tcd, _sc->bsh_tcd, _reg, _val)
|
| HD | vf_dmamux.h | 47 #define MUX_WRITE1(_sc, _mux, _reg, _val) \ argument 48 bus_space_write_1(_sc->bst[_mux], _sc->bsh[_mux], _reg, _val)
|
| HD | vf_ehci.c | 114 #define PHY_WRITE4(_sc, _reg, _val) \ argument 115 bus_space_write_4(_sc->bst_phy, _sc->bsh_phy, _reg, _val) 119 #define USBC_WRITE4(_sc, _reg, _val) \ argument 120 bus_space_write_4(_sc->bst_usbc, _sc->bsh_usbc, _reg, _val)
|
| /NextBSD/sys/dev/ath/ath_hal/ar5210/ |
| HD | ar5210.h | 30 #define AR5210_TXD_CTRL_A_HDR_LEN(_val) (((_val) ) & 0x0003f) 31 #define AR5210_TXD_CTRL_A_TX_RATE(_val) (((_val) << 6) & 0x003c0) 33 #define AR5210_TXD_CTRL_A_CLEAR_DEST_MASK(_val) (((_val) << 12) & 0x01000) 34 #define AR5210_TXD_CTRL_A_ANT_MODE(_val) (((_val) << 13) & 0x02000) 35 #define AR5210_TXD_CTRL_A_PKT_TYPE(_val) (((_val) << 14) & 0x1c000) 38 #define AR5210_TXD_CTRL_B_KEY_ID(_val) (((_val) ) & 0x0003f) 39 #define AR5210_TXD_CTRL_B_RTS_DURATION(_val) (((_val) << 6) & 0x7ffc0)
|
| /NextBSD/sys/dev/altera/pio/ |
| HD | pio.c | 63 #define WRITE4(_sc, _reg, _val) bus_write_4((_sc)->res[0], _reg, _val) argument 64 #define WRITE2(_sc, _reg, _val) bus_write_2((_sc)->res[0], _reg, _val) argument 65 #define WRITE1(_sc, _reg, _val) bus_write_1((_sc)->res[0], _reg, _val) argument
|
| /NextBSD/sys/dev/beri/virtio/ |
| HD | virtio.h | 37 #define WRITE2(_sc, _reg, _val) \ argument 38 bus_write_2((_sc)->res[0], _reg, _val) 39 #define WRITE4(_sc, _reg, _val) \ argument 40 bus_write_4((_sc)->res[0], _reg, _val)
|
| /NextBSD/contrib/ntp/lib/isc/include/isc/ |
| HD | buffer.h | 809 #define ISC__BUFFER_PUTUINT8(_b, _val) \ argument 812 isc_uint8_t _val2 = (_val); \ 818 #define ISC__BUFFER_PUTUINT16(_b, _val) \ argument 821 isc_uint16_t _val2 = (_val); \ 828 #define ISC__BUFFER_PUTUINT24(_b, _val) \ argument 831 isc_uint32_t _val2 = (_val); \ 839 #define ISC__BUFFER_PUTUINT32(_b, _val) \ argument 842 isc_uint32_t _val2 = (_val); \
|
| /NextBSD/contrib/llvm/tools/lldb/include/lldb/Utility/ |
| HD | AnsiTerminal.h | 64 #define _TO_STR2(_val) #_val argument 65 #define _TO_STR(_val) _TO_STR2(_val) argument
|
| /NextBSD/share/examples/ppi/ |
| HD | ppilcd.c | 291 #define hd_sctrl(v) {u_int8_t _val; _val = hd_cbits | v; ioctl(hd_fd, PPISCTRL, &_val);} 292 #define hd_sdata(v) {u_int8_t _val; _val = v; ioctl(hd_fd, PPISDATA, &_val);}
|
| /NextBSD/sys/arm/broadcom/bcm2835/ |
| HD | bcm2835_spivar.h | 62 #define BCM_SPI_WRITE(_sc, _off, _val) \ argument 63 bus_space_write_4(_sc->sc_bst, _sc->sc_bsh, _off, _val)
|
| HD | bcm2835_bscvar.h | 61 #define BCM_BSC_WRITE(_sc, _off, _val) \ argument 62 bus_space_write_4((_sc)->sc_bst, (_sc)->sc_bsh, _off, _val)
|
| /NextBSD/lib/libdispatch/src/shims/ |
| HD | atomic_sfb.h | 86 : [_p] "=m" (*p), [_val] "=&r" (val), [_bit] "=&r" (bit) in dispatch_atomic_set_first_bit() 104 : [_p] "=m" (*p), [_val] "=&r" (val), [_bit] "=&r" (bit) in dispatch_atomic_set_first_bit()
|
| /NextBSD/sys/dev/ath/ath_hal/ar5312/ |
| HD | ar5312reg.h | 31 #define REG_WRITE(_reg,_val) *((volatile uint32_t *)(_reg)) = (_val); argument
|
| /NextBSD/sys/dev/mcd/ |
| HD | mcdvar.h | 68 #define MCD_WRITE(_sc, _reg, _val) bus_write_1(_sc->port, _reg, _val) argument
|
| /NextBSD/sys/dev/scd/ |
| HD | scdvar.h | 61 #define SCD_WRITE(_sc, _reg, _val) \ argument 62 bus_write_1(_sc->port, _reg, _val)
|
| /NextBSD/lib/libipsec/ |
| HD | policy_parse.y | 79 struct _val; 81 static struct sockaddr *parse_sockaddr(struct _val *buf); 99 struct _val { struct 225 struct _val *buf; in parse_sockaddr()
|
| /NextBSD/sys/arm/lpc/ |
| HD | lpc_pwr.c | 61 #define lpc_pwr_write_4(_sc, _reg, _val) \ argument 62 bus_space_write_4((_sc)->dp_bst, (_sc)->dp_bsh, _reg, _val)
|
| HD | lpc_spi.c | 82 #define lpc_spi_write_4(_sc, _reg, _val) \ argument 83 bus_space_write_4(_sc->ls_bst, _sc->ls_bsh, _reg, _val)
|
| /NextBSD/sys/arm/freescale/imx/ |
| HD | imx6_audmux.c | 58 #define WRITE4(_sc, _reg, _val) \ argument 59 bus_space_write_4(_sc->bst, _sc->bsh, _reg, _val)
|
| /NextBSD/sys/dev/etherswitch/rtl8366/ |
| HD | rtl8366rbvar.h | 129 #define RTL8366RB_PVCR_GET(_port, _val) \ argument 130 …(((_val) >> ((_port % RTL8366RB_PVCR_PORT_PERREG) * RTL8366RB_PVCR_PORT_SHIFT)) & RTL8366RB_PVCR_P…
|
| /NextBSD/sys/dev/ath/ |
| HD | ah_osdep.h | 137 #define OS_REG_WRITE(_ah, _reg, _val) ath_hal_reg_write(_ah, _reg, _val) argument
|
| /NextBSD/sys/arm64/arm64/ |
| HD | gic.c | 115 #define gic_c_write_4(_sc, _reg, _val) \ argument 116 bus_space_write_4((_sc)->gic_c_bst, (_sc)->gic_c_bsh, (_reg), (_val)) 119 #define gic_d_write_4(_sc, _reg, _val) \ argument 120 bus_space_write_4((_sc)->gic_d_bst, (_sc)->gic_d_bsh, (_reg), (_val))
|