xref: /NextBSD/contrib/llvm/tools/clang/lib/Headers/avx512dqintrin.h (revision 84d351007654069f9643c8e4b4802a7f5f08ee42)
1 /*===---- avx512dqintrin.h - AVX512DQ intrinsics ---------------------------===
2  *
3  * Permission is hereby granted, free of charge, to any person obtaining a copy
4  * of this software and associated documentation files (the "Software"), to deal
5  * in the Software without restriction, including without limitation the rights
6  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
7  * copies of the Software, and to permit persons to whom the Software is
8  * furnished to do so, subject to the following conditions:
9  *
10  * The above copyright notice and this permission notice shall be included in
11  * all copies or substantial portions of the Software.
12  *
13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
16  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
17  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
18  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
19  * THE SOFTWARE.
20  *
21  *===-----------------------------------------------------------------------===
22  */
23 
24 #ifndef __IMMINTRIN_H
25 #error "Never use <avx512dqintrin.h> directly; include <immintrin.h> instead."
26 #endif
27 
28 #ifndef __AVX512DQINTRIN_H
29 #define __AVX512DQINTRIN_H
30 
31 /* Define the default attributes for the functions in this file. */
32 #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
33 
34 static __inline__ __m512i __DEFAULT_FN_ATTRS
_mm512_mullo_epi64(__m512i __A,__m512i __B)35 _mm512_mullo_epi64 (__m512i __A, __m512i __B) {
36   return (__m512i) ((__v8di) __A * (__v8di) __B);
37 }
38 
39 static __inline__ __m512i __DEFAULT_FN_ATTRS
_mm512_mask_mullo_epi64(__m512i __W,__mmask8 __U,__m512i __A,__m512i __B)40 _mm512_mask_mullo_epi64 (__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) {
41   return (__m512i) __builtin_ia32_pmullq512_mask ((__v8di) __A,
42               (__v8di) __B,
43               (__v8di) __W,
44               (__mmask8) __U);
45 }
46 
47 static __inline__ __m512i __DEFAULT_FN_ATTRS
_mm512_maskz_mullo_epi64(__mmask8 __U,__m512i __A,__m512i __B)48 _mm512_maskz_mullo_epi64 (__mmask8 __U, __m512i __A, __m512i __B) {
49   return (__m512i) __builtin_ia32_pmullq512_mask ((__v8di) __A,
50               (__v8di) __B,
51               (__v8di)
52               _mm512_setzero_si512 (),
53               (__mmask8) __U);
54 }
55 
56 static __inline__ __m512d __DEFAULT_FN_ATTRS
_mm512_xor_pd(__m512d __A,__m512d __B)57 _mm512_xor_pd (__m512d __A, __m512d __B) {
58   return (__m512d) ((__v8di) __A ^ (__v8di) __B);
59 }
60 
61 static __inline__ __m512d __DEFAULT_FN_ATTRS
_mm512_mask_xor_pd(__m512d __W,__mmask8 __U,__m512d __A,__m512d __B)62 _mm512_mask_xor_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {
63   return (__m512d) __builtin_ia32_xorpd512_mask ((__v8df) __A,
64              (__v8df) __B,
65              (__v8df) __W,
66              (__mmask8) __U);
67 }
68 
69 static __inline__ __m512d __DEFAULT_FN_ATTRS
_mm512_maskz_xor_pd(__mmask8 __U,__m512d __A,__m512d __B)70 _mm512_maskz_xor_pd (__mmask8 __U, __m512d __A, __m512d __B) {
71   return (__m512d) __builtin_ia32_xorpd512_mask ((__v8df) __A,
72              (__v8df) __B,
73              (__v8df)
74              _mm512_setzero_pd (),
75              (__mmask8) __U);
76 }
77 
78 static __inline__ __m512 __DEFAULT_FN_ATTRS
_mm512_xor_ps(__m512 __A,__m512 __B)79 _mm512_xor_ps (__m512 __A, __m512 __B) {
80   return (__m512) ((__v16si) __A ^ (__v16si) __B);
81 }
82 
83 static __inline__ __m512 __DEFAULT_FN_ATTRS
_mm512_mask_xor_ps(__m512 __W,__mmask16 __U,__m512 __A,__m512 __B)84 _mm512_mask_xor_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {
85   return (__m512) __builtin_ia32_xorps512_mask ((__v16sf) __A,
86             (__v16sf) __B,
87             (__v16sf) __W,
88             (__mmask16) __U);
89 }
90 
91 static __inline__ __m512 __DEFAULT_FN_ATTRS
_mm512_maskz_xor_ps(__mmask16 __U,__m512 __A,__m512 __B)92 _mm512_maskz_xor_ps (__mmask16 __U, __m512 __A, __m512 __B) {
93   return (__m512) __builtin_ia32_xorps512_mask ((__v16sf) __A,
94             (__v16sf) __B,
95             (__v16sf)
96             _mm512_setzero_ps (),
97             (__mmask16) __U);
98 }
99 
100 static __inline__ __m512d __DEFAULT_FN_ATTRS
_mm512_or_pd(__m512d __A,__m512d __B)101 _mm512_or_pd (__m512d __A, __m512d __B) {
102   return (__m512d) ((__v8di) __A | (__v8di) __B);
103 }
104 
105 static __inline__ __m512d __DEFAULT_FN_ATTRS
_mm512_mask_or_pd(__m512d __W,__mmask8 __U,__m512d __A,__m512d __B)106 _mm512_mask_or_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {
107   return (__m512d) __builtin_ia32_orpd512_mask ((__v8df) __A,
108             (__v8df) __B,
109             (__v8df) __W,
110             (__mmask8) __U);
111 }
112 
113 static __inline__ __m512d __DEFAULT_FN_ATTRS
_mm512_maskz_or_pd(__mmask8 __U,__m512d __A,__m512d __B)114 _mm512_maskz_or_pd (__mmask8 __U, __m512d __A, __m512d __B) {
115   return (__m512d) __builtin_ia32_orpd512_mask ((__v8df) __A,
116             (__v8df) __B,
117             (__v8df)
118             _mm512_setzero_pd (),
119             (__mmask8) __U);
120 }
121 
122 static __inline__ __m512 __DEFAULT_FN_ATTRS
_mm512_or_ps(__m512 __A,__m512 __B)123 _mm512_or_ps (__m512 __A, __m512 __B) {
124   return (__m512) ((__v16si) __A | (__v16si) __B);
125 }
126 
127 static __inline__ __m512 __DEFAULT_FN_ATTRS
_mm512_mask_or_ps(__m512 __W,__mmask16 __U,__m512 __A,__m512 __B)128 _mm512_mask_or_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {
129   return (__m512) __builtin_ia32_orps512_mask ((__v16sf) __A,
130                  (__v16sf) __B,
131                  (__v16sf) __W,
132                  (__mmask16) __U);
133 }
134 
135 static __inline__ __m512 __DEFAULT_FN_ATTRS
_mm512_maskz_or_ps(__mmask16 __U,__m512 __A,__m512 __B)136 _mm512_maskz_or_ps (__mmask16 __U, __m512 __A, __m512 __B) {
137   return (__m512) __builtin_ia32_orps512_mask ((__v16sf) __A,
138                  (__v16sf) __B,
139                  (__v16sf)
140                  _mm512_setzero_ps (),
141                  (__mmask16) __U);
142 }
143 
144 static __inline__ __m512d __DEFAULT_FN_ATTRS
_mm512_and_pd(__m512d __A,__m512d __B)145 _mm512_and_pd (__m512d __A, __m512d __B) {
146   return (__m512d) ((__v8di) __A & (__v8di) __B);
147 }
148 
149 static __inline__ __m512d __DEFAULT_FN_ATTRS
_mm512_mask_and_pd(__m512d __W,__mmask8 __U,__m512d __A,__m512d __B)150 _mm512_mask_and_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {
151   return (__m512d) __builtin_ia32_andpd512_mask ((__v8df) __A,
152              (__v8df) __B,
153              (__v8df) __W,
154              (__mmask8) __U);
155 }
156 
157 static __inline__ __m512d __DEFAULT_FN_ATTRS
_mm512_maskz_and_pd(__mmask8 __U,__m512d __A,__m512d __B)158 _mm512_maskz_and_pd (__mmask8 __U, __m512d __A, __m512d __B) {
159   return (__m512d) __builtin_ia32_andpd512_mask ((__v8df) __A,
160              (__v8df) __B,
161              (__v8df)
162              _mm512_setzero_pd (),
163              (__mmask8) __U);
164 }
165 
166 static __inline__ __m512 __DEFAULT_FN_ATTRS
_mm512_and_ps(__m512 __A,__m512 __B)167 _mm512_and_ps (__m512 __A, __m512 __B) {
168   return (__m512) ((__v16si) __A & (__v16si) __B);
169 }
170 
171 static __inline__ __m512 __DEFAULT_FN_ATTRS
_mm512_mask_and_ps(__m512 __W,__mmask16 __U,__m512 __A,__m512 __B)172 _mm512_mask_and_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {
173   return (__m512) __builtin_ia32_andps512_mask ((__v16sf) __A,
174             (__v16sf) __B,
175             (__v16sf) __W,
176             (__mmask16) __U);
177 }
178 
179 static __inline__ __m512 __DEFAULT_FN_ATTRS
_mm512_maskz_and_ps(__mmask16 __U,__m512 __A,__m512 __B)180 _mm512_maskz_and_ps (__mmask16 __U, __m512 __A, __m512 __B) {
181   return (__m512) __builtin_ia32_andps512_mask ((__v16sf) __A,
182             (__v16sf) __B,
183             (__v16sf)
184             _mm512_setzero_ps (),
185             (__mmask16) __U);
186 }
187 
188 static __inline__ __m512d __DEFAULT_FN_ATTRS
_mm512_andnot_pd(__m512d __A,__m512d __B)189 _mm512_andnot_pd (__m512d __A, __m512d __B) {
190   return (__m512d) __builtin_ia32_andnpd512_mask ((__v8df) __A,
191               (__v8df) __B,
192               (__v8df)
193               _mm512_setzero_pd (),
194               (__mmask8) -1);
195 }
196 
197 static __inline__ __m512d __DEFAULT_FN_ATTRS
_mm512_mask_andnot_pd(__m512d __W,__mmask8 __U,__m512d __A,__m512d __B)198 _mm512_mask_andnot_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {
199   return (__m512d) __builtin_ia32_andnpd512_mask ((__v8df) __A,
200               (__v8df) __B,
201               (__v8df) __W,
202               (__mmask8) __U);
203 }
204 
205 static __inline__ __m512d __DEFAULT_FN_ATTRS
_mm512_maskz_andnot_pd(__mmask8 __U,__m512d __A,__m512d __B)206 _mm512_maskz_andnot_pd (__mmask8 __U, __m512d __A, __m512d __B) {
207   return (__m512d) __builtin_ia32_andnpd512_mask ((__v8df) __A,
208               (__v8df) __B,
209               (__v8df)
210               _mm512_setzero_pd (),
211               (__mmask8) __U);
212 }
213 
214 static __inline__ __m512 __DEFAULT_FN_ATTRS
_mm512_andnot_ps(__m512 __A,__m512 __B)215 _mm512_andnot_ps (__m512 __A, __m512 __B) {
216   return (__m512) __builtin_ia32_andnps512_mask ((__v16sf) __A,
217              (__v16sf) __B,
218              (__v16sf)
219              _mm512_setzero_ps (),
220              (__mmask16) -1);
221 }
222 
223 static __inline__ __m512 __DEFAULT_FN_ATTRS
_mm512_mask_andnot_ps(__m512 __W,__mmask16 __U,__m512 __A,__m512 __B)224 _mm512_mask_andnot_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {
225   return (__m512) __builtin_ia32_andnps512_mask ((__v16sf) __A,
226              (__v16sf) __B,
227              (__v16sf) __W,
228              (__mmask16) __U);
229 }
230 
231 static __inline__ __m512 __DEFAULT_FN_ATTRS
_mm512_maskz_andnot_ps(__mmask16 __U,__m512 __A,__m512 __B)232 _mm512_maskz_andnot_ps (__mmask16 __U, __m512 __A, __m512 __B) {
233   return (__m512) __builtin_ia32_andnps512_mask ((__v16sf) __A,
234              (__v16sf) __B,
235              (__v16sf)
236              _mm512_setzero_ps (),
237              (__mmask16) __U);
238 }
239 
240 #undef __DEFAULT_FN_ATTRS
241 
242 #endif
243