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Searched refs:XCore (Results 1 – 25 of 25) sorted by relevance

/NextBSD/contrib/llvm/lib/Target/XCore/
HDXCoreInstrInfo.cpp35 namespace XCore { namespace
50 : XCoreGenInstrInfo(XCore::ADJCALLSTACKDOWN, XCore::ADJCALLSTACKUP), in XCoreInstrInfo()
66 if (Opcode == XCore::LDWFI) in isLoadFromStackSlot()
88 if (Opcode == XCore::STWFI) in isStoreToStackSlot()
106 return BrOpc == XCore::BRFU_u6 in IsBRU()
107 || BrOpc == XCore::BRFU_lu6 in IsBRU()
108 || BrOpc == XCore::BRBU_u6 in IsBRU()
109 || BrOpc == XCore::BRBU_lu6; in IsBRU()
113 return BrOpc == XCore::BRFT_ru6 in IsBRT()
114 || BrOpc == XCore::BRFT_lru6 in IsBRT()
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HDXCoreRegisterInfo.cpp45 : XCoreGenRegisterInfo(XCore::LR) { in XCoreRegisterInfo()
70 case XCore::LDWFI: in InsertFPImmInst()
71 BuildMI(MBB, II, dl, TII.get(XCore::LDW_2rus), Reg) in InsertFPImmInst()
76 case XCore::STWFI: in InsertFPImmInst()
77 BuildMI(MBB, II, dl, TII.get(XCore::STW_2rus)) in InsertFPImmInst()
83 case XCore::LDAWFI: in InsertFPImmInst()
84 BuildMI(MBB, II, dl, TII.get(XCore::LDAWF_l2rus), Reg) in InsertFPImmInst()
101 unsigned ScratchOffset = RS->scavengeRegister(&XCore::GRRegsRegClass, II, 0); in InsertFPConstInst()
106 case XCore::LDWFI: in InsertFPConstInst()
107 BuildMI(MBB, II, dl, TII.get(XCore::LDW_3r), Reg) in InsertFPConstInst()
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HDXCoreFrameLowering.cpp35 static const unsigned FramePtr = XCore::R10;
107 int Opcode = isImmU6(OpImm) ? XCore::EXTSP_u6 : XCore::EXTSP_lu6; in IfNeededExtSP()
129 int Opcode = isImmU6(OpImm) ? XCore::LDAWSP_ru6 : XCore::LDAWSP_lru6; in IfNeededLDAWSP()
130 BuildMI(MBB, MBBI, dl, TII.get(Opcode), XCore::SP).addImm(OpImm); in IfNeededLDAWSP()
146 XCore::LR)); in GetSpillList()
201 int Opcode = isImmU6(Offset) ? XCore::LDWSP_ru6 : XCore::LDWSP_lru6; in RestoreSpillList()
242 BuildMI(MBB, MBBI, dl, TII.get(XCore::LDWSP_ru6), XCore::R11).addImm(0); in emitPrologue()
262 int Opcode = isImmU6(Adjusted) ? XCore::ENTSP_u6 : XCore::ENTSP_lu6; in emitPrologue()
263 MBB.addLiveIn(XCore::LR); in emitPrologue()
266 MIB->addRegisterKilled(XCore::LR, MF.getSubtarget().getRegisterInfo(), in emitPrologue()
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HDXCoreISelDAGToDAG.cpp121 Reg = CurDAG->getRegister(XCore::CP, MVT::i32); in SelectInlineAsmMemoryOperand()
124 Reg = CurDAG->getRegister(XCore::DP, MVT::i32); in SelectInlineAsmMemoryOperand()
143 return CurDAG->getMachineNode(XCore::MKMSK_rus, dl, in Select()
150 SDNode *node = CurDAG->getMachineNode(XCore::LDWCP_lru6, dl, MVT::i32, in Select()
164 return CurDAG->getMachineNode(XCore::LADD_l5r, dl, MVT::i32, MVT::i32, in Select()
170 return CurDAG->getMachineNode(XCore::LSUB_l5r, dl, MVT::i32, MVT::i32, in Select()
176 return CurDAG->getMachineNode(XCore::MACCU_l4r, dl, MVT::i32, MVT::i32, in Select()
182 return CurDAG->getMachineNode(XCore::MACCS_l4r, dl, MVT::i32, MVT::i32, in Select()
188 return CurDAG->getMachineNode(XCore::LMUL_l6r, dl, MVT::i32, MVT::i32, in Select()
193 return CurDAG->getMachineNode(XCore::CRC8_l4r, dl, MVT::i32, MVT::i32, in Select()
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HDXCore.td1 //===-- XCore.td - Describe the XCore Target Machine -------*- tablegen -*-===//
10 // This is the top level entry point for the XCore target.
31 // XCore processors supported.
44 def XCore : Target {
HDXCoreRegisterInfo.td1 //===-- XCoreRegisterInfo.td - XCore Register defs ---------*- tablegen -*-===//
11 // Declarations that describe the XCore register file
16 let Namespace = "XCore";
45 def GRRegs : RegisterClass<"XCore", [i32], 32,
54 def RRegs : RegisterClass<"XCore", [i32], 32,
HDXCoreCallingConv.td1 //===- XCoreCallingConv.td - Calling Conventions for XCore -*- tablegen -*-===//
9 // This describes the calling conventions for XCore architecture.
13 // XCore Return Value Calling Convention
25 // XCore Argument Calling Conventions
HDXCoreMachineFunctionInfo.cpp38 const TargetRegisterClass *RC = &XCore::GRRegsRegClass; in createLRSpillSlot()
54 const TargetRegisterClass *RC = &XCore::GRRegsRegClass; in createFPSpillSlot()
65 const TargetRegisterClass *RC = &XCore::GRRegsRegClass; in createEHSpillSlot()
HDXCoreAsmPrinter.cpp272 case XCore::DBG_VALUE: in EmitInstruction()
274 case XCore::ADD_2rus: in EmitInstruction()
283 case XCore::BR_JT: in EmitInstruction()
284 case XCore::BR_JT32: in EmitInstruction()
287 if (MI->getOpcode() == XCore::BR_JT) in EmitInstruction()
HDXCoreISelLowering.cpp77 addRegisterClass(MVT::i32, &XCore::GRRegsRegClass); in XCoreTargetLowering()
85 setStackPointerRegisterToSaveRestore(XCore::SP); in XCoreTargetLowering()
157 setExceptionPointerRegister(XCore::R0); in XCoreTargetLowering()
158 setExceptionSelectorRegister(XCore::R1); in XCoreTargetLowering()
877 unsigned StackReg = XCore::R2; in LowerEH_RETURN()
878 unsigned HandlerReg = XCore::R3; in LowerEH_RETURN()
1346 unsigned VReg = RegInfo.createVirtualRegister(&XCore::GRRegsRegClass); in LowerCCCArguments()
1381 XCore::R0, XCore::R1, XCore::R2, XCore::R3 in LowerCCCArguments()
1398 unsigned VReg = RegInfo.createVirtualRegister(&XCore::GRRegsRegClass); in LowerCCCArguments()
1562 assert((MI->getOpcode() == XCore::SELECT_CC) && in EmitInstrWithCustomInserter()
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HDXCoreFrameToArgsOffsetElim.cpp54 if (MBBI->getOpcode() == XCore::FRAME_TO_ARGS_OFFSET) { in runOnMachineFunction()
HDXCoreInstrFormats.td1 //===-- XCoreInstrFormats.td - XCore Instruction Formats ---*- tablegen -*-===//
17 let Namespace = "XCore";
26 // XCore pseudo instructions format
HDXCoreInstrInfo.td1 //===-- XCoreInstrInfo.td - Target Description for XCore ---*- tablegen -*-===//
10 // This file describes the XCore instructions in TableGen format.
26 // XCore specific DAG Nodes.
1293 // ashr X, 32 is equivalent to ashr X, 31 on the XCore.
/NextBSD/contrib/llvm/lib/Target/XCore/Disassembler/
HDXCoreDisassembler.cpp206 unsigned Reg = getReg(Decoder, XCore::GRRegsRegClassID, RegNo); in DecodeGRRegsRegisterClass()
218 unsigned Reg = getReg(Decoder, XCore::RRegsRegClassID, RegNo); in DecodeRRegsRegisterClass()
281 Inst.setOpcode(XCore::STW_2rus); in Decode2OpInstructionFail()
284 Inst.setOpcode(XCore::LDW_2rus); in Decode2OpInstructionFail()
287 Inst.setOpcode(XCore::ADD_3r); in Decode2OpInstructionFail()
290 Inst.setOpcode(XCore::SUB_3r); in Decode2OpInstructionFail()
293 Inst.setOpcode(XCore::SHL_3r); in Decode2OpInstructionFail()
296 Inst.setOpcode(XCore::SHR_3r); in Decode2OpInstructionFail()
299 Inst.setOpcode(XCore::EQ_3r); in Decode2OpInstructionFail()
302 Inst.setOpcode(XCore::AND_3r); in Decode2OpInstructionFail()
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/NextBSD/contrib/llvm/
HDFREEBSD-Xlist351 lib/Target/XCore/CMakeLists.txt
352 lib/Target/XCore/Disassembler/CMakeLists.txt
353 lib/Target/XCore/Disassembler/LLVMBuild.txt
354 lib/Target/XCore/Disassembler/Makefile
355 lib/Target/XCore/InstPrinter/CMakeLists.txt
356 lib/Target/XCore/InstPrinter/LLVMBuild.txt
357 lib/Target/XCore/InstPrinter/Makefile
358 lib/Target/XCore/LLVMBuild.txt
359 lib/Target/XCore/MCTargetDesc/CMakeLists.txt
360 lib/Target/XCore/MCTargetDesc/LLVMBuild.txt
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/NextBSD/contrib/llvm/tools/clang/include/clang/Basic/
HDBuiltinsXCore.def1 //===--- BuiltinsXCore.def - XCore Builtin function database ----*- C++ -*-===//
10 // This file defines the XCore-specific builtin function database. Users of
HDTargetBuiltins.h160 namespace XCore {
/NextBSD/contrib/llvm/lib/Target/XCore/MCTargetDesc/
HDXCoreMCTargetDesc.cpp45 InitXCoreMCRegisterInfo(X, XCore::LR); in createXCoreMCRegisterInfo()
59 MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, XCore::SP, 0); in createXCoreMCAsmInfo()
/NextBSD/contrib/llvm/include/llvm/IR/
HDIntrinsicsXCore.td1 //==- IntrinsicsXCore.td - XCore intrinsics -*- tablegen -*-==//
10 // This file defines all of the XCore-specific intrinsics.
/NextBSD/contrib/llvm/tools/clang/lib/Driver/
HDToolChains.cpp3715 XCore::XCore(const Driver &D, const llvm::Triple &Triple, const ArgList &Args) in XCore() function in XCore
3720 Tool *XCore::buildAssembler() const { in buildAssembler()
3721 return new tools::XCore::Assembler(*this); in buildAssembler()
3724 Tool *XCore::buildLinker() const { return new tools::XCore::Linker(*this); } in buildLinker()
3726 bool XCore::isPICDefault() const { return false; } in isPICDefault()
3728 bool XCore::isPIEDefault() const { return false; } in isPIEDefault()
3730 bool XCore::isPICDefaultForced() const { return false; } in isPICDefaultForced()
3732 bool XCore::SupportsProfiling() const { return false; } in SupportsProfiling()
3734 bool XCore::hasBlocksRuntime() const { return false; } in hasBlocksRuntime()
3736 void XCore::AddClangSystemIncludeArgs(const ArgList &DriverArgs, in AddClangSystemIncludeArgs()
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HDToolChains.h866 class LLVM_LIBRARY_VISIBILITY XCore : public ToolChain {
868 XCore(const Driver &D, const llvm::Triple &Triple,
HDTools.h713 namespace XCore {
HDDriver.cpp2231 TC = new toolchains::XCore(*this, Target, Args); in getToolChain()
HDTools.cpp9213 void XCore::Assembler::ConstructJob(Compilation &C, const JobAction &JA, in ConstructJob()
9246 void XCore::Linker::ConstructJob(Compilation &C, const JobAction &JA, in ConstructJob()
/NextBSD/contrib/llvm/tools/clang/lib/Basic/
HDTargets.cpp6916 NumRecords = clang::XCore::LastTSBuiltin-Builtin::FirstTSBuiltin; in getTargetBuiltins()