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Searched refs:VIA_WRITE (Results 1 – 5 of 5) sorted by relevance

/NextBSD/sys/dev/drm/
HDvia_irq.c157 VIA_WRITE(VIA_REG_INTERRUPT, status); in via_driver_irq_handler()
173 VIA_WRITE(VIA_REG_INTERRUPT, status | in viadrv_acknowledge_irqs()
189 VIA_WRITE(VIA_REG_INTERRUPT, status & VIA_IRQ_VBLANK_ENABLE); in via_enable_vblank()
303 VIA_WRITE(VIA_REG_INTERRUPT, status & in via_driver_irq_preinstall()
321 VIA_WRITE(VIA_REG_INTERRUPT, status | VIA_IRQ_GLOBAL in via_driver_irq_postinstall()
345 VIA_WRITE(VIA_REG_INTERRUPT, status & in via_driver_irq_uninstall()
HDvia_dma.c481 VIA_WRITE(VIA_REG_TRANSET, (HC_ParaType_PreCR << 16)); in via_hook_segment()
482 VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_hi); in via_hook_segment()
483 VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_lo); in via_hook_segment()
563 VIA_WRITE(VIA_REG_TRANSET, (HC_ParaType_PreCR << 16)); in via_cmdbuf_start()
564 VIA_WRITE(VIA_REG_TRANSPACE, command); in via_cmdbuf_start()
565 VIA_WRITE(VIA_REG_TRANSPACE, start_addr_lo); in via_cmdbuf_start()
566 VIA_WRITE(VIA_REG_TRANSPACE, end_addr_lo); in via_cmdbuf_start()
568 VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_hi); in via_cmdbuf_start()
569 VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_lo); in via_cmdbuf_start()
571 VIA_WRITE(VIA_REG_TRANSPACE, command | HC_HAGPCMNT_MASK); in via_cmdbuf_start()
HDvia_dmablit.c204 VIA_WRITE(VIA_PCI_DMA_MAR0 + engine*0x10, 0); in via_fire_dmablit()
205 VIA_WRITE(VIA_PCI_DMA_DAR0 + engine*0x10, 0); in via_fire_dmablit()
206 VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_DD | VIA_DMA_CSR_TD | in via_fire_dmablit()
208 VIA_WRITE(VIA_PCI_DMA_MR0 + engine*0x04, VIA_DMA_MR_CM | VIA_DMA_MR_TDIE); in via_fire_dmablit()
209 VIA_WRITE(VIA_PCI_DMA_BCR0 + engine*0x10, 0); in via_fire_dmablit()
210 VIA_WRITE(VIA_PCI_DMA_DPR0 + engine*0x10, vsg->chain_start); in via_fire_dmablit()
212 VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_DE | VIA_DMA_CSR_TS); in via_fire_dmablit()
294 VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TA); in via_abort_dmablit()
303 VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TD | VIA_DMA_CSR_DD); in via_dmablit_engine_off()
347 VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TD); in via_dmablit_handler()
HDvia_verifier.c727 VIA_WRITE(HC_REG_TRANS_SET + HC_REG_BASE, *buf++); in via_parse_header2()
734 VIA_WRITE(HC_REG_TRANS_SPACE + HC_REG_BASE + in via_parse_header2()
755 VIA_WRITE(HC_REG_TRANS_SPACE + HC_REG_BASE + in via_parse_header2()
845 VIA_WRITE((cmd & ~HALCYON_HEADER1MASK) << 2, *++buf); in via_parse_header1()
896 VIA_WRITE(addr, *buf++); in via_parse_vheader5()
953 VIA_WRITE(addr, *buf++); in via_parse_vheader6()
HDvia_drv.h114 #define VIA_WRITE(reg,val) DRM_WRITE32(VIA_BASE, reg, val) macro