| /NextBSD/contrib/llvm/include/llvm/CodeGen/ |
| HD | BasicTTIImpl.h | 89 const TargetLoweringBase *getTLI() const { in getTLI()
124 TargetLoweringBase::AddrMode AM; in isLegalAddressingMode()
134 TargetLoweringBase::AddrMode AM; in getScalingFactorCost()
182 const TargetLoweringBase *TLI = getTLI(); in shouldBuildLookupTables()
188 const TargetLoweringBase *TLI = getTLI(); in haveFastSqrt()
201 const TargetLoweringBase *TLI = getTLI(); in getOperationCost()
292 const TargetLoweringBase *TLI = getTLI();
343 const TargetLoweringBase *TLI = getTLI(); in getCastInstrCost()
441 const TargetLoweringBase *TLI = getTLI(); in getCmpSelInstrCost()
694 const TargetLoweringBase *TLI = getTLI(); in getIntrinsicInstrCost()
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| HD | Analysis.h | 26 class TargetLoweringBase; variable
109 const TargetLoweringBase &TLI);
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| HD | StackProtector.h | 55 const TargetLoweringBase *TLI;
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| HD | Passes.h | 30 class TargetLoweringBase; variable
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| /NextBSD/contrib/llvm/lib/CodeGen/ |
| HD | TargetLoweringBase.cpp | 749 TargetLoweringBase::TargetLoweringBase(const TargetMachine &tm) : TM(tm) { in TargetLoweringBase() function in TargetLoweringBase
790 void TargetLoweringBase::initActions() { in initActions()
881 MVT TargetLoweringBase::getScalarShiftAmountTy(const DataLayout &DL, in getScalarShiftAmountTy()
886 EVT TargetLoweringBase::getShiftAmountTy(EVT LHSTy, in getShiftAmountTy()
896 bool TargetLoweringBase::canOpTrap(unsigned Op, EVT VT) const { in canOpTrap()
911 void TargetLoweringBase::setJumpIsExpensive(bool isExpensive) { in setJumpIsExpensive()
917 TargetLoweringBase::LegalizeKind
918 TargetLoweringBase::getTypeConversion(LLVMContext &Context, EVT VT) const { in getTypeConversion()
1053 TargetLoweringBase *TLI) { in getVectorTypeBreakdownMVT()
1099 bool TargetLoweringBase::isLegalRC(const TargetRegisterClass *RC) const { in isLegalRC()
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| HD | Analysis.cpp | 216 const TargetLoweringBase& TLI) { in isNoopBitcast()
236 const TargetLoweringBase &TLI, in getNoopInput()
335 const TargetLoweringBase &TLI, in slotOnlyDiscardsData()
530 const TargetLoweringBase &TLI) { in returnTypeIsEligibleForTailCall()
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| HD | AtomicExpandPass.cpp | 231 case TargetLoweringBase::AtomicRMWExpansionKind::None: in tryExpandAtomicRMW()
233 case TargetLoweringBase::AtomicRMWExpansionKind::LLSC: { in tryExpandAtomicRMW()
241 case TargetLoweringBase::AtomicRMWExpansionKind::CmpXChg: { in tryExpandAtomicRMW()
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| HD | StackProtector.cpp | 274 const TargetLoweringBase *TLI) { in FindPotentialTailCall()
332 const TargetLoweringBase *TLI, const Triple &TT, in CreatePrologue()
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| HD | MachineBlockPlacement.cpp | 202 const TargetLoweringBase *TLI;
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| HD | MachineLICM.cpp | 73 const TargetLoweringBase *TLI;
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| HD | IfConversion.cpp | 160 const TargetLoweringBase *TLI;
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| /NextBSD/contrib/llvm/include/llvm/Target/ |
| HD | TargetLowering.h | 79 class TargetLoweringBase {
80 TargetLoweringBase(const TargetLoweringBase&) = delete;
81 void operator=(const TargetLoweringBase&) = delete;
155 explicit TargetLoweringBase(const TargetMachine &TM);
156 virtual ~TargetLoweringBase() {} in ~TargetLoweringBase()
203 virtual TargetLoweringBase::LegalizeTypeAction
2026 class TargetLowering : public TargetLoweringBase {
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| /NextBSD/contrib/llvm/lib/Target/SystemZ/ |
| HD | SystemZISelLowering.h | 350 TargetLoweringBase::LegalizeTypeAction getPreferredVectorAction(EVT VT) in getPreferredVectorAction()
365 return TargetLoweringBase::getPreferredVectorAction(VT); in getPreferredVectorAction()
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| /NextBSD/lib/clang/libllvmcodegen/ |
| HD | Makefile | 122 TargetLoweringBase.cpp \
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| /NextBSD/contrib/llvm/lib/Target/AMDGPU/ |
| HD | SIISelLowering.h | 79 TargetLoweringBase::LegalizeTypeAction
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| HD | SIISelLowering.cpp | 414 TargetLoweringBase::LegalizeTypeAction
419 return TargetLoweringBase::getPreferredVectorAction(VT); in getPreferredVectorAction()
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| /NextBSD/contrib/llvm/lib/Target/AArch64/ |
| HD | AArch64ISelLowering.h | 362 TargetLoweringBase::AtomicRMWExpansionKind
366 TargetLoweringBase::LegalizeTypeAction
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| HD | AArch64ISelLowering.cpp | 9186 TargetLoweringBase::LegalizeTypeAction
9195 return TargetLoweringBase::getPreferredVectorAction(VT); in getPreferredVectorAction()
9215 TargetLoweringBase::AtomicRMWExpansionKind
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| /NextBSD/contrib/llvm/lib/Target/NVPTX/ |
| HD | NVPTXISelLowering.h | 507 TargetLoweringBase::LegalizeTypeAction
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| HD | NVPTXISelLowering.cpp | 876 TargetLoweringBase::LegalizeTypeAction
881 return TargetLoweringBase::getPreferredVectorAction(VT); in getPreferredVectorAction()
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| /NextBSD/contrib/llvm/lib/Target/ARM/ |
| HD | ARMISelLowering.h | 446 TargetLoweringBase::AtomicRMWExpansionKind
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| /NextBSD/contrib/llvm/lib/Target/X86/ |
| HD | X86ISelLowering.h | 1047 TargetLoweringBase::AtomicRMWExpansionKind
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| /NextBSD/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| HD | LegalizeIntegerTypes.cpp | 1668 TargetLoweringBase::BooleanContent BoolType = TLI.getBooleanContents(NVT); in ExpandIntRes_ADDSUB()
1682 case TargetLoweringBase::UndefinedBooleanContent: in ExpandIntRes_ADDSUB()
1685 case TargetLoweringBase::ZeroOrOneBooleanContent: in ExpandIntRes_ADDSUB()
1688 case TargetLoweringBase::ZeroOrNegativeOneBooleanContent: in ExpandIntRes_ADDSUB()
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| HD | TargetLowering.cpp | 40 : TargetLoweringBase(tm) {} in TargetLowering()
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| HD | SelectionDAGBuilder.cpp | 2301 while (TLI.getTypeAction(Ctx, VT) == TargetLoweringBase::TypeSplitVector) in visitSelect()
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