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Searched refs:SR (Results 1 – 25 of 127) sorted by relevance

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/NextBSD/contrib/llvm/lib/Target/MSP430/
HDMSP430InstrInfo.td114 // sub / add which can clobber SR.
115 let Defs = [SP, SR], Uses = [SP] in {
133 let Defs = [SR] in {
195 let Uses = [SR] in
210 let Defs = [R12, R13, R14, R15, SR],
340 let Defs = [SR] in {
348 (implicit SR)]>;
353 (implicit SR)]>;
360 (implicit SR)]>;
365 (implicit SR)]>;
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/NextBSD/contrib/llvm/lib/CodeGen/AsmPrinter/
HDDwarfExpression.cpp102 for (MCSuperRegIterator SR(MachineReg, &TRI); SR.isValid(); ++SR) { in AddMachineRegPiece() local
103 Reg = TRI.getDwarfRegNum(*SR, false); in AddMachineRegPiece()
105 unsigned Idx = TRI.getSubRegIndex(*SR, MachineReg); in AddMachineRegPiece()
135 for (MCSubRegIterator SR(MachineReg, &TRI); SR.isValid(); ++SR) { in AddMachineRegPiece() local
136 unsigned Idx = TRI.getSubRegIndex(MachineReg, *SR); in AddMachineRegPiece()
139 Reg = TRI.getDwarfRegNum(*SR, false); in AddMachineRegPiece()
/NextBSD/contrib/llvm/lib/CodeGen/
HDMachineCopyPropagation.cpp78 for (MCSubRegIterator SR(MappedDef, TRI); SR.isValid(); ++SR) in SourceNoLongerAvailable() local
79 AvailCopyMap.erase(*SR); in SourceNoLongerAvailable()
214 for (MCSubRegIterator SR(Def, TRI, /*IncludeSelf=*/true); SR.isValid(); in CopyPropagateBlock() local
215 ++SR) { in CopyPropagateBlock()
216 CopyMap[*SR] = MI; in CopyPropagateBlock()
217 AvailCopyMap[*SR] = MI; in CopyPropagateBlock()
HDLiveInterval.cpp878 for (const SubRange &SR : subranges()) { in constructMainRangeFromSubranges() local
879 if (SR.empty()) in constructMainRangeFromSubranges()
881 SRs.push_back(std::make_pair(&SR, SR.begin())); in constructMainRangeFromSubranges()
882 if (!First.isValid() || SR.segments.front().start < First) in constructMainRangeFromSubranges()
883 First = SR.segments.front().start; in constructMainRangeFromSubranges()
884 if (!Last.isValid() || SR.segments.back().end > Last) in constructMainRangeFromSubranges()
885 Last = SR.segments.back().end; in constructMainRangeFromSubranges()
909 const SubRange &SR = *SRP.first; in constructMainRangeFromSubranges() local
913 while (I != SR.end() && in constructMainRangeFromSubranges()
915 (I->end == Pos && (ActiveMask & SR.LaneMask) == 0))) in constructMainRangeFromSubranges()
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HDDeadMachineInstructionElim.cpp150 for (MCSubRegIterator SR(Reg, TRI,/*IncludeSelf=*/true); in runOnMachineFunction() local
151 SR.isValid(); ++SR) in runOnMachineFunction()
152 LivePhysRegs.reset(*SR); in runOnMachineFunction()
HDVirtRegMap.cpp261 for (MCSubRegIndexIterator SR(PhysReg, TRI); SR.isValid(); ++SR) { in addMBBLiveIns() local
262 unsigned SubReg = SR.getSubReg(); in addMBBLiveIns()
263 unsigned SubRegIndex = SR.getSubRegIndex(); in addMBBLiveIns()
310 for (const LiveInterval::SubRange &SR : LI.subranges()) { in readsUndefSubreg() local
311 if ((SR.LaneMask & UseMask) != 0 && SR.liveAt(BaseIndex)) in readsUndefSubreg()
HDLiveIntervalAnalysis.cpp498 void LiveIntervals::shrinkToUses(LiveInterval::SubRange &SR, unsigned Reg) in shrinkToUses() argument
500 DEBUG(dbgs() << "Shrink: " << SR << '\n'); in shrinkToUses()
516 if ((SubRegMask & SR.LaneMask) == 0) in shrinkToUses()
525 LiveQueryResult LRQ = SR.Query(Idx); in shrinkToUses()
542 createSegmentsForValues(NewLR, make_range(SR.vni_begin(), SR.vni_end())); in shrinkToUses()
543 extendSegmentsToUses(NewLR, *Indexes, WorkList, SR); in shrinkToUses()
546 SR.segments.swap(NewLR.segments); in shrinkToUses()
549 for (auto VNI : SR.valnos) { in shrinkToUses()
552 const LiveRange::Segment *Segment = SR.getSegmentContaining(VNI->def); in shrinkToUses()
559 SR.removeSegment(*Segment); in shrinkToUses()
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HDRegisterScavenging.cpp221 for (MCSuperRegIterator SR(Reg, TRI); SR.isValid(); ++SR) { in forward() local
222 if (isRegUsed(*SR)) { in forward()
/NextBSD/contrib/llvm/lib/Target/Hexagon/
HDHexagonFrameLowering.cpp1025 for (MCSubRegIterator SR(R, TRI, true); SR.isValid(); ++SR) in assignCalleeSavedSpillSlots() local
1026 SRegs[*SR] = true; in assignCalleeSavedSpillSlots()
1036 for (MCSuperRegIterator SR(R, TRI, true); SR.isValid(); ++SR) in assignCalleeSavedSpillSlots() local
1037 SRegs[*SR] = false; in assignCalleeSavedSpillSlots()
1049 for (MCSuperRegIterator SR(R, TRI); SR.isValid(); ++SR) in assignCalleeSavedSpillSlots() local
1050 TmpSup[*SR] = true; in assignCalleeSavedSpillSlots()
1054 for (MCSubRegIterator SR(R, TRI, true); SR.isValid(); ++SR) { in assignCalleeSavedSpillSlots() local
1055 if (!Reserved[*SR]) in assignCalleeSavedSpillSlots()
1071 for (MCSuperRegIterator SR(R, TRI); SR.isValid(); ++SR) { in assignCalleeSavedSpillSlots() local
1072 if (!SRegs[*SR]) in assignCalleeSavedSpillSlots()
HDHexagonGenExtract.cpp152 uint32_t SR = CSR->getZExtValue(); in INITIALIZE_PASS_DEPENDENCY() local
159 if (!LogicalSR && (SR > SL)) in INITIALIZE_PASS_DEPENDENCY()
161 APInt A = APInt(BW, ~0ULL).lshr(SR).shl(SL); in INITIALIZE_PASS_DEPENDENCY()
172 uint32_t U = BW - std::max(SL, SR); in INITIALIZE_PASS_DEPENDENCY()
203 Value *NewIn = IRB.CreateCall(ExtF, {BF, IRB.getInt32(W), IRB.getInt32(SR)}); in INITIALIZE_PASS_DEPENDENCY()
HDHexagonGenPredicate.cpp458 Register SR = I->getOperand(1); in eliminatePredCopies() local
461 if (!TargetRegisterInfo::isVirtualRegister(SR.R)) in eliminatePredCopies()
465 if (MRI->getRegClass(SR.R) != PredRC) in eliminatePredCopies()
467 assert(!DR.S && !SR.S && "Unexpected subregister"); in eliminatePredCopies()
468 MRI->replaceRegWith(DR.R, SR.R); in eliminatePredCopies()
/NextBSD/contrib/llvm/tools/clang/lib/StaticAnalyzer/Checkers/
HDTestAfterDivZeroChecker.cpp149 SymbolRef SR = Var.getAsSymbol(); in setDivZeroMap() local
150 if (!SR) in setDivZeroMap()
155 State->add<DivZeroMap>(ZeroState(SR, C.getBlockID(), C.getStackFrame())); in setDivZeroMap()
161 SymbolRef SR = Var.getAsSymbol(); in hasDivZeroMap() local
162 if (!SR) in hasDivZeroMap()
165 ZeroState ZS(SR, C.getBlockID(), C.getStackFrame()); in hasDivZeroMap()
HDUnreachableCodeChecker.cpp150 SourceRange SR; in checkEndAnalysis() local
154 SR = S->getSourceRange(); in checkEndAnalysis()
157 if (SR.isInvalid() || !SL.isValid()) in checkEndAnalysis()
169 "This statement is never executed", DL, SR); in checkEndAnalysis()
HDCastSizeChecker.cpp111 const SymbolicRegion *SR = dyn_cast<SymbolicRegion>(R); in checkPreStmt() local
112 if (!SR) in checkPreStmt()
116 SVal extent = SR->getExtent(svalBuilder); in checkPreStmt()
HDCheckerDocumentation.cpp155 void checkDeadSymbols(SymbolReaper &SR, CheckerContext &C) const {} in checkDeadSymbols() argument
216 void checkLiveSymbols(ProgramStateRef State, SymbolReaper &SR) const {} in checkLiveSymbols()
/NextBSD/contrib/llvm/tools/clang/lib/StaticAnalyzer/Core/
HDProgramState.cpp594 if (const SymbolicRegion *SR = dyn_cast<SymbolicRegion>(R)) in scan() local
595 if (!visitor.VisitSymbol(SR->getSymbol())) in scan()
599 if (const SubRegion *SR = dyn_cast<SubRegion>(R)) { in scan() local
600 const MemRegion *Super = SR->getSuperRegion(); in scan()
607 if (!StoreMgr.scanReachableSymbols(state->getStore(), SR, *this)) in scan()
670 if (const SymbolicRegion *SR = dyn_cast_or_null<SymbolicRegion>(R)) in addTaint() local
671 return addTaint(SR->getSymbol(), Kind); in addTaint()
713 if (const SymbolicRegion *SR = dyn_cast<SymbolicRegion>(Reg)) in isTainted() local
714 return isTainted(SR->getSymbol(), K); in isTainted()
773 if (const SymbolicRegion *SR = dyn_cast<SymbolicRegion>(Reg)) { in REGISTER_TRAIT_WITH_PROGRAMSTATE() local
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HDSVals.cpp41 if (const SymbolicRegion *SR = dyn_cast<SymbolicRegion>(R)) { in hasConjuredSymbol() local
42 SymbolRef sym = SR->getSymbol(); in hasConjuredSymbol()
93 while (const SubRegion *SR = dyn_cast<SubRegion>(R)) { in getLocSymbolInBase() local
94 if (const SymbolicRegion *SymR = dyn_cast<SymbolicRegion>(SR)) in getLocSymbolInBase()
97 R = SR->getSuperRegion(); in getLocSymbolInBase()
HDRegionStore.cpp422 const SubRegion *SR = cast<SubRegion>(R); in BindDefault() local
423 assert(SR->getAsOffset().getOffset() == in BindDefault()
424 SR->getSuperRegion()->getAsOffset().getOffset() && in BindDefault()
426 B = removeSubRegionBindings(B, SR); in BindDefault()
1037 if (const SymbolicRegion *SR = dyn_cast<SymbolicRegion>(baseR)) in VisitCluster() local
1038 IS.insert(SR->getSymbol()); in VisitCluster()
1283 const SymbolicRegion *SR = cast<SymbolicRegion>(MR); in getBinding() local
1284 T = SR->getSymbol()->getType(); in getBinding()
1384 if (const SymbolicRegion *SR = dyn_cast<SymbolicRegion>(R)) in getUnderlyingType() local
1385 RegionTy = SR->getSymbol()->getType(); in getUnderlyingType()
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/NextBSD/contrib/llvm/utils/TableGen/
HDCodeGenRegisters.cpp206 CodeGenRegister *SR = I->second; in inheritRegUnits() local
208 changed |= (RegUnits |= SR->RegUnits); in inheritRegUnits()
225 CodeGenRegister *SR = ExplicitSubRegs[i]; in computeSubRegs() local
227 if (!SubRegs.insert(std::make_pair(Idx, SR)).second) in computeSubRegs()
232 SubReg2Idx.insert(std::make_pair(SR, Idx)); in computeSubRegs()
241 CodeGenRegister *SR = ExplicitSubRegs[i]; in computeSubRegs() local
242 const SubRegMap &Map = SR->computeSubRegs(RegBank); in computeSubRegs()
243 HasDisjunctSubRegs |= SR->HasDisjunctSubRegs; in computeSubRegs()
260 CodeGenRegister *SR = SubRegs[Idx]; in computeSubRegs() local
261 const SubRegMap &Map = SR->computeSubRegs(RegBank); in computeSubRegs()
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/NextBSD/contrib/llvm/tools/clang/include/clang/AST/
HDRawCommentList.h43 RawComment(const SourceManager &SourceMgr, SourceRange SR,
147 RawComment(SourceRange SR, CommentKind K, bool IsTrailingComment, in RawComment() argument
150 Range(SR), RawTextValid(false), BriefTextValid(false), Kind(K), in RawComment()
/NextBSD/contrib/llvm/tools/clang/lib/AST/
HDRawCommentList.cpp67 RawComment::RawComment(const SourceManager &SourceMgr, SourceRange SR, in RawComment() argument
69 Range(SR), RawTextValid(false), BriefTextValid(false), in RawComment()
73 if (SR.getBegin() == SR.getEnd() || getRawText(SourceMgr).empty()) { in RawComment()
/NextBSD/contrib/llvm/lib/Transforms/Scalar/
HDInductiveRangeCheckElimination.cpp1186 SubRanges SR = MaybeSR.getValue(); in run() local
1199 Increasing ? SR.LowLimit.hasValue() : SR.HighLimit.hasValue(); in run()
1201 Increasing ? SR.HighLimit.hasValue() : SR.LowLimit.hasValue(); in run()
1212 ExitPreLoopAtSCEV = *SR.LowLimit; in run()
1214 if (CanBeSMin(SE, *SR.HighLimit)) { in run()
1216 << "preloop exit limit. HighLimit = " << *(*SR.HighLimit) in run()
1220 ExitPreLoopAtSCEV = SE.getAddExpr(*SR.HighLimit, MinusOneS); in run()
1231 ExitMainLoopAtSCEV = *SR.HighLimit; in run()
1233 if (CanBeSMin(SE, *SR.LowLimit)) { in run()
1235 << "mainloop exit limit. LowLimit = " << *(*SR.LowLimit) in run()
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/NextBSD/sys/mips/mips/
HDexception.S314 SAVE_REG(a0, SR, sp) ;\
333 RESTORE_REG(k0, SR, sp) ;\
404 RESTORE_REG(a1, SR, sp)
407 SAVE_REG(a1, SR, sp)
476 SAVE_U_PCB_REG(a0, SR, k1)
524 RESTORE_U_PCB_REG(a1, SR, k1)
527 SAVE_U_PCB_REG(a1, SR, k1)
561 RESTORE_U_PCB_REG(k0, SR, k1)
655 RESTORE_REG(a1, SR, sp)
658 SAVE_REG(a1, SR, sp)
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/NextBSD/sys/mips/include/
HDregnum.h93 #define SR 32 macro
94 #define PS SR /* alias for SR */
/NextBSD/contrib/ee/
HDnew_curse.c1497 Ntemp->SR = start_l;
2093 …columns=%d, lines=%d, SC=%d, SR=%d\n",window->Num_cols, window->Num_lines, window->SC, window->SR);
2148 if (window->SR >= virtual_scr->Num_lines)
2154 virtual_scr->LY = window->LY + window->SR;
2159 for (line_counter = 0; line_counter < window->SR; line_counter++)
2164 && ((line_counter + window->SR) < virtual_scr->Num_lines);
2981 for (i = 0, tmp = curscr->first_line; i < window->SR; i++)
2983 if ((end_row + window->SR) == 0)
3001 for (i = 0, tmp = curscr->first_line; (tmp->next_screen != NULL) && (i < window->SR); i++)
3011 if ((row + window->SR) == 0)
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