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Searched refs:SLL (Results 1 – 19 of 19) sorted by relevance

/NextBSD/crypto/openssl/crypto/sha/asm/
HDsha512-mips.pl87 $SLL="dsll"; # shift left logical
102 $SLL="sll"; # shift left logical
199 $SLL $tmp1,$e,`$SZ*8-@Sigma1[2]`
203 $SLL $tmp1,$e,`$SZ*8-@Sigma1[1]`
207 $SLL $tmp1,$e,`$SZ*8-@Sigma1[0]`
215 $SLL $tmp1,$a,`$SZ*8-@Sigma0[2]`
219 $SLL $tmp1,$a,`$SZ*8-@Sigma0[1]`
223 $SLL $tmp1,$a,`$SZ*8-@Sigma0[0]`
263 $SLL $tmp1,@X[1],`$SZ*8-@sigma0[2]`
266 $SLL $tmp1,`@sigma0[2]-@sigma0[1]`
[all …]
HDsha512-sparcv9.pl60 $SLL="sllx"; # shift left logical
86 $SLL="sll"; # shift left logical
227 $SLL $e,`$SZ*8-@Sigma1[2]`,$tmp1
231 $SLL $e,`$SZ*8-@Sigma1[1]`,$tmp1
235 $SLL $e,`$SZ*8-@Sigma1[0]`,$tmp1
243 $SLL $a,`$SZ*8-@Sigma0[2]`,$tmp1
247 $SLL $a,`$SZ*8-@Sigma0[1]`,$tmp1
251 $SLL $a,`$SZ*8-@Sigma0[0]`,$tmp1
/NextBSD/contrib/llvm/lib/Target/Mips/
HDMipsAnalyzeImmediate.cpp45 AddInstr(SeqLs, Inst(SLL, Shamt)); in GetInstSeqLsSLL()
90 (Seq[1].Opc != SLL) || (Seq[1].ImmOpnd < 16)) in ReplaceADDiuSLLWithLUi()
133 SLL = Mips::SLL; in Analyze()
138 SLL = Mips::DSLL; in Analyze()
HDMipsAnalyzeImmediate.h58 unsigned ADDiu, ORi, SLL, LUi; variable
HDMipsFastISel.cpp1361 emitInst(Mips::SLL, TempReg[0]).addReg(SrcReg).addImm(8); in fastLowerIntrinsicCall()
1389 emitInst(Mips::SLL, TempReg[5]).addReg(TempReg[4]).addImm(8); in fastLowerIntrinsicCall()
1391 emitInst(Mips::SLL, TempReg[6]).addReg(SrcReg).addImm(24); in fastLowerIntrinsicCall()
1579 emitInst(Mips::SLL, TempReg).addReg(SrcReg).addImm(ShiftAmt); in emitIntSExt32r1()
1728 Opcode = Mips::SLL; in selectShift()
HDMipsISelLowering.cpp1162 BuildMI(BB, DL, TII->get(Mips::SLL), ScrReg).addReg(SrcReg).addImm(ShiftImm); in emitSignExtendToI32InReg()
1240 BuildMI(BB, DL, TII->get(Mips::SLL), ShiftAmt).addReg(PtrLSB2).addImm(3); in emitAtomicBinaryPartword()
1245 BuildMI(BB, DL, TII->get(Mips::SLL), ShiftAmt).addReg(Off).addImm(3); in emitAtomicBinaryPartword()
1482 BuildMI(BB, DL, TII->get(Mips::SLL), ShiftAmt).addReg(PtrLSB2).addImm(3); in emitAtomicCmpSwapPartword()
1487 BuildMI(BB, DL, TII->get(Mips::SLL), ShiftAmt).addReg(Off).addImm(3); in emitAtomicCmpSwapPartword()
2227 SDValue SLL = DAG.getNode(ISD::SHL, DL, MVT::i64, LWR, Const32); in lowerLOAD() local
2228 SDValue SRL = DAG.getNode(ISD::SRL, DL, MVT::i64, SLL, Const32); in lowerLOAD()
HDMipsInstrFormats.td897 let Inst{5-0} = 0; // SLL
HDMipsInstrInfo.td1188 def SLL : MMRel, shift_rotate_imm<"sll", uimm5, GPR32Opnd, II_SLL, shl,
1448 def NOP : PseudoSE<(outs), (ins), []>, PseudoInstExpansion<(SLL ZERO, ZERO, 0)>;
1615 def : MipsInstAlias<"nop", (SLL ZERO, ZERO, 0), 1>;
HDMips64InstrInfo.td501 (SLL (EXTRACT_SUBREG GPR64:$src, sub_32), 0)>;
HDMips16InstrInfo.td1148 // Format: SLL rx, ry, sa MIPS16e
HDMipsSEISelLowering.cpp3251 BuildMI(*BB, MI, DL, TII->get(Mips::SLL), LaneTmp1) in emitINSERT_DF_VIDX()
/NextBSD/crypto/openssl/crypto/bn/asm/
HDmips.pl63 $SLL="dsll";
78 $SLL="sll";
890 $SLL $a2,1
897 $SLL $t2,$t1
905 $SLL $a0,$t9
906 $SLL $a1,$t9
930 $SLL $t3,$a0,4*$BNSZ # bits
951 $SLL $a1,4*$BNSZ # bits
953 $SLL $v0,$QT,4*$BNSZ # bits
963 $SLL $t3,$a0,4*$BNSZ # bits
[all …]
/NextBSD/contrib/llvm/lib/Target/Mips/MCTargetDesc/
HDMipsMCCodeEmitter.cpp179 if ((Opcode != Mips::NOP) && (Opcode != Mips::SLL) && in encodeInstruction()
/NextBSD/contrib/llvm/lib/Target/BPF/
HDBPFInstrInfo.td189 defm SLL : ALU<0x6, "sll", shl>;
/NextBSD/contrib/llvm/tools/clang/lib/Sema/
HDSemaOverload.cpp7105 Flt, Dbl, LDbl, SI, SL, SLL, S128, UI, UL, ULL, U128 in getUsualArithmeticConversions() enumerator
7112 /* SI*/ { Flt, Dbl, LDbl, SI, SL, SLL, S128, UI, UL, ULL, U128 }, in getUsualArithmeticConversions()
7113 /* SL*/ { Flt, Dbl, LDbl, SL, SL, SLL, S128, Dep, UL, ULL, U128 }, in getUsualArithmeticConversions()
7114 /* SLL*/ { Flt, Dbl, LDbl, SLL, SLL, SLL, S128, Dep, Dep, ULL, U128 }, in getUsualArithmeticConversions()
7142 assert(L == SLL || R == SLL); in getUsualArithmeticConversions()
/NextBSD/contrib/llvm/lib/Target/Mips/AsmParser/
HDMipsAsmParser.cpp1825 NopInst.setOpcode(Mips::SLL); in expandJalWithRegs()
2608 TmpInst.setOpcode(Mips::SLL); in expandUlhu()
2705 NopInst.setOpcode(Mips::SLL); in createNop()
/NextBSD/contrib/llvm/lib/Target/Sparc/
HDSparcInstrInfo.td505 defm SLL : F3_12<"sll", 0b100101, shl, IntRegs, i32, simm13Op>;
/NextBSD/contrib/llvm/lib/Target/SystemZ/
HDSystemZInstrInfo.td1032 defm SLL : BinaryRSAndK<"sll", 0x89, 0xEBDF, shl, GR32>;
/NextBSD/contrib/ncurses/misc/
HDterminfo.src18755 # SLL status line lock ^[O
20983 # SLL Set Line Limit * \E [ Pn SPC V - - -