Searched refs:RegisterMask (Results 1 – 8 of 8) sorted by relevance
| /NextBSD/contrib/llvm/tools/llvm-readobj/ |
| HD | ARMWinEHPrinter.cpp | 148 void Decoder::printRegisters(const std::pair<uint16_t, uint32_t> &RegisterMask) { in printRegisters() argument 154 const uint16_t GPRMask = std::get<0>(RegisterMask); in printRegisters() 155 const uint16_t VFPMask = std::get<1>(RegisterMask); in printRegisters() 238 uint16_t RegisterMask = (Link << (Prologue ? 14 : 15)) in opcode_10Lxxxxx() local 241 assert((~RegisterMask & (1 << 13)) && "sp must not be set"); in opcode_10Lxxxxx() 242 assert((~RegisterMask & (1 << (Prologue ? 15 : 14))) && "pc must not be set"); in opcode_10Lxxxxx() 247 printRegisters(std::make_pair(RegisterMask, 0)); in opcode_10Lxxxxx()
|
| HD | ARMWinEHPrinter.h | 81 void printRegisters(const std::pair<uint16_t, uint32_t> &RegisterMask);
|
| /NextBSD/contrib/llvm/include/llvm/CodeGen/ |
| HD | ISDOpcodes.h | 60 BasicBlock, VALUETYPE, CONDCODE, Register, RegisterMask, enumerator
|
| HD | SelectionDAGNodes.h | 1762 : SDNode(ISD::RegisterMask, 0, DebugLoc(), getSDVTList(MVT::Untyped)), 1769 return N->getOpcode() == ISD::RegisterMask;
|
| /NextBSD/contrib/llvm/projects/libunwind/src/ |
| HD | Unwind-EHABI.cpp | 191 uint32_t RegisterMask(uint8_t start, uint8_t count_minus_one) { in RegisterMask() function 292 uint32_t registers = RegisterMask(4, byte & 0x07); in _Unwind_VRS_Interpret()
|
| /NextBSD/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| HD | SelectionDAGDumper.cpp | 85 case ISD::RegisterMask: return "RegisterMask"; in getOperationName()
|
| HD | SelectionDAGISel.cpp | 2564 case ISD::RegisterMask: in SelectCodeCommon()
|
| HD | SelectionDAG.cpp | 464 case ISD::RegisterMask: in AddNodeIDCustom() 1735 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), None); in getRegisterMask()
|