Searched refs:RegMap (Results 1 – 5 of 5) sorted by relevance
| /NextBSD/contrib/llvm/lib/Target/X86/ |
| HD | X86FloatingPoint.cpp | 66 memset(RegMap, 0, sizeof(RegMap)); in FPS()
153 unsigned RegMap[NumFPRegs]; member
166 assert(RegMap[Stack[i]] == i && "Stack[] doesn't match RegMap[]!"); in dumpStack()
175 return RegMap[RegNo]; in getSlot()
203 RegMap[Reg] = StackTop++; in pushReg()
215 std::swap(RegMap[RegNo], RegMap[RegOnTop]); in moveToTop()
218 if (RegMap[RegOnTop] >= StackTop) in moveToTop()
220 std::swap(Stack[RegMap[RegOnTop]], Stack[StackTop-1]); in moveToTop()
797 RegMap[Stack[--StackTop]] = ~0; // Update state in popStackAfter()
834 RegMap[TopReg] = OldSlot; in freeStackSlotBefore()
[all …]
|
| /NextBSD/contrib/llvm/lib/Target/NVPTX/ |
| HD | NVPTXAsmPrinter.cpp | 303 DenseMap<unsigned, unsigned> &RegMap = VRegMapping[RC]; in encodeVirtualRegister() local
304 unsigned RegNum = RegMap[Reg]; in encodeVirtualRegister()
570 const DenseMap<unsigned, unsigned> &RegMap = I->second; in getVirtualRegisterName() local
572 VRegMap::const_iterator VI = RegMap.find(Reg); in getVirtualRegisterName()
573 assert(VI != RegMap.end() && "Bad virtual register"); in getVirtualRegisterName()
|
| /NextBSD/contrib/llvm/lib/Target/Hexagon/ |
| HD | HexagonGenInsert.cpp | 1370 UnsignedMap RegMap; in generateInserts() local
1375 RegMap[VR] = NewVR; in generateInserts()
1385 unsigned NewR = RegMap[I->first]; in generateInserts()
1417 MRI->replaceRegWith(I->first, RegMap[I->first]); in generateInserts()
|
| /NextBSD/contrib/llvm/lib/CodeGen/ |
| HD | MachineVerifier.cpp | 76 typedef DenseMap<unsigned, const MachineInstr*> RegMap; typedef
104 RegMap vregsLiveIn;
166 bool addRequired(const RegMap &RM) { in addRequired()
168 for (RegMap::const_iterator I = RM.begin(), E = RM.end(); I != E; ++I) in addRequired()
|
| HD | TwoAddressInstructionPass.cpp | 522 getMappedReg(unsigned Reg, DenseMap<unsigned, unsigned> &RegMap) { in getMappedReg() argument
524 DenseMap<unsigned, unsigned>::iterator SI = RegMap.find(Reg); in getMappedReg()
525 if (SI == RegMap.end()) in getMappedReg()
|