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Searched refs:RADEON_MM_INDEX (Results 1 – 6 of 6) sorted by relevance

/NextBSD/sys/dev/drm2/radeon/
HDradeon_cursor.c101 WREG32(RADEON_MM_INDEX, EVERGREEN_CUR_CONTROL + radeon_crtc->crtc_offset); in radeon_show_cursor()
106 WREG32(RADEON_MM_INDEX, AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset); in radeon_show_cursor()
112 WREG32(RADEON_MM_INDEX, RADEON_CRTC_GEN_CNTL); in radeon_show_cursor()
115 WREG32(RADEON_MM_INDEX, RADEON_CRTC2_GEN_CNTL); in radeon_show_cursor()
HDradeon_drv.h489 #define RADEON_MM_INDEX 0x0000 macro
1860 DRM_WRITE32(dev_priv->mmio, RADEON_MM_INDEX, (reg)); \
HDr100.c4197 bus_write_4(rdev->rmmio, RADEON_MM_INDEX, reg); in r100_mm_rreg()
4214 bus_write_4(rdev->rmmio, RADEON_MM_INDEX, reg); in r100_mm_wreg()
4226 bus_write_4(rdev->rio_mem, RADEON_MM_INDEX, reg); in r100_io_rreg()
4237 bus_write_4(rdev->rio_mem, RADEON_MM_INDEX, reg); in r100_io_wreg()
HDradeon_reg.h1232 #define RADEON_MM_INDEX 0x0000 macro
/NextBSD/sys/dev/drm/
HDradeon_drv.h567 #define RADEON_MM_INDEX 0x0000 macro
1831 DRM_WRITE32(dev_priv->mmio, RADEON_MM_INDEX, (reg)); \
HDradeon_cp.c113 DRM_WRITE32(dev_priv->mmio, RADEON_MM_INDEX, addr); in RADEON_READ_MM()