1 /*-
2 * Copyright (c) 1997 by Simon Shapiro
3 * All Rights Reserved
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions, and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 * $FreeBSD$
30 */
31
32 /*
33 *
34 * dpt.h: Definitions and constants used by the SCSI side of the DPT
35 *
36 * credits: Mike Neuffer; DPT low level code and in other areas as well.
37 * Mark Salyzyn; Many vital bits of info and diagnostics.
38 * Justin Gibbs; FreeBSD API, debugging and style
39 * Ron McDaniels; SCSI Software Interrupts
40 * FreeBSD.ORG; Great O/S to work on and for.
41 */
42
43 #ifndef _DPT_H
44 #define _DPT_H
45
46 #include <sys/ioccom.h>
47
48
49 #undef DPT_USE_DLM_SWI
50
51 #define DPT_RELEASE 1
52 #define DPT_VERSION 4
53 #define DPT_PATCH 5
54 #define DPT_MONTH 8
55 #define DPT_DAY 3
56 #define DPT_YEAR 18 /* 1998 - 1980 */
57
58 #define DPT_CTL_RELEASE 1
59 #define DPT_CTL_VERSION 0
60 #define DPT_CTL_PATCH 6
61
62 #ifndef PAGESIZ
63 #define PAGESIZ 4096
64 #endif
65
66 #ifndef physaddr
67 typedef void *physaddr;
68 #endif
69
70 #undef DPT_INQUIRE_DEVICES /* We have no buyers for this function */
71 #define DPT_SUPPORT_POLLING /* Use polled mode at boot (must be ON!) */
72 #define DPT_OPENNINGS 8 /* Commands-in-progress per device */
73
74 #define DPT_RETRIES 5 /* Times to retry failed commands */
75 #undef DPT_DISABLE_SG
76 #define DPT_HAS_OPEN
77
78 /* Arguments to dpt_run_queue() can be: */
79
80 #define DPT_MAX_TARGET_MODE_BUFFER_SIZE 8192
81 #define DPT_FREE_LIST_INCREMENT 64
82 #define DPT_CMD_LEN 12
83
84 /*
85 * How many segments do we want in a Scatter/Gather list?
86 * Some HBA's can do 16, Some 8192. Since we pre-allocate
87 * them in fixed increments, we need to put a practical limit on
88 * these. A passed parameter (from kernel boot or lkm) would help
89 */
90 #define DPT_MAX_SEGS 32
91
92 /* Debug levels */
93
94 #undef DPT_DEBUG_PCI
95 #undef DPT_DEBUG_INIT
96 #undef DPT_DEBUG_SETUP
97 #undef DPT_DEBUG_STATES
98 #undef DPT_DEBUG_CONFIG
99 #undef DPT_DEBUG_QUEUES
100 #undef DPT_DEBUG_SCSI_CMD
101 #undef DPT_DEBUG_SOFTINTR
102 #undef DPT_DEBUG_HARDINTR
103 #undef DPT_DEBUG_HEX_DUMPS
104 #undef DPT_DEBUG_POLLING
105 #undef DPT_DEBUG_INQUIRE
106 #undef DPT_DEBUG_COMPLETION
107 #undef DPT_DEBUG_COMPLETION_ERRORS
108 #define DPT_DEBUG_MINPHYS
109 #undef DPT_DEBUG_SG
110 #undef DPT_DEBUG_SG_SHOW_DATA
111 #undef DPT_DEBUG_SCSI_CMD_NAME
112 #undef DPT_DEBUG_CONTROL
113 #undef DPT_DEBUG_TIMEOUTS
114 #undef DPT_DEBUG_SHUTDOWN
115 #define DPT_DEBUG_USER_CMD
116
117 /*
118 * Misc. definitions
119 */
120 #undef TRUE
121 #undef FALSE
122 #define TRUE 1
123 #define FALSE 0
124
125 #define MAX_CHANNELS 3
126 #define MAX_TARGETS 16
127 #define MAX_LUNS 8
128
129 /* Map minor numbers to device identity */
130 #define TARGET_MASK 0x000f
131 #define BUS_MASK 0x0030
132 #define HBA_MASK 0x01c0
133 #define LUN_MASK 0x0e00
134
135 #define minor2target(minor) ( minor & TARGET_MASK )
136 #define minor2bus(minor) ( (minor & BUS_MASK) >> 4 )
137 #define minor2hba(minor) ( (minor & HBA_MASK) >> 6 )
138 #define minor2lun(minor) ( (minor & LUN_MASK) >> 9 )
139
140 /*
141 * Valid values for cache_type
142 */
143 #define DPT_NO_CACHE 0
144 #define DPT_CACHE_WRITETHROUGH 1
145 #define DPT_CACHE_WRITEBACK 2
146
147 #define min(a,b) ((a<b)?(a):(b))
148
149 #define MAXISA 4
150 #define MAXEISA 16
151 #define MAXPCI 16
152 #define MAXIRQ 16
153 #define MAXTARGET 16
154
155 #define IS_ISA 'I'
156 #define IS_EISA 'E'
157 #define IS_PCI 'P'
158
159 #define BROKEN_INQUIRY 1
160
161 #define BUSMASTER 0xff
162 #define PIO 0xfe
163
164 #define EATA_SIGNATURE 0x41544145 /* little ENDIAN "EATA" */
165 #define DPT_BLINK_INDICATOR 0x42445054
166
167 #define DPT_ID1 0x12
168 #define DPT_ID2 0x1
169 #define ATT_ID1 0x06
170 #define ATT_ID2 0x94
171 #define ATT_ID3 0x0
172
173 #define NEC_ID1 0x38
174 #define NEC_ID2 0xa3
175 #define NEC_ID3 0x82
176
177 #define MAX_PCI_DEVICES 32 /* Maximum # Of Devices Per Bus */
178 #define MAX_METHOD_2 16 /* Max Devices For Method 2 */
179 #define MAX_PCI_BUS 16 /* Maximum # Of Busses Allowed */
180
181 #define DPT_MAX_RETRIES 2
182
183 #define READ 0
184 #define WRITE 1
185 #define OTHER 2
186
187 #define HD(cmd) ((hostdata *)&(cmd->host->hostdata))
188 #define CD(cmd) ((struct eata_ccb *)(cmd->host_scribble))
189 #define SD(host) ((hostdata *)&(host->hostdata))
190
191 /*
192 * EATA Command & Register definitions
193 */
194
195 #define PCI_REG_DPTconfig 0x40
196 #define PCI_REG_PumpModeAddress 0x44
197 #define PCI_REG_PumpModeData 0x48
198 #define PCI_REG_ConfigParam1 0x50
199 #define PCI_REG_ConfigParam2 0x54
200
201 #define EATA_CMD_PIO_SETUPTEST 0xc6
202 #define EATA_CMD_PIO_READ_CONFIG 0xf0
203 #define EATA_CMD_PIO_SET_CONFIG 0xf1
204 #define EATA_CMD_PIO_SEND_CP 0xf2
205 #define EATA_CMD_PIO_RECEIVE_SP 0xf3
206 #define EATA_CMD_PIO_TRUNC 0xf4
207
208 #define EATA_CMD_RESET 0xf9
209 #define EATA_COLD_BOOT 0x06 /* Last resort only! */
210
211 #define EATA_CMD_IMMEDIATE 0xfa
212
213 #define EATA_CMD_DMA_READ_CONFIG 0xfd
214 #define EATA_CMD_DMA_SET_CONFIG 0xfe
215 #define EATA_CMD_DMA_SEND_CP 0xff
216
217 #define ECS_EMULATE_SENSE 0xd4
218
219 /*
220 * Immediate Commands
221 * Beware of this enumeration. Not all commands are in sequence!
222 */
223
224 enum dpt_immediate_cmd {
225 EATA_GENERIC_ABORT,
226 EATA_SPECIFIC_RESET,
227 EATA_BUS_RESET,
228 EATA_SPECIFIC_ABORT,
229 EATA_QUIET_INTR,
230 EATA_SMART_ROM_DL_EN,
231 EATA_COLD_BOOT_HBA, /* Only as a last resort */
232 EATA_FORCE_IO,
233 EATA_SCSI_BUS_OFFLINE,
234 EATA_RESET_MASKED_BUS,
235 EATA_POWER_OFF_WARN
236 };
237
238 #define HA_CTRLREG 0x206 /* control register for HBA */
239 #define HA_CTRL_DISINT 0x02 /* CTRLREG: disable interrupts */
240 #define HA_CTRL_RESCPU 0x04 /* CTRLREG: reset processo */
241 #define HA_CTRL_8HEADS 0x08 /*
242 * CTRLREG: set for drives with
243 * >=8 heads
244 * (WD1003 rudimentary :-)
245 */
246
247 #define HA_WCOMMAND 0x07 /* command register offset */
248 #define HA_WIFC 0x06 /* immediate command offset */
249 #define HA_WCODE 0x05
250 #define HA_WCODE2 0x04
251 #define HA_WDMAADDR 0x02 /* DMA address LSB offset */
252 #define HA_RERROR 0x01 /* Error Register, offset 1 from base */
253 #define HA_RAUXSTAT 0x08 /* aux status register offset */
254 #define HA_RSTATUS 0x07 /* status register offset */
255 #define HA_RDATA 0x00 /* data register (16bit) */
256 #define HA_WDATA 0x00 /* data register (16bit) */
257
258 #define HA_ABUSY 0x01 /* aux busy bit */
259 #define HA_AIRQ 0x02 /* aux IRQ pending bit */
260 #define HA_SERROR 0x01 /* pr. command ended in error */
261 #define HA_SMORE 0x02 /* more data soon to come */
262 #define HA_SCORR 0x04 /* datio_addra corrected */
263 #define HA_SDRQ 0x08 /* data request active */
264 #define HA_SSC 0x10 /* seek complete */
265 #define HA_SFAULT 0x20 /* write fault */
266 #define HA_SREADY 0x40 /* drive ready */
267 #define HA_SBUSY 0x80 /* drive busy */
268 #define HA_SDRDY (HA_SSC|HA_SREADY|HA_SDRQ)
269
270 /*
271 * Message definitions
272 */
273
274 enum dpt_message {
275 HA_NO_ERROR, /* No Error */
276 HA_ERR_SEL_TO, /* Selection Timeout */
277 HA_ERR_CMD_TO, /* Command Timeout */
278 HA_SCSIBUS_RESET,
279 HA_HBA_POWER_UP, /* Initial Controller Power-up */
280 HA_UNX_BUSPHASE, /* Unexpected Bus Phase */
281 HA_UNX_BUS_FREE, /* Unexpected Bus Free */
282 HA_BUS_PARITY, /* Bus Parity Error */
283 HA_SCSI_HUNG, /* SCSI Hung */
284 HA_UNX_MSGRJCT, /* Unexpected Message Rejected */
285 HA_RESET_STUCK, /* SCSI Bus Reset Stuck */
286 HA_RSENSE_FAIL, /* Auto Request-Sense Failed */
287 HA_PARITY_ERR, /* Controller Ram Parity Error */
288 HA_CP_ABORT_NA, /* Abort Message sent to non-active cmd */
289 HA_CP_ABORTED, /* Abort Message sent to active cmd */
290 HA_CP_RESET_NA, /* Reset Message sent to non-active cmd */
291 HA_CP_RESET, /* Reset Message sent to active cmd */
292 HA_ECC_ERR, /* Controller Ram ECC Error */
293 HA_PCI_PARITY, /* PCI Parity Error */
294 HA_PCI_MABORT, /* PCI Master Abort */
295 HA_PCI_TABORT, /* PCI Target Abort */
296 HA_PCI_STABORT /* PCI Signaled Target Abort */
297 };
298
299 #define HA_STATUS_MASK 0x7F
300 #define HA_IDENTIFY_MSG 0x80
301 #define HA_DISCO_RECO 0x40 /* Disconnect/Reconnect */
302
303 #define DPT_RW_BUFF_HEART 0X00
304 #define DPT_RW_BUFF_DLM 0x02
305 #define DPT_RW_BUFF_ACCESS 0x03
306
307 #define HA_INTR_OFF 1
308 #define HA_INTR_ON 0
309
310 /* This is really a one-time shot through some black magic */
311 #define DPT_EATA_REVA 0x1c
312 #define DPT_EATA_REVB 0x1e
313 #define DPT_EATA_REVC 0x22
314 #define DPT_EATA_REVZ 0x24
315
316
317 /* IOCTL List */
318
319 #define DPT_RW_CMD_LEN 32
320 #define DPT_RW_CMD_DUMP_SOFTC "dump softc"
321 #define DPT_RW_CMD_DUMP_SYSINFO "dump sysinfo"
322 #define DPT_RW_CMD_DUMP_METRICS "dump metrics"
323 #define DPT_RW_CMD_CLEAR_METRICS "clear metrics"
324 #define DPT_RW_CMD_SHOW_LED "show LED"
325
326 #define DPT_IOCTL_INTERNAL_METRICS _IOR('D', 1, dpt_perf_t)
327 #define DPT_IOCTL_SOFTC _IOR('D', 2, dpt_user_softc_t)
328 #define DPT_IOCTL_SEND _IOWR('D', 3, eata_pt_t)
329 #define SDI_SEND 0x40044444 /* Observed from dptmgr */
330
331 /*
332 * Other definitions
333 */
334
335 #define DPT_HCP_LENGTH(page) (ntohs(*(int16_t *)(void *)(&page[2]))+4)
336 #define DPT_HCP_FIRST(page) (&page[4])
337 #define DPT_HCP_NEXT(param) (¶m[3 + param[3] + 1])
338 #define DPT_HCP_CODE(param) (ntohs(*(int16_t *)(void *)param))
339
340
341 /* Possible return values from dpt_register_buffer() */
342
343 #define SCSI_TM_READ_BUFFER 0x3c
344 #define SCSI_TM_WRITE_BUFFER 0x3b
345
346 #define SCSI_TM_MODE_MASK 0x07 /* Strip off reserved and LUN */
347 #define SCSI_TM_LUN_MASK 0xe0 /* Strip off reserved and LUN */
348
349 typedef enum {
350 SUCCESSFULLY_REGISTERED,
351 DRIVER_DOWN,
352 ALREADY_REGISTERED,
353 REGISTERED_TO_ANOTHER,
354 NOT_REGISTERED,
355 INVALID_UNIT,
356 INVALID_SENDER,
357 INVALID_CALLBACK,
358 NO_RESOURCES
359 } dpt_rb_t;
360
361 typedef enum {
362 REGISTER_BUFFER,
363 RELEASE_BUFFER
364 } dpt_rb_op_t;
365
366 /*
367 * New way for completion routines to reliably copmplete processing.
368 * Should take properly typed dpt_softc_t and dpt_ccb_t,
369 * but interdependencies preclude that.
370 */
371 typedef void (*ccb_callback)(void *dpt, int bus, void *ccb);
372
373 typedef void (*buff_wr_done)(int unit, u_int8_t channel, u_int8_t target,
374 u_int8_t lun, u_int16_t offset, u_int16_t length,
375 int result);
376
377 typedef void (*dpt_rec_buff)(int unit, u_int8_t channel, u_int8_t target,
378 u_int8_t lun, void *buffer, u_int16_t offset,
379 u_int16_t length);
380
381 /* HBA's Status port (register) bitmap */
382 typedef struct reg_bit { /* reading this one will clear the interrupt */
383 u_int8_t error :1, /* previous command ended in an error */
384 more :1, /* More DATA coming soon Poll BSY & DRQ (PIO) */
385 corr :1, /* data read was successfully corrected with ECC */
386 drq :1, /* data request active */
387 sc :1, /* seek complete */
388 fault :1, /* write fault */
389 ready :1, /* drive ready */
390 busy :1; /* controller busy */
391 } dpt_status_reg_t;
392
393 /* HBA's Auxiliary status port (register) bitmap */
394 typedef struct reg_abit { /* reading this won't clear the interrupt */
395 u_int8_t abusy :1, /* auxiliary busy */
396 irq :1, /* set when drive interrupt is asserted */
397 :6;
398 } dpt_aux_status_t;
399
400 /* The EATA Register Set as a structure */
401 typedef struct eata_register {
402 u_int8_t data_reg[2]; /* R, couldn't figure this one out */
403 u_int8_t cp_addr[4]; /* W, CP address register */
404 union {
405 u_int8_t command; /*
406 * W, command code:
407 * [read|set] conf, send CP
408 */
409 struct reg_bit status; /* R, see register_bit1 */
410 u_int8_t statusbyte;
411 } ovr;
412 struct reg_abit aux_stat; /* R, see register_bit2 */
413 } eata_reg_t;
414
415 /*
416 * Holds the results of a READ_CONFIGURATION command
417 * Beware of data items which are larger than 1 byte.
418 * these come from the DPT in network order.
419 * On an Intel ``CPU'' they will be upside down and backwards!
420 * The dpt_get_conf function is normally responsible for flipping
421 * Everything back.
422 */
423 typedef struct get_conf { /* Read Configuration Array */
424 union {
425 struct {
426 u_int8_t foo_DevType;
427 u_int8_t foo_PageCode;
428 u_int8_t foo_Reserved0;
429 u_int8_t foo_len;
430 } foo;
431 u_int32_t foo_length; /* Should return 0x22, 0x24, etc */
432 } bar;
433 #define gcs_length bar.foo_length
434 #define gcs_PageCode bar.foo.foo_DevType
435 #define gcs_reserved0 bar.foo.foo_Reserved0
436 #define gcs_len bar.foo.foo_len
437
438 u_int32_t signature; /* Signature MUST be "EATA". ntohl()`ed */
439
440 u_int8_t version2 :4,
441 version :4; /* EATA Version level */
442
443 u_int8_t OCS_enabled :1, /* Overlap Command Support enabled */
444 TAR_support :1, /* SCSI Target Mode supported */
445 TRNXFR :1, /* Truncate Transfer Cmd Used in PIO Mode */
446 MORE_support:1, /* MORE supported (PIO Mode Only) */
447 DMA_support :1, /* DMA supported */
448 DMA_valid :1, /* DRQ value in Byte 30 is valid */
449 ATA :1, /* ATA device connected (not supported) */
450 HAA_valid :1; /* Hostadapter Address is valid */
451
452 u_int16_t cppadlen; /*
453 * Number of pad bytes send after CD data set
454 * to zero for DMA commands. Ntohl()`ed
455 */
456 u_int8_t scsi_idS; /* SCSI ID of controller 2-0 Byte 0 res. */
457 u_int8_t scsi_id2; /* If not, zero is returned */
458 u_int8_t scsi_id1;
459 u_int8_t scsi_id0;
460 u_int32_t cplen; /* CP length: number of valid cp bytes */
461
462 u_int32_t splen; /* Returned bytes for a received SP command */
463 u_int16_t queuesiz; /* max number of queueable CPs */
464
465 u_int16_t dummy;
466 u_int16_t SGsiz; /* max number of SG table entrie */
467
468 u_int8_t IRQ :4,/* IRQ used this HBA */
469 IRQ_TR :1,/* IRQ Trigger: 0=edge, 1=level */
470 SECOND :1,/* This is a secondary controller */
471 DMA_channel:2;/* DRQ index, DRQ is 2comp of DRQX */
472
473 u_int8_t sync; /* 0-7 sync active bitmask (deprecated) */
474 u_int8_t DSBLE :1, /* ISA i/o addressing is disabled */
475 FORCADR :1, /* i/o address has been forced */
476 SG_64K :1,
477 SG_UAE :1,
478 :4;
479
480 u_int8_t MAX_ID :5, /* Max number of SCSI target IDs */
481 MAX_CHAN :3; /* Number of SCSI busses on HBA */
482
483 u_int8_t MAX_LUN; /* Max number of LUNs */
484 u_int8_t :3,
485 AUTOTRM :1,
486 M1_inst :1,
487 ID_qest :1, /* Raidnum ID is questionable */
488 is_PCI :1, /* HBA is PCI */
489 is_EISA :1; /* HBA is EISA */
490
491 u_int8_t RAIDNUM; /* unique HBA identifier */
492 u_int8_t unused[4]; /* When doing PIO, you GET 512 bytes */
493
494 /* >>------>> End of The DPT structure <<------<< */
495
496 u_int32_t length; /* True length, after ntohl conversion */
497 } dpt_conf_t;
498
499 /* Scatter-Gather list entry */
500 typedef struct dpt_sg_segment {
501 u_int32_t seg_addr; /* All fields in network byte order */
502 u_int32_t seg_len;
503 } dpt_sg_t;
504
505
506 /* Status Packet */
507 typedef struct eata_sp {
508 u_int8_t hba_stat :7, /* HBA status */
509 EOC :1; /* True if command finished */
510
511 u_int8_t scsi_stat; /* Target SCSI status */
512
513 u_int8_t reserved[2];
514
515 u_int32_t residue_len; /* Number of bytes not transferred */
516
517 u_int32_t ccb_busaddr;
518
519 u_int8_t sp_ID_Message;
520 u_int8_t sp_Que_Message;
521 u_int8_t sp_Tag_Message;
522 u_int8_t msg[9];
523 } dpt_sp_t;
524
525 /*
526 * A strange collection of O/S-Hardware releated bits and pieces.
527 * Used by the dpt_ioctl() entry point to return DPT_SYSINFO command.
528 */
529 typedef struct dpt_drive_parameters {
530 u_int16_t cylinders; /* Up to 1024 */
531 u_int8_t heads; /* Up to 255 */
532 u_int8_t sectors; /* Up to 63 */
533 } dpt_drive_t;
534
535 typedef struct driveParam_S driveParam_T;
536
537 #define SI_CMOS_Valid 0x0001
538 #define SI_NumDrivesValid 0x0002
539 #define SI_ProcessorValid 0x0004
540 #define SI_MemorySizeValid 0x0008
541 #define SI_DriveParamsValid 0x0010
542 #define SI_SmartROMverValid 0x0020
543 #define SI_OSversionValid 0x0040
544 #define SI_OSspecificValid 0x0080
545 #define SI_BusTypeValid 0x0100
546
547 #define SI_ALL_VALID 0x0FFF
548 #define SI_NO_SmartROM 0x8000
549
550 #define SI_ISA_BUS 0x00
551 #define SI_MCA_BUS 0x01
552 #define SI_EISA_BUS 0x02
553 #define SI_PCI_BUS 0x04
554
555 #define HBA_BUS_ISA 0x00
556 #define HBA_BUS_EISA 0x01
557 #define HBA_BUS_PCI 0x02
558
559 typedef struct dpt_sysinfo {
560 u_int8_t drive0CMOS; /* CMOS Drive 0 Type */
561 u_int8_t drive1CMOS; /* CMOS Drive 1 Type */
562 u_int8_t numDrives; /* 0040:0075 contents */
563 u_int8_t processorFamily; /* Same as DPTSIG definition */
564 u_int8_t processorType; /* Same as DPTSIG definition */
565 u_int8_t smartROMMajorVersion;
566 u_int8_t smartROMMinorVersion; /* SmartROM version */
567 u_int8_t smartROMRevision;
568 u_int16_t flags; /* See bit definitions above */
569 u_int16_t conventionalMemSize; /* in KB */
570 u_int32_t extendedMemSize; /* in KB */
571 u_int32_t osType; /* Same as DPTSIG definition */
572 u_int8_t osMajorVersion;
573 u_int8_t osMinorVersion; /* The OS version */
574 u_int8_t osRevision;
575 u_int8_t osSubRevision;
576 u_int8_t busType; /* See defininitions above */
577 u_int8_t pad[3]; /* For alignment */
578 dpt_drive_t drives[16]; /* SmartROM Logical Drives */
579 } dpt_sysinfo_t;
580
581 /* SEND_COMMAND packet structure */
582 typedef struct eata_ccb {
583 u_int8_t SCSI_Reset :1, /* Cause a SCSI Bus reset on the cmd */
584 HBA_Init :1, /* Cause Controller to reinitialize */
585 Auto_Req_Sen :1, /* Do Auto Request Sense on errors */
586 scatter :1, /* Data Ptr points to a SG Packet */
587 Quick :1, /* Set this one for NO Status PAcket */
588 Interpret :1, /* Interpret the SCSI cdb for own use */
589 DataOut :1, /* Data Out phase with command */
590 DataIn :1; /* Data In phase with command */
591
592 u_int8_t reqlen; /* Request Sense Length, if Auto_Req_Sen=1 */
593 u_int8_t unused[3];
594 u_int8_t FWNEST :1, /* send cmd to phys RAID component */
595 unused2 :7;
596
597 u_int8_t Phsunit :1, /* physical unit on mirrored pair */
598 I_AT :1, /* inhibit address translation */
599 Disable_Cache :1, /* HBA inhibit caching */
600 :5;
601
602 u_int8_t cp_id :5, /* SCSI Device ID of target */
603 cp_channel :3; /* SCSI Channel # of HBA */
604
605 u_int8_t cp_LUN :5,
606 cp_luntar :1, /* CP is for target ROUTINE */
607 cp_dispri :1, /* Grant disconnect privilege */
608 cp_identify :1; /* Always TRUE */
609
610 u_int8_t cp_msg[3]; /* Message bytes 0-3 */
611
612 union {
613 struct {
614 u_int8_t x_scsi_cmd; /* Partial SCSI CDB def */
615
616 u_int8_t x_extent :1,
617 x_bytchk :1,
618 x_reladr :1,
619 x_cmplst :1,
620 x_fmtdata :1,
621 x_lun :3;
622
623 u_int8_t x_page;
624 u_int8_t reserved4;
625 u_int8_t x_len;
626 u_int8_t x_link :1;
627 u_int8_t x_flag :1;
628 u_int8_t reserved5 :4;
629 u_int8_t x_vendor :2;
630 } x;
631 u_int8_t z[12]; /* Command Descriptor Block (= 12) */
632 } cp_w;
633
634 #define cp_cdb cp_w.z
635 #define cp_scsi_cmd cp_w.x.x_scsi_cmd
636 #define cp_extent cp_w.x.x_extent
637 #define cp_lun cp_w.x.x_lun
638 #define cp_page cp_w.x.x_page
639 #define cp_len cp_w.x.x_len
640
641 #define MULTIFUNCTION_CMD 0x0e /* SCSI Multi Function Cmd */
642 #define BUS_QUIET 0x04 /* Quite Scsi Bus Code */
643 #define BUS_UNQUIET 0x05 /* Un Quiet Scsi Bus Code */
644
645 u_int32_t cp_datalen; /*
646 * Data Transfer Length. If scatter=1 len (IN
647 * BYTES!) of the S/G array
648 */
649
650 u_int32_t cp_busaddr; /* Unique identifier. Busaddr works well */
651 u_int32_t cp_dataDMA; /*
652 * Data Address, if scatter=1 then it is the
653 * address of scatter packet
654 */
655 u_int32_t cp_statDMA; /* address for Status Packet */
656 u_int32_t cp_reqDMA; /*
657 * Request Sense Address, used if CP command
658 * ends with error
659 */
660 u_int8_t CP_OpCode;
661
662 } eata_ccb_t;
663
664 /*
665 * DPT Signature Structure.
666 * Used by /dev/dpt to directly pass commands to the HBA
667 * We have more information here than we care for...
668 */
669
670 /* Current Signature Version - sigBYTE dsSigVersion; */
671 #define SIG_VERSION 1
672
673 /*
674 * Processor Family - sigBYTE dsProcessorFamily; DISTINCT VALUE
675 *
676 * What type of processor the file is meant to run on.
677 * This will let us know whether to read sigWORDs as high/low or low/high.
678 */
679 #define PROC_INTEL 0x00 /* Intel 80x86 */
680 #define PROC_MOTOROLA 0x01 /* Motorola 68K */
681 #define PROC_MIPS4000 0x02 /* MIPS RISC 4000 */
682 #define PROC_ALPHA 0x03 /* DEC Alpha */
683
684 /*
685 * Specific Minimim Processor - sigBYTE dsProcessor; FLAG BITS
686 *
687 * Different bit definitions dependent on processor_family
688 */
689
690 /* PROC_INTEL: */
691 #define PROC_8086 0x01 /* Intel 8086 */
692 #define PROC_286 0x02 /* Intel 80286 */
693 #define PROC_386 0x04 /* Intel 80386 */
694 #define PROC_486 0x08 /* Intel 80486 */
695 #define PROC_PENTIUM 0x10 /* Intel 586 aka P5 aka Pentium */
696 #define PROC_P6 0x20 /* Intel 686 aka P6 */
697
698 /* PROC_MOTOROLA: */
699 #define PROC_68000 0x01 /* Motorola 68000 */
700 #define PROC_68020 0x02 /* Motorola 68020 */
701 #define PROC_68030 0x04 /* Motorola 68030 */
702 #define PROC_68040 0x08 /* Motorola 68040 */
703
704 /* Filetype - sigBYTE dsFiletype; DISTINCT VALUES */
705 #define FT_EXECUTABLE 0 /* Executable Program */
706 #define FT_SCRIPT 1 /* Script/Batch File??? */
707 #define FT_HBADRVR 2 /* HBA Driver */
708 #define FT_OTHERDRVR 3 /* Other Driver */
709 #define FT_IFS 4 /* Installable Filesystem Driver */
710 #define FT_ENGINE 5 /* DPT Engine */
711 #define FT_COMPDRVR 6 /* Compressed Driver Disk */
712 #define FT_LANGUAGE 7 /* Foreign Language file */
713 #define FT_FIRMWARE 8 /* Downloadable or actual Firmware */
714 #define FT_COMMMODL 9 /* Communications Module */
715 #define FT_INT13 10 /* INT 13 style HBA Driver */
716 #define FT_HELPFILE 11 /* Help file */
717 #define FT_LOGGER 12 /* Event Logger */
718 #define FT_INSTALL 13 /* An Install Program */
719 #define FT_LIBRARY 14 /* Storage Manager Real-Mode Calls */
720 #define FT_RESOURCE 15 /* Storage Manager Resource File */
721 #define FT_MODEM_DB 16 /* Storage Manager Modem Database */
722
723 /* Filetype flags - sigBYTE dsFiletypeFlags; FLAG BITS */
724 #define FTF_DLL 0x01 /* Dynamic Link Library */
725 #define FTF_NLM 0x02 /* Netware Loadable Module */
726 #define FTF_OVERLAYS 0x04 /* Uses overlays */
727 #define FTF_DEBUG 0x08 /* Debug version */
728 #define FTF_TSR 0x10 /* TSR */
729 #define FTF_SYS 0x20 /* DOS Lodable driver */
730 #define FTF_PROTECTED 0x40 /* Runs in protected mode */
731 #define FTF_APP_SPEC 0x80 /* Application Specific */
732
733 /* OEM - sigBYTE dsOEM; DISTINCT VALUES */
734 #define OEM_DPT 0 /* DPT */
735 #define OEM_ATT 1 /* ATT */
736 #define OEM_NEC 2 /* NEC */
737 #define OEM_ALPHA 3 /* Alphatronix */
738 #define OEM_AST 4 /* AST */
739 #define OEM_OLIVETTI 5 /* Olivetti */
740 #define OEM_SNI 6 /* Siemens/Nixdorf */
741
742 /* Operating System - sigLONG dsOS; FLAG BITS */
743 #define OS_DOS 0x00000001 /* PC/MS-DOS */
744 #define OS_WINDOWS 0x00000002 /* Microsoft Windows 3.x */
745 #define OS_WINDOWS_NT 0x00000004 /* Microsoft Windows NT */
746 #define OS_OS2M 0x00000008 /* OS/2 1.2.x,MS 1.3.0,IBM 1.3.x */
747 #define OS_OS2L 0x00000010 /* Microsoft OS/2 1.301 - LADDR */
748 #define OS_OS22x 0x00000020 /* IBM OS/2 2.x */
749 #define OS_NW286 0x00000040 /* Novell NetWare 286 */
750 #define OS_NW386 0x00000080 /* Novell NetWare 386 */
751 #define OS_GEN_UNIX 0x00000100 /* Generic Unix */
752 #define OS_SCO_UNIX 0x00000200 /* SCO Unix */
753 #define OS_ATT_UNIX 0x00000400 /* ATT Unix */
754 #define OS_UNIXWARE 0x00000800 /* UnixWare Unix */
755 #define OS_INT_UNIX 0x00001000 /* Interactive Unix */
756 #define OS_SOLARIS 0x00002000 /* SunSoft Solaris */
757 #define OS_QN 0x00004000 /* QNX for Tom Moch */
758 #define OS_NEXTSTEP 0x00008000 /* NeXTSTEP */
759 #define OS_BANYAN 0x00010000 /* Banyan Vines */
760 #define OS_OLIVETTI_UNIX 0x00020000 /* Olivetti Unix */
761 #define OS_FREEBSD 0x00040000 /* FreeBSD 2.2 and later */
762 #define OS_OTHER 0x80000000 /* Other */
763
764 /* Capabilities - sigWORD dsCapabilities; FLAG BITS */
765 #define CAP_RAID0 0x0001 /* RAID-0 */
766 #define CAP_RAID1 0x0002 /* RAID-1 */
767 #define CAP_RAID3 0x0004 /* RAID-3 */
768 #define CAP_RAID5 0x0008 /* RAID-5 */
769 #define CAP_SPAN 0x0010 /* Spanning */
770 #define CAP_PASS 0x0020 /* Provides passthrough */
771 #define CAP_OVERLAP 0x0040 /* Passthrough supports overlapped commands */
772 #define CAP_ASPI 0x0080 /* Supports ASPI Command Requests */
773 #define CAP_ABOVE16MB 0x0100 /* ISA Driver supports greater than 16MB */
774 #define CAP_EXTEND 0x8000 /* Extended info appears after description */
775
776 /* Devices Supported - sigWORD dsDeviceSupp; FLAG BITS */
777 #define DEV_DASD 0x0001 /* DASD (hard drives) */
778 #define DEV_TAPE 0x0002 /* Tape drives */
779 #define DEV_PRINTER 0x0004 /* Printers */
780 #define DEV_PROC 0x0008 /* Processors */
781 #define DEV_WORM 0x0010 /* WORM drives */
782 #define DEV_CDROM 0x0020 /* CD-ROM drives */
783 #define DEV_SCANNER 0x0040 /* Scanners */
784 #define DEV_OPTICAL 0x0080 /* Optical Drives */
785 #define DEV_JUKEBOX 0x0100 /* Jukebox */
786 #define DEV_COMM 0x0200 /* Communications Devices */
787 #define DEV_OTHER 0x0400 /* Other Devices */
788 #define DEV_ALL 0xFFFF /* All SCSI Devices */
789
790 /* Adapters Families Supported - sigWORD dsAdapterSupp; FLAG BITS */
791 #define ADF_2001 0x0001 /* PM2001 */
792 #define ADF_2012A 0x0002 /* PM2012A */
793 #define ADF_PLUS_ISA 0x0004 /* PM2011,PM2021 */
794 #define ADF_PLUS_EISA 0x0008 /* PM2012B,PM2022 */
795 #define ADF_SC3_ISA 0x0010 /* PM2021 */
796 #define ADF_SC3_EISA 0x0020 /* PM2022,PM2122, etc */
797 #define ADF_SC3_PCI 0x0040 /* SmartCache III PCI */
798 #define ADF_SC4_ISA 0x0080 /* SmartCache IV ISA */
799 #define ADF_SC4_EISA 0x0100 /* SmartCache IV EISA */
800 #define ADF_SC4_PCI 0x0200 /* SmartCache IV PCI */
801 #define ADF_ALL_MASTER 0xFFFE /* All bus mastering */
802 #define ADF_ALL_CACHE 0xFFFC /* All caching */
803 #define ADF_ALL 0xFFFF /* ALL DPT adapters */
804
805 /* Application - sigWORD dsApplication; FLAG BITS */
806 #define APP_DPTMGR 0x0001 /* DPT Storage Manager */
807 #define APP_ENGINE 0x0002 /* DPT Engine */
808 #define APP_SYTOS 0x0004 /* Sytron Sytos Plus */
809 #define APP_CHEYENNE 0x0008 /* Cheyenne ARCServe + ARCSolo */
810 #define APP_MSCDEX 0x0010 /* Microsoft CD-ROM extensions */
811 #define APP_NOVABACK 0x0020 /* NovaStor Novaback */
812 #define APP_AIM 0x0040 /* Archive Information Manager */
813
814 /* Requirements - sigBYTE dsRequirements; FLAG BITS */
815 #define REQ_SMARTROM 0x01 /* Requires SmartROM to be present */
816 #define REQ_DPTDDL 0x02 /* Requires DPTDDL.SYS to be loaded */
817 #define REQ_HBA_DRIVER 0x04 /* Requires an HBA driver to be loaded */
818 #define REQ_ASPI_TRAN 0x08 /* Requires an ASPI Transport Modules */
819 #define REQ_ENGINE 0x10 /* Requires a DPT Engine to be loaded */
820 #define REQ_COMM_ENG 0x20 /* Requires a DPT Communications Engine */
821
822 typedef struct dpt_sig {
823 char dsSignature[6]; /* ALWAYS "dPtSiG" */
824 u_int8_t SigVersion; /* signature version (currently 1) */
825 u_int8_t ProcessorFamily; /* what type of processor */
826 u_int8_t Processor; /* precise processor */
827 u_int8_t Filetype; /* type of file */
828 u_int8_t FiletypeFlags; /* flags to specify load type, etc. */
829 u_int8_t OEM; /* OEM file was created for */
830 u_int32_t OS; /* which Operating systems */
831 u_int16_t Capabilities; /* RAID levels, etc. */
832 u_int16_t DeviceSupp; /* Types of SCSI devices supported */
833 u_int16_t AdapterSupp; /* DPT adapter families supported */
834 u_int16_t Application; /* applications file is for */
835 u_int8_t Requirements; /* Other driver dependencies */
836 u_int8_t Version; /* 1 */
837 u_int8_t Revision; /* 'J' */
838 u_int8_t SubRevision; /* '9', ' ' if N/A */
839 u_int8_t Month; /* creation month */
840 u_int8_t Day; /* creation day */
841 u_int8_t Year; /* creation year since 1980 */
842 char *Description; /* description (NULL terminated) */
843 } dpt_sig_t;
844
845 /* 32 bytes minimum - with no description. Put NULL at description[0] */
846 /* 81 bytes maximum - with 49 character description plus NULL. */
847
848 /* This line added at Roycroft's request */
849 /* Microsoft's NT compiler gets confused if you do a pack and don't */
850 /* restore it. */
851 typedef struct eata_pass_through {
852 u_int8_t eataID[4];
853 u_int32_t command;
854
855 #define EATAUSRCMD (('D'<<8)|65) /* EATA PassThrough Command */
856 #define DPT_SIGNATURE (('D'<<8)|67) /* Get Signature Structure */
857 #define DPT_NUMCTRLS (('D'<<8)|68) /* Get Number Of DPT Adapters */
858 #define DPT_CTRLINFO (('D'<<8)|69) /* Get Adapter Info Structure */
859 #define DPT_SYSINFO (('D'<<8)|72) /* Get System Info Structure */
860 #define DPT_BLINKLED (('D'<<8)|75) /* Get The BlinkLED Status */
861
862 u_int8_t *command_buffer;
863 eata_ccb_t command_packet;
864 u_int32_t timeout;
865 u_int8_t host_status;
866 u_int8_t target_status;
867 u_int8_t retries;
868 } eata_pt_t;
869
870 typedef enum {
871 DCCB_FREE = 0x00,
872 DCCB_ACTIVE = 0x01,
873 DCCB_RELEASE_SIMQ = 0x02
874 } dccb_state;
875
876 typedef struct dpt_ccb {
877 eata_ccb_t eata_ccb;
878 bus_dmamap_t dmamap;
879 struct callout timer;
880 dpt_sg_t *sg_list;
881 u_int32_t sg_busaddr;
882 dccb_state state;
883 union ccb *ccb;
884 struct scsi_sense_data sense_data;
885 u_int8_t tag;
886 u_int8_t retries;
887 u_int8_t status; /* status of this queueslot */
888 u_int8_t *cmd; /* address of cmd */
889
890 u_int32_t transaction_id;
891 u_int32_t result;
892 caddr_t data;
893 SLIST_ENTRY(dpt_ccb) links;
894
895 #ifdef DPT_MEASURE_PERFORMANCE
896 u_int32_t submitted_time;
897 struct timeval command_started;
898 struct timeval command_ended;
899 #endif
900 } dpt_ccb_t;
901
902 /*
903 * This is provided for compatibility with UnixWare only.
904 * Some of the fields may be bogus.
905 * Others may have a totally different meaning.
906 */
907 typedef struct dpt_scsi_ha {
908 u_int32_t ha_state; /* Operational state */
909 u_int8_t ha_id[MAX_CHANNELS]; /* Host adapter SCSI ids */
910 int32_t ha_base; /* Base I/O address */
911 int ha_max_jobs; /* Max number of Active Jobs */
912 int ha_cache:2; /* Cache parameters */
913 int ha_cachesize:30; /* In meg, only if cache present*/
914 int ha_nbus; /* Number Of Busses on HBA */
915 int ha_ntargets; /* Number Of Targets Supported */
916 int ha_nluns; /* Number Of LUNs Supported */
917 int ha_tshift; /* Shift value for target */
918 int ha_bshift; /* Shift value for bus */
919 int ha_npend; /* # of jobs sent to HBA */
920 int ha_active_jobs; /* Number Of Active Jobs */
921 char ha_fw_version[4]; /* Firmware Revision Level */
922 void *ha_ccb; /* Controller command blocks */
923 void *ha_cblist; /* Command block free list */
924 void *ha_dev; /* Logical unit queues */
925 void *ha_StPkt_lock; /* Status Packet Lock */
926 void *ha_ccb_lock; /* CCB Lock */
927 void *ha_LuQWaiting; /* Lu Queue Waiting List */
928 void *ha_QWait_lock; /* Device Que Waiting Lock */
929 int ha_QWait_opri; /* Saved Priority Level */
930 #ifdef DPT_TARGET_MODE
931 dpt_ccb_t *target_ccb[MAX_CHANNELS]; /* Command block waiting writebuf */
932 #endif
933 } dpt_compat_ha_t;
934
935 /*
936 * Describe the Inquiry Data returned on Page 0 from the Adapter. The
937 * Page C1 Inquiry Data is described in the DptConfig_t structure above.
938 */
939 typedef struct {
940 u_int8_t deviceType;
941 u_int8_t rm_dtq;
942 u_int8_t otherData[6];
943 u_int8_t vendor[8];
944 u_int8_t modelNum[16];
945 u_int8_t firmware[4];
946 u_int8_t protocol[4];
947 } dpt_inq_t;
948
949 /*
950 * sp_EOC is not `safe', so I will check sp_Messages[0] instead!
951 */
952 #define DptStat_BUSY(x) ((x)->sp_ID_Message)
953 #define DptStat_Reset_BUSY(x) \
954 ((x)->msg[0] = 0xA5, (x)->EOC = 0, \
955 (x)->ccb_busaddr = ~0)
956
957 #ifdef DPT_MEASURE_PERFORMANCE
958 #define BIG_ENOUGH 0x8fffffff
959 typedef struct dpt_metrics {
960 u_int32_t command_count[256]; /* We assume MAX 256 SCSI commands */
961 u_int32_t max_command_time[256];
962 u_int32_t min_command_time[256];
963
964 u_int32_t min_intr_time;
965 u_int32_t max_intr_time;
966 u_int32_t aborted_interrupts;
967 u_int32_t spurious_interrupts;
968
969 u_int32_t max_waiting_count;
970 u_int32_t max_submit_count;
971 u_int32_t max_complete_count;
972
973 u_int32_t min_waiting_time;
974 u_int32_t min_submit_time;
975 u_int32_t min_complete_time;
976
977 u_int32_t max_waiting_time;
978 u_int32_t max_submit_time;
979 u_int32_t max_complete_time;
980
981 u_int32_t command_collisions;
982 u_int32_t command_too_busy;
983 u_int32_t max_eata_tries;
984 u_int32_t min_eata_tries;
985
986 u_int32_t read_by_size_count[10];
987 u_int32_t write_by_size_count[10];
988 u_int32_t read_by_size_min_time[10];
989 u_int32_t read_by_size_max_time[10];
990 u_int32_t write_by_size_min_time[10];
991 u_int32_t write_by_size_max_time[10];
992
993 #define SIZE_512 0
994 #define SIZE_1K 1
995 #define SIZE_2K 2
996 #define SIZE_4K 3
997 #define SIZE_8K 4
998 #define SIZE_16K 5
999 #define SIZE_32K 6
1000 #define SIZE_64K 7
1001 #define SIZE_BIGGER 8
1002 #define SIZE_OTHER 9
1003
1004 struct timeval intr_started;
1005
1006 u_int32_t warm_starts;
1007 u_int32_t cold_boots;
1008 } dpt_perf_t;
1009 #endif
1010
1011 struct sg_map_node {
1012 bus_dmamap_t sg_dmamap;
1013 bus_addr_t sg_physaddr;
1014 dpt_sg_t* sg_vaddr;
1015 SLIST_ENTRY(sg_map_node) links;
1016 };
1017
1018 /* Main state machine and interface structure */
1019 typedef struct dpt_softc {
1020 device_t dev;
1021 struct mtx lock;
1022
1023 struct resource * io_res;
1024 int io_rid;
1025 int io_type;
1026 int io_offset;
1027
1028 struct resource * irq_res;
1029 int irq_rid;
1030 void * ih;
1031
1032 struct resource * drq_res;
1033 int drq_rid;
1034
1035 bus_dma_tag_t buffer_dmat; /* dmat for buffer I/O */
1036 dpt_ccb_t *dpt_dccbs; /* Array of dpt ccbs */
1037 bus_addr_t dpt_ccb_busbase; /* phys base address of array */
1038 bus_addr_t dpt_ccb_busend; /* phys end address of array */
1039
1040 u_int32_t handle_interrupts :1, /* Are we ready for real work? */
1041 target_mode_enabled :1,
1042 resource_shortage :1,
1043 cache_type :2,
1044 spare :28;
1045
1046 int total_dccbs;
1047 int free_dccbs;
1048 int pending_ccbs;
1049 int completed_ccbs;
1050
1051 SLIST_HEAD(, dpt_ccb) free_dccb_list;
1052 LIST_HEAD(, ccb_hdr) pending_ccb_list;
1053
1054 bus_dma_tag_t parent_dmat;
1055 bus_dma_tag_t dccb_dmat; /* dmat for our ccb array */
1056 bus_dmamap_t dccb_dmamap;
1057 bus_dma_tag_t sg_dmat; /* dmat for our sg maps */
1058 SLIST_HEAD(, sg_map_node) sg_maps;
1059
1060 struct cam_sim *sims[MAX_CHANNELS];
1061 struct cam_path *paths[MAX_CHANNELS];
1062 u_int32_t commands_processed;
1063 u_int32_t lost_interrupts;
1064
1065 /*
1066 * These three parameters can be used to allow for wide scsi, and
1067 * for host adapters that support multiple busses. The first two
1068 * should be set to 1 more than the actual max id or lun (i.e. 8 for
1069 * normal systems).
1070 *
1071 * There is a FAT assumption here; We assume that these will never
1072 * exceed MAX_CHANNELS, MAX_TARGETS, MAX_LUNS
1073 */
1074 u_int channels; /* # of avail scsi chan. */
1075 u_int32_t max_id;
1076 u_int32_t max_lun;
1077
1078 u_int8_t irq;
1079 u_int8_t dma_channel;
1080
1081 TAILQ_ENTRY(dpt_softc) links;
1082 int init_level;
1083
1084 /*
1085 * Every object on a unit can have a receiver, if it treats
1086 * us as a target. We do that so that separate and independant
1087 * clients can consume received buffers.
1088 */
1089
1090 #define DPT_RW_BUFFER_SIZE (8 * 1024)
1091 dpt_ccb_t *target_ccb[MAX_CHANNELS][MAX_TARGETS][MAX_LUNS];
1092 u_int8_t *rw_buffer[MAX_CHANNELS][MAX_TARGETS][MAX_LUNS];
1093 dpt_rec_buff buffer_receiver[MAX_CHANNELS][MAX_TARGETS][MAX_LUNS];
1094
1095 dpt_inq_t board_data;
1096 u_int8_t EATA_revision;
1097 u_int8_t bustype; /* bustype of HBA */
1098 u_int32_t state; /* state of HBA */
1099
1100 #define DPT_HA_FREE 0x00000000
1101 #define DPT_HA_OK 0x00000000
1102 #define DPT_HA_NO_TIMEOUT 0x00000000
1103 #define DPT_HA_BUSY 0x00000001
1104 #define DPT_HA_TIMEOUT 0x00000002
1105 #define DPT_HA_RESET 0x00000004
1106 #define DPT_HA_LOCKED 0x00000008
1107 #define DPT_HA_ABORTED 0x00000010
1108 #define DPT_HA_CONTROL_ACTIVE 0x00000020
1109 #define DPT_HA_SHUTDOWN_ACTIVE 0x00000040
1110 #define DPT_HA_COMMAND_ACTIVE 0x00000080
1111 #define DPT_HA_QUIET 0x00000100
1112
1113 u_int8_t primary; /* true if primary */
1114
1115 u_int8_t more_support :1, /* HBA supports MORE flag */
1116 immediate_support :1, /* HBA supports IMMEDIATE */
1117 broken_INQUIRY :1, /* EISA HBA w/broken INQUIRY */
1118 spare2 :5;
1119
1120 u_int8_t resetlevel[MAX_CHANNELS];
1121 u_int32_t last_ccb; /* Last used ccb */
1122 u_int32_t cplen; /* size of CP in words */
1123 u_int16_t cppadlen; /* pad length of cp */
1124 u_int16_t max_dccbs;
1125 u_int16_t sgsize; /* Entries in the SG list */
1126 u_int8_t hostid[MAX_CHANNELS]; /* SCSI ID of HBA */
1127 u_int32_t cache_size;
1128
1129 volatile dpt_sp_t *sp; /* status packet */
1130 /* Copied from the status packet during interrupt handler */
1131 u_int8_t hba_stat;
1132 u_int8_t scsi_stat; /* Target SCSI status */
1133 u_int32_t residue_len; /* Number of bytes not transferred */
1134 bus_addr_t sp_physaddr; /* phys address of status packet */
1135
1136 /*
1137 * We put ALL conditional elements at the tail for the structure.
1138 * If we do not, then userland code will crash or trash based on which
1139 * kernel it is running with.
1140 * This isi most visible with usr/sbin/dpt_softc(8)
1141 */
1142
1143 #ifdef DPT_MEASURE_PERFORMANCE
1144 dpt_perf_t performance;
1145 #endif
1146
1147 #ifdef DPT_RESET_HBA
1148 struct timeval last_contact;
1149 #endif
1150 } dpt_softc_t;
1151
1152 /*
1153 * This structure is used to pass dpt_softc contents to userland via the
1154 * ioctl DPT_IOCTL_SOFTC. The reason for this maddness, is that FreeBSD
1155 * (all BSDs ?) chose to actually assign a nasty meaning to the IOCTL word,
1156 * encoding 13 bits of it as size. As dpt_softc_t is somewhere between
1157 * 8,594 and 8,600 (depends on options), we have to copy the data to
1158 * something less than 4KB long. This siliness also solves the problem of
1159 * varying definition of dpt_softc_t, As the variants are exluded from
1160 * dpt_user_softc.
1161 *
1162 * See dpt_softc_t above for enumerations, comments and such.
1163 */
1164 typedef struct dpt_user_softc {
1165 int unit;
1166 u_int32_t handle_interrupts :1, /* Are we ready for real work? */
1167 target_mode_enabled :1,
1168 spare :30;
1169
1170 int total_ccbs_count;
1171 int free_ccbs_count;
1172 int waiting_ccbs_count;
1173 int submitted_ccbs_count;
1174 int completed_ccbs_count;
1175
1176 u_int32_t queue_status;
1177 u_int32_t free_lock;
1178 u_int32_t waiting_lock;
1179 u_int32_t submitted_lock;
1180 u_int32_t completed_lock;
1181
1182 u_int32_t commands_processed;
1183 u_int32_t lost_interrupts;
1184
1185 u_int8_t channels;
1186 u_int32_t max_id;
1187 u_int32_t max_lun;
1188
1189 u_int16_t io_base;
1190 u_int8_t *v_membase;
1191 u_int8_t *p_membase;
1192
1193 u_int8_t irq;
1194 u_int8_t dma_channel;
1195
1196 dpt_inq_t board_data;
1197 u_int8_t EATA_revision;
1198 u_int8_t bustype;
1199 u_int32_t state;
1200
1201 u_int8_t primary;
1202 u_int8_t more_support :1,
1203 immediate_support :1,
1204 broken_INQUIRY :1,
1205 spare2 :5;
1206
1207 u_int8_t resetlevel[MAX_CHANNELS];
1208 u_int32_t last_ccb;
1209 u_int32_t cplen;
1210 u_int16_t cppadlen;
1211 u_int16_t queuesize;
1212 u_int16_t sgsize;
1213 u_int8_t hostid[MAX_CHANNELS];
1214 u_int32_t cache_type :2,
1215 cache_size :30;
1216 } dpt_user_softc_t;
1217
1218 /*
1219 * Externals:
1220 * These all come from dpt_scsi.c
1221 *
1222 */
1223 #ifdef _KERNEL
1224 /* This function gets the current hi-res time and returns it to the caller */
1225 static __inline struct timeval
dpt_time_now(void)1226 dpt_time_now(void)
1227 {
1228 struct timeval now;
1229
1230 microtime(&now);
1231 return(now);
1232 }
1233
1234 /*
1235 * Given a minor device number, get its SCSI Unit.
1236 */
1237 static __inline int
dpt_minor2unit(int minor)1238 dpt_minor2unit(int minor)
1239 {
1240 return(minor2hba(minor));
1241 }
1242
1243 dpt_softc_t *dpt_minor2softc(int minor_no);
1244
1245 #endif /* _KERNEL */
1246
1247 /*
1248 * This function substracts one timval structure from another,
1249 * Returning the result in usec.
1250 * It assumes that less than 4 billion usecs passed form start to end.
1251 * If times are sensless, ~0 is returned.
1252 */
1253 static __inline u_int32_t
dpt_time_delta(struct timeval start,struct timeval end)1254 dpt_time_delta(struct timeval start,
1255 struct timeval end)
1256 {
1257 if (start.tv_sec > end.tv_sec)
1258 return(~0);
1259
1260 if ( (start.tv_sec == end.tv_sec) && (start.tv_usec > end.tv_usec) )
1261 return(~0);
1262
1263 return ( (end.tv_sec - start.tv_sec) * 1000000 +
1264 (end.tv_usec - start.tv_usec) );
1265 }
1266
1267 extern devclass_t dpt_devclass;
1268
1269 #ifdef _KERNEL
1270 void dpt_alloc(device_t);
1271 int dpt_detach(device_t);
1272 int dpt_alloc_resources(device_t);
1273 void dpt_release_resources(device_t);
1274 #endif
1275 void dpt_free(struct dpt_softc *dpt);
1276 int dpt_init(struct dpt_softc *dpt);
1277 int dpt_attach(dpt_softc_t * dpt);
1278 void dpt_intr(void *arg);
1279
1280 #ifdef DEV_EISA
1281 dpt_conf_t * dpt_pio_get_conf(u_int32_t);
1282 #endif
1283
1284 #if 0
1285 extern void hex_dump(u_char * data, int length,
1286 char *name, int no);
1287 extern char *i2bin(unsigned int no, int length);
1288 extern char *scsi_cmd_name(u_int8_t cmd);
1289
1290 extern dpt_conf_t *dpt_get_conf(dpt_softc_t *dpt, u_int8_t page,
1291 u_int8_t target, u_int8_t size,
1292 int extent);
1293
1294 extern int dpt_setup(dpt_softc_t * dpt, dpt_conf_t * conf);
1295 extern int dpt_attach(dpt_softc_t * dpt);
1296 extern void dpt_shutdown(int howto, dpt_softc_t *dpt);
1297 extern void dpt_detect_cache(dpt_softc_t *dpt);
1298
1299 extern int dpt_user_cmd(dpt_softc_t *dpt, eata_pt_t *user_cmd,
1300 caddr_t cmdarg, int minor_no);
1301
1302 extern u_int8_t dpt_blinking_led(dpt_softc_t *dpt);
1303
1304 extern dpt_rb_t dpt_register_buffer(int unit, u_int8_t channel, u_int8_t target,
1305 u_int8_t lun, u_int8_t mode,
1306 u_int16_t length, u_int16_t offset,
1307 dpt_rec_buff callback, dpt_rb_op_t op);
1308
1309 extern int dpt_send_buffer(int unit, u_int8_t channel, u_int8_t target,
1310 u_int8_t lun, u_int8_t mode, u_int16_t length,
1311 u_int16_t offset, void *data,
1312 buff_wr_done callback);
1313
1314
1315
1316 void dpt_reset_performance(dpt_softc_t *dpt);
1317 #endif
1318
1319 #endif /* _DPT_H */
1320