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Searched refs:Op1 (Results 1 – 25 of 96) sorted by relevance

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/NextBSD/contrib/llvm/lib/Target/XCore/Disassembler/
HDXCoreDisassembler.cpp241 Decode2OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2) { in Decode2OpInstruction() argument
253 Op1 = (Op1High << 2) | fieldFromInstruction(Insn, 2, 2); in Decode2OpInstruction()
259 Decode3OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2, in Decode3OpInstruction() argument
268 Op1 = (Op1High << 2) | fieldFromInstruction(Insn, 4, 2); in Decode3OpInstruction()
347 unsigned Op1, Op2; in Decode2RInstruction() local
348 DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2); in Decode2RInstruction()
352 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); in Decode2RInstruction()
360 unsigned Op1, Op2; in Decode2RImmInstruction() local
361 DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2); in Decode2RImmInstruction()
365 Inst.addOperand(MCOperand::createImm(Op1)); in Decode2RImmInstruction()
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/NextBSD/contrib/llvm/lib/Transforms/InstCombine/
HDInstCombineMulDivRem.cpp170 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitMul() local
175 if (Value *V = SimplifyMulInst(Op0, Op1, DL, TLI, DT, AC)) in visitMul()
182 if (match(Op1, m_AllOnes())) { in visitMul()
236 if (ConstantInt *CI = dyn_cast<ConstantInt>(Op1)) { in visitMul()
262 if (isa<Constant>(Op1)) { in visitMul()
277 Value *Mul = Builder->CreateMul(C1, Op1); in visitMul()
281 return BinaryOperator::CreateAdd(Builder->CreateMul(X, Op1), Mul); in visitMul()
287 if (Value *Op1v = dyn_castNegVal(Op1)) { in visitMul()
291 match(Op1, m_NSWSub(m_Value(), m_Value()))) in visitMul()
300 Value *Op1C = Op1; in visitMul()
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HDInstCombineShifts.cpp26 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in commonShiftTransforms() local
34 if (SelectInst *SI = dyn_cast<SelectInst>(Op1)) in commonShiftTransforms()
38 if (Constant *CUI = dyn_cast<Constant>(Op1)) in commonShiftTransforms()
46 if (Op1->hasOneUse() && match(Op1, m_SRem(m_Value(A), m_Power2(B)))) { in commonShiftTransforms()
50 Op1->getName()); in commonShiftTransforms()
321 Instruction *InstCombiner::FoldShiftByConstant(Value *Op0, Constant *Op1, in FoldShiftByConstant() argument
326 if (ConstantDataVector *CV = dyn_cast<ConstantDataVector>(Op1)) in FoldShiftByConstant()
328 else if (ConstantVector *CV = dyn_cast<ConstantVector>(Op1)) in FoldShiftByConstant()
331 COp1 = dyn_cast<ConstantInt>(Op1); in FoldShiftByConstant()
359 ConstantExpr::getShl(BOOp, Op1)); in FoldShiftByConstant()
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HDInstCombineAndOrXor.cpp893 Value *Op0 = LHS->getOperand(0), *Op1 = LHS->getOperand(1); in FoldAndOfICmps() local
896 return getNewICmpValue(isSigned, Code, Op0, Op1, Builder); in FoldAndOfICmps()
1208 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitAnd() local
1213 if (Value *V = SimplifyAndInst(Op0, Op1, DL, TLI, DT, AC)) in visitAnd()
1228 if (ConstantInt *AndRHS = dyn_cast<ConstantInt>(Op1)) { in visitAnd()
1335 if (Value *Op1NotVal = dyn_castNotVal(Op1)) in visitAnd()
1336 if (Op0->hasOneUse() && Op1->hasOneUse()) { in visitAnd()
1346 match(Op1, m_Not(m_And(m_Value(C), m_Value(D)))) && in visitAnd()
1351 if (match(Op1, m_Or(m_Value(A), m_Value(B))) && in visitAnd()
1359 Value *tmpOp1 = Op1; in visitAnd()
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HDInstCombineCompares.cpp2483 const Value * Op1) { in swapMayExposeCSEOpportunities() argument
2508 if (BinOp->getOperand(Op1Idx) != Op1) in swapMayExposeCSEOpportunities()
2633 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitICmpInst() local
2635 unsigned Op1Cplxity = getComplexity(Op1); in visitICmpInst()
2642 swapMayExposeCSEOpportunities(Op0, Op1))) { in visitICmpInst()
2644 std::swap(Op0, Op1); in visitICmpInst()
2649 SimplifyICmpInst(I.getPredicate(), Op0, Op1, DL, TLI, DT, AC, &I)) in visitICmpInst()
2654 if (I.getPredicate() == ICmpInst::ICMP_NE && match(Op1, m_Zero())) in visitICmpInst()
2661 return CmpInst::Create(Instruction::ICmp, I.getPredicate(), V, Op1); in visitICmpInst()
2665 return CmpInst::Create(Instruction::ICmp, I.getPredicate(), V, Op1); in visitICmpInst()
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HDInstCombineAddSub.cpp1494 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitSub() local
1499 if (Value *V = SimplifySubInst(Op0, Op1, I.hasNoSignedWrap(), in visitSub()
1508 if (Value *V = dyn_castNegVal(Op1)) { in visitSub()
1511 if (const auto *BO = dyn_cast<BinaryOperator>(Op1)) { in visitSub()
1517 if (cast<Constant>(Op1)->isNotMinSignedValue() && I.hasNoSignedWrap()) in visitSub()
1525 return BinaryOperator::CreateXor(Op0, Op1); in visitSub()
1529 return BinaryOperator::CreateNot(Op1); in visitSub()
1534 if (match(Op1, m_Not(m_Value(X)))) in visitSub()
1538 if (SelectInst *SI = dyn_cast<SelectInst>(Op1)) in visitSub()
1544 if (match(Op1, m_Add(m_Value(X), m_Constant(C2)))) in visitSub()
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HDInstructionCombining.cpp193 BinaryOperator *Op1 = dyn_cast<BinaryOperator>(I.getOperand(1)); in SimplifyAssociativeOrCommutative() local
226 if (Op1 && Op1->getOpcode() == Opcode) { in SimplifyAssociativeOrCommutative()
228 Value *B = Op1->getOperand(0); in SimplifyAssociativeOrCommutative()
229 Value *C = Op1->getOperand(1); in SimplifyAssociativeOrCommutative()
268 if (Op1 && Op1->getOpcode() == Opcode) { in SimplifyAssociativeOrCommutative()
270 Value *B = Op1->getOperand(0); in SimplifyAssociativeOrCommutative()
271 Value *C = Op1->getOperand(1); in SimplifyAssociativeOrCommutative()
289 if (Op0 && Op1 && in SimplifyAssociativeOrCommutative()
290 Op0->getOpcode() == Opcode && Op1->getOpcode() == Opcode && in SimplifyAssociativeOrCommutative()
292 isa<Constant>(Op1->getOperand(1)) && in SimplifyAssociativeOrCommutative()
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/NextBSD/contrib/llvm/lib/Analysis/
HDInstructionSimplify.cpp171 if (BinaryOperator *Op1 = dyn_cast<BinaryOperator>(RHS)) in ExpandBinOp() local
172 if (Op1->getOpcode() == OpcodeToExpand) { in ExpandBinOp()
174 Value *A = LHS, *B = Op1->getOperand(0), *C = Op1->getOperand(1); in ExpandBinOp()
208 BinaryOperator *Op1 = dyn_cast<BinaryOperator>(RHS); in SimplifyAssociativeBinOp() local
230 if (Op1 && Op1->getOpcode() == Opcode) { in SimplifyAssociativeBinOp()
232 Value *B = Op1->getOperand(0); in SimplifyAssociativeBinOp()
233 Value *C = Op1->getOperand(1); in SimplifyAssociativeBinOp()
272 if (Op1 && Op1->getOpcode() == Opcode) { in SimplifyAssociativeBinOp()
274 Value *B = Op1->getOperand(0); in SimplifyAssociativeBinOp()
275 Value *C = Op1->getOperand(1); in SimplifyAssociativeBinOp()
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HDConstantFolding.cpp621 Constant *Op1, in SymbolicallyEvaluateBinop() argument
634 computeKnownBits(Op1, KnownZero1, KnownOne1, DL); in SymbolicallyEvaluateBinop()
641 return Op1; in SymbolicallyEvaluateBinop()
658 if (IsConstantOffsetFromGlobal(Op1, GV2, Offs2, DL) && GV1 == GV2) { in SymbolicallyEvaluateBinop()
1602 if (ConstantFP *Op1 = dyn_cast<ConstantFP>(Operands[0])) { in ConstantFoldScalarCall() local
1605 double Op1V = getValueAsDouble(Op1); in ConstantFoldScalarCall()
1608 if (Op2->getType() != Op1->getType()) in ConstantFoldScalarCall()
1616 APFloat V1 = Op1->getValueAPF(); in ConstantFoldScalarCall()
1623 const APFloat &C1 = Op1->getValueAPF(); in ConstantFoldScalarCall()
1629 const APFloat &C1 = Op1->getValueAPF(); in ConstantFoldScalarCall()
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/NextBSD/sys/contrib/dev/acpica/compiler/
HDasltree.c1181 ACPI_PARSE_OBJECT *Op1, in TrLinkPeerNode() argument
1189 Op1, Op1 ? UtGetOpName(Op1->Asl.ParseOpcode) : NULL, in TrLinkPeerNode()
1193 if ((!Op1) && (!Op2)) in TrLinkPeerNode()
1196 return (Op1); in TrLinkPeerNode()
1203 return (Op1); in TrLinkPeerNode()
1206 if (!Op1) in TrLinkPeerNode()
1211 if (Op1 == Op2) in TrLinkPeerNode()
1215 Op1); in TrLinkPeerNode()
1216 AslError (ASL_WARNING, ASL_MSG_COMPILER_INTERNAL, Op1, in TrLinkPeerNode()
1218 return (Op1); in TrLinkPeerNode()
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/NextBSD/contrib/llvm/include/llvm/Target/
HDTargetSelectionDAGInfo.h51 SDValue Op1, SDValue Op2, in EmitTargetCodeForMemcpy() argument
68 SDValue Op1, SDValue Op2, in EmitTargetCodeForMemmove() argument
84 SDValue Op1, SDValue Op2, in EmitTargetCodeForMemset() argument
98 SDValue Op1, SDValue Op2, in EmitTargetCodeForMemcmp() argument
139 SDValue Op1, SDValue Op2, in EmitTargetCodeForStrcmp() argument
/NextBSD/contrib/llvm/lib/Transforms/Scalar/
HDScalarizer.cpp74 Value *operator()(IRBuilder<> &Builder, Value *Op0, Value *Op1, in operator ()()
76 return Builder.CreateFCmp(FCI.getPredicate(), Op0, Op1, Name); in operator ()()
85 Value *operator()(IRBuilder<> &Builder, Value *Op0, Value *Op1, in operator ()()
87 return Builder.CreateICmp(ICI.getPredicate(), Op0, Op1, Name); in operator ()()
96 Value *operator()(IRBuilder<> &Builder, Value *Op0, Value *Op1, in operator ()()
98 return Builder.CreateBinOp(BO.getOpcode(), Op0, Op1, Name); in operator ()()
382 Scatterer Op1 = scatter(&I, I.getOperand(1)); in splitBinary() local
384 assert(Op1.size() == NumElems && "Mismatched binary operation"); in splitBinary()
388 Res[Elem] = Split(Builder, Op0[Elem], Op1[Elem], in splitBinary()
401 Scatterer Op1 = scatter(&SI, SI.getOperand(1)); in visitSelectInst() local
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HDCorrelatedValuePropagation.cpp192 Constant *Op1 = dyn_cast<Constant>(C->getOperand(1)); in processCmp() local
193 if (!Op1) return false; in processCmp()
199 C->getOperand(0), Op1, *PI, in processCmp()
206 C->getOperand(0), Op1, *PI, in processCmp()
/NextBSD/contrib/llvm/include/llvm/CodeGen/
HDSelectionDAG.h646 SDValue getCALLSEQ_END(SDValue Chain, SDValue Op1, SDValue Op2,
651 Ops.push_back(Op1);
911 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2);
912 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
914 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
916 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
925 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT, SDValue Op1);
927 SDValue Op1, SDValue Op2);
929 SDValue Op1, SDValue Op2, SDValue Op3);
940 EVT VT2, SDValue Op1);
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HDFastISel.h347 bool Op0IsKill, unsigned Op1, bool Op1IsKill);
365 unsigned Op0, bool Op0IsKill, unsigned Op1,
401 bool Op0IsKill, unsigned Op1, bool Op1IsKill);
407 bool Op0IsKill, unsigned Op1, bool Op1IsKill,
432 bool Op0IsKill, unsigned Op1, bool Op1IsKill,
439 bool Op0IsKill, unsigned Op1, bool Op1IsKill,
/NextBSD/contrib/llvm/lib/Target/Hexagon/
HDHexagonExpandPredSpillCode.cpp102 MachineOperand &Op1 = MI->getOperand(1); in runOnMachineFunction() local
113 NewMI->addOperand(Op1); in runOnMachineFunction()
145 MachineOperand &Op1 = MI->getOperand(1); in runOnMachineFunction() local
155 NewMI->addOperand(Op1); in runOnMachineFunction()
187 MachineOperand &Op1 = MI->getOperand(1); in runOnMachineFunction() local
196 NewMI->addOperand(Op1); in runOnMachineFunction()
224 MachineOperand &Op1 = MI->getOperand(1); in runOnMachineFunction() local
234 NewMI->addOperand(Op1); in runOnMachineFunction()
HDHexagonCopyToCombine.cpp121 const MachineOperand &Op1 = MI->getOperand(1); in isCombinableInstType() local
122 assert(Op0.isReg() && Op1.isReg()); in isCombinableInstType()
125 unsigned SrcReg = Op1.getReg(); in isCombinableInstType()
134 const MachineOperand &Op1 = MI->getOperand(1); in isCombinableInstType() local
141 if (!Op1.isImm() && Op1.getTargetFlags() != HexagonII::MO_NO_FLAG) in isCombinableInstType()
145 bool NotExt = Op1.isImm() && isInt<8>(Op1.getImm()); in isCombinableInstType()
/NextBSD/contrib/llvm/lib/Target/X86/AsmParser/
HDX86AsmParser.cpp177 ICToken Op1 = OperandStack.pop_back_val(); in execute() local
183 Val = Op1.second + Op2.second; in execute()
187 Val = Op1.second - Op2.second; in execute()
191 assert (Op1.first == IC_IMM && Op2.first == IC_IMM && in execute()
193 Val = Op1.second * Op2.second; in execute()
197 assert (Op1.first == IC_IMM && Op2.first == IC_IMM && in execute()
200 Val = Op1.second / Op2.second; in execute()
204 assert (Op1.first == IC_IMM && Op2.first == IC_IMM && in execute()
206 Val = Op1.second | Op2.second; in execute()
210 assert(Op1.first == IC_IMM && Op2.first == IC_IMM && in execute()
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/NextBSD/contrib/llvm/lib/Target/Sparc/
HDSparcISelDAGToDAG.cpp207 SDValue Op0, Op1; in SelectInlineAsmMemoryOperand() local
212 if (!SelectADDRrr(Op, Op0, Op1)) in SelectInlineAsmMemoryOperand()
213 SelectADDRri(Op, Op0, Op1); in SelectInlineAsmMemoryOperand()
218 OutOps.push_back(Op1); in SelectInlineAsmMemoryOperand()
/NextBSD/contrib/llvm/lib/CodeGen/SelectionDAG/
HDLegalizeVectorOps.cpp724 SDValue Op1 = Op.getOperand(1); in ExpandSELECT() local
728 && Op1.getValueType() == Op2.getValueType() && "Invalid type"); in ExpandSELECT()
761 Op1 = DAG.getNode(ISD::BITCAST, DL, MaskTy, Op1); in ExpandSELECT()
768 Op1 = DAG.getNode(ISD::AND, DL, MaskTy, Op1, Mask); in ExpandSELECT()
770 SDValue Val = DAG.getNode(ISD::OR, DL, MaskTy, Op1, Op2); in ExpandSELECT()
902 SDValue Op1 = Op.getOperand(1); in ExpandVSELECT() local
917 TLI.getBooleanContents(Op1.getValueType()) != in ExpandVSELECT()
924 if (VT.getSizeInBits() != Op1.getValueType().getSizeInBits()) in ExpandVSELECT()
930 Op1 = DAG.getNode(ISD::BITCAST, DL, VT, Op1); in ExpandVSELECT()
937 Op1 = DAG.getNode(ISD::AND, DL, VT, Op1, Mask); in ExpandVSELECT()
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HDFastISel.cpp406 unsigned Op1 = getRegForValue(I->getOperand(1)); in selectBinaryOp() local
407 if (!Op1) in selectBinaryOp()
412 fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op1, Op1IsKill, in selectBinaryOp()
466 unsigned Op1 = getRegForValue(I->getOperand(1)); in selectBinaryOp() local
467 if (!Op1) // Unhandled operand. Halt "fast" selection and bail. in selectBinaryOp()
473 ISDOpcode, Op0, Op0IsKill, Op1, Op1IsKill); in selectBinaryOp()
1770 bool Op0IsKill, unsigned Op1, in fastEmitInst_rr() argument
1776 Op1 = constrainOperandRegClass(II, Op1, II.getNumDefs() + 1); in fastEmitInst_rr()
1781 .addReg(Op1, getKillRegState(Op1IsKill)); in fastEmitInst_rr()
1785 .addReg(Op1, getKillRegState(Op1IsKill)); in fastEmitInst_rr()
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/NextBSD/contrib/llvm/lib/Target/SystemZ/
HDSystemZISelLowering.cpp45 : Op0(Op0In), Op1(Op1In), Opcode(0), ICmpType(0), CCValid(0), CCMask(0) {} in Comparison()
48 SDValue Op0, Op1; member
1549 auto *ConstOp1 = dyn_cast<ConstantSDNode>(C.Op1.getNode()); in adjustZeroCmp()
1559 C.Op1 = DAG.getConstant(0, DL, C.Op1.getValueType()); in adjustZeroCmp()
1570 C.Op1.getOpcode() != ISD::Constant) in adjustSubwordCmp()
1581 auto *ConstOp1 = cast<ConstantSDNode>(C.Op1); in adjustSubwordCmp()
1628 if (C.Op1.getValueType() != MVT::i32 || in adjustSubwordCmp()
1630 C.Op1 = DAG.getConstant(Value, DL, MVT::i32); in adjustSubwordCmp()
1665 if (isa<ConstantFPSDNode>(C.Op1)) in shouldSwapCmpOperands()
1670 auto *ConstOp1 = dyn_cast<ConstantSDNode>(C.Op1); in shouldSwapCmpOperands()
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HDSystemZISelDAGToDAG.cpp417 SDValue Op0, uint64_t Op1) { in expandDisp() argument
419 int64_t TestDisp = AM.Disp + Op1; in expandDisp()
441 SDValue Op1 = N.getOperand(1); in expandAddress() local
444 unsigned Op1Code = Op1->getOpcode(); in expandAddress()
447 return expandAdjDynAlloc(AM, IsBase, Op1); in expandAddress()
452 return expandDisp(AM, IsBase, Op1, in expandAddress()
456 cast<ConstantSDNode>(Op1)->getSExtValue()); in expandAddress()
458 if (IsBase && expandIndex(AM, Op0, Op1)) in expandAddress()
1181 if (auto *Op1 = dyn_cast<ConstantSDNode>(Node->getOperand(1))) { in Select() local
1182 uint64_t Val = Op1->getZExtValue(); in Select()
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/NextBSD/contrib/llvm/lib/Target/X86/
HDX86FloatingPoint.cpp1151 unsigned Op1 = getFPReg(MI->getOperand(NumOperands-1)); in handleTwoArgFP() local
1153 bool KillsOp1 = MI->killsRegister(X86::FP0+Op1); in handleTwoArgFP()
1160 if (Op0 != TOS && Op1 != TOS) { // No operand at TOS? in handleTwoArgFP()
1168 moveToTop(Op1, I); in handleTwoArgFP()
1169 TOS = Op1; in handleTwoArgFP()
1191 assert((TOS == Op0 || TOS == Op1) && (KillsOp0 || KillsOp1) && in handleTwoArgFP()
1198 bool updateST0 = (TOS == Op0 && !KillsOp1) || (TOS == Op1 && !KillsOp0); in handleTwoArgFP()
1216 unsigned NotTOS = (TOS == Op0) ? Op1 : Op0; in handleTwoArgFP()
1224 if (KillsOp0 && KillsOp1 && Op0 != Op1) { in handleTwoArgFP()
1249 unsigned Op1 = getFPReg(MI->getOperand(NumOperands-1)); in handleCompareFP() local
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/NextBSD/contrib/llvm/lib/Target/BPF/MCTargetDesc/
HDBPFMCCodeEmitter.cpp157 const MCOperand Op1 = MI.getOperand(1); in getMemoryOpValue() local
158 assert(Op1.isReg() && "First operand is not register."); in getMemoryOpValue()
159 Encoding = MRI.getEncodingValue(Op1.getReg()); in getMemoryOpValue()

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