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Searched refs:NumOps (Results 1 – 25 of 56) sorted by relevance

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/NextBSD/contrib/llvm/include/llvm/IR/
HDUser.h54 User(Type *ty, unsigned vty, Use *OpList, unsigned NumOps) in User() argument
56 assert(NumOps < (1u << NumUserOperandsBits) && "Too many operands"); in User()
57 NumUserOperands = NumOps; in User()
148 void setGlobalVariableNumOperands(unsigned NumOps) { in setGlobalVariableNumOperands() argument
149 assert(NumOps <= 1 && "GlobalVariable can only have 0 or 1 operands"); in setGlobalVariableNumOperands()
150 NumUserOperands = NumOps; in setGlobalVariableNumOperands()
161 void setFunctionNumOperands(unsigned NumOps) { in setFunctionNumOperands() argument
162 assert(NumOps <= 1 && "Function can only have 0 or 1 operands"); in setFunctionNumOperands()
163 NumUserOperands = NumOps; in setFunctionNumOperands()
169 void setNumHungOffUseOperands(unsigned NumOps) { in setNumHungOffUseOperands() argument
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HDGlobalObject.h30 GlobalObject(PointerType *Ty, ValueTy VTy, Use *Ops, unsigned NumOps, in GlobalObject() argument
32 : GlobalValue(Ty, VTy, Ops, NumOps, Linkage, Name), ObjComdat(nullptr) { in GlobalObject()
HDConstant.h47 Constant(Type *ty, ValueTy vty, Use *Ops, unsigned NumOps) in Constant() argument
48 : User(ty, vty, Ops, NumOps) {} in Constant()
HDInlineAsm.h268 static unsigned getFlagWord(unsigned Kind, unsigned NumOps) { in getFlagWord() argument
269 assert(((NumOps << 3) & ~0xffff) == 0 && "Too many inline asm operands!"); in getFlagWord()
271 return Kind | (NumOps << 3); in getFlagWord()
HDGlobalValue.h68 GlobalValue(PointerType *Ty, ValueTy VTy, Use *Ops, unsigned NumOps, in GlobalValue() argument
70 : Constant(Ty, VTy, Ops, NumOps), Linkage(Linkage), in GlobalValue()
HDInstruction.h508 Instruction(Type *Ty, unsigned iType, Use *Ops, unsigned NumOps,
510 Instruction(Type *Ty, unsigned iType, Use *Ops, unsigned NumOps,
HDInstrTypes.h38 Use *Ops, unsigned NumOps,
40 : Instruction(Ty, iType, Ops, NumOps, InsertBefore) {} in Instruction() argument
43 Use *Ops, unsigned NumOps, BasicBlock *InsertAtEnd) in TerminatorInst() argument
44 : Instruction(Ty, iType, Ops, NumOps, InsertAtEnd) {} in TerminatorInst()
/NextBSD/contrib/llvm/lib/CodeGen/
HDMachineRegisterInfo.cpp136 unsigned NumOps = MI->getNumOperands(); in verifyUseList() local
137 if (!(MO >= MO0 && MO < MO0+NumOps)) { in verifyUseList()
240 unsigned NumOps) { in moveOperands() argument
241 assert(Src != Dst && NumOps && "Noop moveOperands"); in moveOperands()
245 if (Dst >= Src && Dst < Src + NumOps) { in moveOperands()
247 Dst += NumOps - 1; in moveOperands()
248 Src += NumOps - 1; in moveOperands()
277 } while (--NumOps); in moveOperands()
HDCallingConvLower.cpp122 unsigned NumOps = Outs.size(); in AnalyzeCallOperands() local
123 for (unsigned i = 0; i != NumOps; ++i) { in AnalyzeCallOperands()
140 unsigned NumOps = ArgVTs.size(); in AnalyzeCallOperands() local
141 for (unsigned i = 0; i != NumOps; ++i) { in AnalyzeCallOperands()
HDMachineInstr.cpp627 if (unsigned NumOps = MCID->getNumOperands() + in MachineInstr() local
629 CapOperands = OperandCapacity::get(NumOps); in MachineInstr()
695 unsigned NumOps, MachineRegisterInfo *MRI) { in moveOperands() argument
697 return MRI->moveOperands(Dst, Src, NumOps); in moveOperands()
700 std::memmove(Dst, Src, NumOps * sizeof(MachineOperand)); in moveOperands()
1037 unsigned NumOps; in findInlineAsmFlagIdx() local
1039 i += NumOps) { in findInlineAsmFlagIdx()
1044 NumOps = 1 + InlineAsm::getNumOperandRegisters(FlagMO.getImm()); in findInlineAsmFlagIdx()
1045 if (i + NumOps > OpIdx) { in findInlineAsmFlagIdx()
1315 unsigned NumOps; in findTiedOperandIdx() local
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/NextBSD/contrib/llvm/lib/Target/X86/MCTargetDesc/
HDX86BaseInfo.h632 unsigned NumOps = Desc.getNumOperands(); in getOperandBias() local
634 if (NumOps > 1 && Desc.getOperandConstraint(1, MCOI::TIED_TO) == 0) in getOperandBias()
636 else if (NumOps > 3 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 && in getOperandBias()
641 else if (NumOps > 3 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 && in getOperandBias()
642 Desc.getOperandConstraint(NumOps - 1, MCOI::TIED_TO) == 1) in getOperandBias()
646 else if (NumOps > 2 && Desc.getOperandConstraint(NumOps - 2, MCOI::TIED_TO) == 0) in getOperandBias()
HDX86MCCodeEmitter.cpp711 unsigned NumOps = Desc.getNumOperands(); in EmitVEXOpcodePrefix() local
861 unsigned RcOperand = NumOps-1; in EmitVEXOpcodePrefix()
996 unsigned NumOps = MI.getNumOperands(); in DetermineREXPrefix() local
998 bool isTwoAddr = NumOps > 1 && in DetermineREXPrefix()
1003 for (; i != NumOps; ++i) { in DetermineREXPrefix()
1020 for (; i != NumOps; ++i) { in DetermineREXPrefix()
1032 for (; i != NumOps; ++i) { in DetermineREXPrefix()
1050 if (NumOps > e && MI.getOperand(e).isReg() && in DetermineREXPrefix()
1069 for (unsigned e = NumOps; i != e; ++i) { in DetermineREXPrefix()
1166 unsigned NumOps = Desc.getNumOperands(); in encodeInstruction() local
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/NextBSD/contrib/llvm/lib/Target/ARM/
HDThumb2SizeReduction.cpp701 unsigned NumOps = MCID.getNumOperands(); in ReduceTo2Addr() local
702 HasCC = (MI->getOperand(NumOps-1).getReg() == ARM::CPSR); in ReduceTo2Addr()
703 if (HasCC && MI->getOperand(NumOps-1).isDead()) in ReduceTo2Addr()
727 unsigned NumOps = MCID.getNumOperands(); in ReduceTo2Addr() local
729 if (i < NumOps && MCID.OpInfo[i].isOptionalDef()) in ReduceTo2Addr()
797 unsigned NumOps = MCID.getNumOperands(); in ReduceToNarrow() local
798 HasCC = (MI->getOperand(NumOps-1).getReg() == ARM::CPSR); in ReduceToNarrow()
799 if (HasCC && MI->getOperand(NumOps-1).isDead()) in ReduceToNarrow()
823 unsigned NumOps = MCID.getNumOperands(); in ReduceToNarrow() local
825 if (i < NumOps && MCID.OpInfo[i].isOptionalDef()) in ReduceToNarrow()
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/NextBSD/contrib/llvm/lib/CodeGen/SelectionDAG/
HDScheduleDAGFast.cpp493 unsigned NumOps = Node->getNumOperands(); in DelayForLiveRegsBottomUp() local
494 if (Node->getOperand(NumOps-1).getValueType() == MVT::Glue) in DelayForLiveRegsBottomUp()
495 --NumOps; // Ignore the glue operand. in DelayForLiveRegsBottomUp()
497 for (unsigned i = InlineAsm::Op_FirstOperand; i != NumOps;) { in DelayForLiveRegsBottomUp()
681 unsigned NumOps = N->getNumOperands(); in ScheduleNode() local
682 if (unsigned NumLeft = NumOps) { in ScheduleNode()
688 if (NumLeft == NumOps && Op.getValueType() == MVT::Glue) { in ScheduleNode()
HDLegalizeTypes.cpp425 for (unsigned i = 0, NumOps = I->getNumOperands(); i < NumOps; ++i) in run() local
1042 unsigned NumOps = N->getNumOperands(); in LibCallify() local
1044 if (NumOps == 0) { in LibCallify()
1047 } else if (NumOps == 1) { in LibCallify()
1051 } else if (NumOps == 2) { in LibCallify()
1056 SmallVector<SDValue, 8> Ops(NumOps); in LibCallify()
1057 for (unsigned i = 0; i < NumOps; ++i) in LibCallify()
1061 &Ops[0], NumOps, isSigned, dl).first; in LibCallify()
HDInstrEmitter.cpp614 unsigned NumOps = Node->getNumOperands(); in EmitRegSequence() local
615 assert((NumOps & 1) == 1 && in EmitRegSequence()
617 for (unsigned i = 1; i != NumOps; ++i) { in EmitRegSequence()
935 unsigned NumOps = Node->getNumOperands(); in EmitSpecialNode() local
936 if (Node->getOperand(NumOps-1).getValueType() == MVT::Glue) in EmitSpecialNode()
937 --NumOps; // Ignore the glue operand. in EmitSpecialNode()
962 for (unsigned i = InlineAsm::Op_FirstOperand; i != NumOps;) { in EmitSpecialNode()
HDSelectionDAG.cpp4658 unsigned NumOps = Ops.size(); in getAtomic() local
4659 SDUse *DynOps = NumOps > 4 ? OperandAllocator.Allocate<SDUse>(NumOps) in getAtomic()
4664 Ops.data(), DynOps, NumOps, MMO, in getAtomic()
5321 unsigned NumOps = Ops.size(); in getNode() local
5322 switch (NumOps) { in getNode()
5333 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); in getNode()
5343 assert(NumOps == 5 && "BR_CC takes 5 operands!"); in getNode()
5409 unsigned NumOps = Ops.size(); in getNode() local
5417 if (NumOps == 1) { in getNode()
5420 } else if (NumOps == 2) { in getNode()
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/NextBSD/contrib/llvm/lib/IR/
HDInstruction.cpp23 Instruction::Instruction(Type *ty, unsigned it, Use *Ops, unsigned NumOps, in Instruction() argument
25 : User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(nullptr) { in Instruction()
35 Instruction::Instruction(Type *ty, unsigned it, Use *Ops, unsigned NumOps, in Instruction() argument
37 : User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(nullptr) { in Instruction()
HDInstructions.cpp128 unsigned NumOps = e + e / 2; in growOperands() local
129 if (NumOps < 2) NumOps = 2; // 2 op PHI nodes are VERY common. in growOperands()
131 ReservedSpace = NumOps; in growOperands()
3322 unsigned NumOps = getNumOperands(); in removeCase() local
3326 if (2 + (idx + 1) * 2 != NumOps) { in removeCase()
3327 OL[2 + idx * 2] = OL[NumOps - 2]; in removeCase()
3328 OL[2 + idx * 2 + 1] = OL[NumOps - 1]; in removeCase()
3332 OL[NumOps-2].set(nullptr); in removeCase()
3333 OL[NumOps-2+1].set(nullptr); in removeCase()
3334 setNumHungOffUseOperands(NumOps-2); in removeCase()
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/NextBSD/contrib/llvm/lib/Target/Hexagon/
HDHexagonGenPredicate.cpp355 unsigned NumOps = MI->getNumOperands(); in convertToPredForm() local
356 for (unsigned i = 0; i < NumOps; ++i) { in convertToPredForm()
392 NumOps = 2; in convertToPredForm()
408 for (unsigned i = 1; i < NumOps; ++i) { in convertToPredForm()
/NextBSD/contrib/llvm/lib/Target/X86/
HDX86FloatingPoint.cpp974 unsigned NumOps = MI->getDesc().getNumOperands(); in handleOneArgFP() local
975 assert((NumOps == X86::AddrNumOperands + 1 || NumOps == 1) && in handleOneArgFP()
979 unsigned Reg = getFPReg(MI->getOperand(NumOps-1)); in handleOneArgFP()
1008 MI->RemoveOperand(NumOps-1); // Remove explicit ST(0) operand in handleOneArgFP()
1036 unsigned NumOps = MI->getDesc().getNumOperands(); in handleOneArgFPRW() local
1037 assert(NumOps >= 2 && "FPRW instructions must have 2 ops!!"); in handleOneArgFPRW()
1378 unsigned NumOps = 0; in handleSpecialFP() local
1383 i != e && MI->getOperand(i).isImm(); i += 1 + NumOps) { in handleSpecialFP()
1386 NumOps = InlineAsm::getNumOperandRegisters(Flags); in handleSpecialFP()
1387 if (NumOps != 1) in handleSpecialFP()
HDX86CallFrameOptimization.cpp480 unsigned NumOps = DefMov->getDesc().getNumOperands(); in adjustCallSequence() local
481 for (unsigned i = NumOps - X86::AddrNumOperands; i != NumOps; ++i) in adjustCallSequence()
/NextBSD/contrib/llvm/utils/TableGen/
HDCodeGenInstruction.cpp72 unsigned NumOps = 1; in CGIOperandList() local
94 NumOps = NumArgs; in CGIOperandList()
120 NumOps, MIOpInfo); in CGIOperandList()
121 MIOperandNo += NumOps; in CGIOperandList()
HDDAGISelMatcherEmitter.cpp664 unsigned NumOps = P.getNumOperands(); in EmitPredicateFunctions() local
667 ++NumOps; // Get the chained node too. in EmitPredicateFunctions()
670 OS << " Result.resize(NextRes+" << NumOps << ");\n"; in EmitPredicateFunctions()
685 for (unsigned i = 0; i != NumOps; ++i) in EmitPredicateFunctions()
/NextBSD/sys/contrib/dev/acpica/components/debugger/
HDdbdisply.c399 UINT32 NumOps = 0; in AcpiDbDisplayMethodInfo() local
440 NumOps++; in AcpiDbDisplayMethodInfo()
483 NumOps, NumOperators, NumOperands); in AcpiDbDisplayMethodInfo()

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