| /NextBSD/contrib/llvm/lib/CodeGen/AsmPrinter/ |
| HD | AsmPrinterInlineAsm.cpp | 440 unsigned NumDefs = 0; in EmitInlineAsm() local 441 for (; MI->getOperand(NumDefs).isReg() && MI->getOperand(NumDefs).isDef(); in EmitInlineAsm() 442 ++NumDefs) in EmitInlineAsm() 443 assert(NumDefs != MI->getNumOperands()-2 && "No asm string?"); in EmitInlineAsm() 445 assert(MI->getOperand(NumDefs).isSymbol() && "No asm string?"); in EmitInlineAsm() 448 const char *AsmStr = MI->getOperand(NumDefs).getSymbolName(); in EmitInlineAsm()
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| /NextBSD/contrib/llvm/lib/CodeGen/ |
| HD | ImplicitNullChecks.cpp | 285 unsigned NumDefs = LoadMI->getDesc().getNumDefs(); in insertFaultingLoad() local 286 assert(NumDefs == 1 && "other cases unhandled!"); in insertFaultingLoad() 287 (void)NumDefs; in insertFaultingLoad()
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| HD | MachineCSE.cpp | 533 unsigned NumDefs = MI->getDesc().getNumDefs() + in ProcessBlock() local 536 for (unsigned i = 0, e = MI->getNumOperands(); NumDefs && i != e; ++i) { in ProcessBlock() 554 --NumDefs; in ProcessBlock() 578 --NumDefs; in ProcessBlock()
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| HD | MachineLICM.cpp | 1084 unsigned NumDefs = MI.getDesc().getNumDefs(); in IsCheapInstruction() local 1085 for (unsigned i = 0, e = MI.getNumOperands(); NumDefs && i != e; ++i) { in IsCheapInstruction() 1089 --NumDefs; in IsCheapInstruction()
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| /NextBSD/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| HD | InstrEmitter.cpp | 751 unsigned NumDefs = II.getNumDefs(); in EmitMachineNode() local 762 NumDefs = NumResults; in EmitMachineNode() 769 countOperands(Node, II.getNumOperands() - NumDefs, NumImpUses); in EmitMachineNode() 770 bool HasPhysRegOuts = NumResults > NumDefs && II.getImplicitDefs()!=nullptr; in EmitMachineNode() 793 bool HasOptPRefs = NumDefs > NumResults; in EmitMachineNode() 796 unsigned NumSkip = HasOptPRefs ? NumDefs - NumResults : 0; in EmitMachineNode() 798 AddOperand(MIB, Node->getOperand(i), i-NumSkip+NumDefs, &II, in EmitMachineNode() 835 for (unsigned i = NumDefs; i < NumResults; ++i) { in EmitMachineNode() 836 unsigned Reg = II.getImplicitDefs()[i - NumDefs]; in EmitMachineNode()
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| HD | ScheduleDAGRRList.cpp | 1985 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in MayReduceRegPressure() local 1986 for (unsigned i = 0; i != NumDefs; ++i) { in MayReduceRegPressure() 2032 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in RegPressureDiff() local 2033 for (unsigned i = 0; i != NumDefs; ++i) { in RegPressureDiff() 2162 unsigned NumDefs = TII->get(PN->getMachineOpcode()).getNumDefs(); in unscheduledNode() local 2163 for (unsigned i = 0; i != NumDefs; ++i) { in unscheduledNode() 2179 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in unscheduledNode() local 2180 for (unsigned i = NumDefs, e = N->getNumValues(); i != e; ++i) { in unscheduledNode() 2758 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in canClobberPhysRegDefs() local 2770 for (unsigned i = NumDefs, e = N->getNumValues(); i != e; ++i) { in canClobberPhysRegDefs() [all …]
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| HD | DAGCombiner.cpp | 7026 unsigned NumDefs = 0; in visitTRUNCATE() local 7033 NumDefs++; in visitTRUNCATE() 7036 if (NumDefs > 1) in visitTRUNCATE() 7043 if (NumDefs == 0) in visitTRUNCATE() 7046 if (NumDefs == 1) { in visitTRUNCATE() 11887 unsigned NumDefs = 0; in reduceBuildVecConvertToConvertBuildVec() local 11913 NumDefs++; in reduceBuildVecConvertToConvertBuildVec() 11918 if (NumDefs < 2) in reduceBuildVecConvertToConvertBuildVec()
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| /NextBSD/contrib/llvm/include/llvm/MC/ |
| HD | MCInstrDesc.h | 142 unsigned char NumDefs; // Num of args that are definitions variable 191 unsigned getNumDefs() const { return NumDefs; } in getNumDefs()
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| /NextBSD/contrib/llvm/lib/MC/ |
| HD | MCInstrDesc.cpp | 65 for (int i = 0, e = NumDefs; i != e; ++i) in hasDefOfPhysReg()
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| /NextBSD/contrib/llvm/utils/TableGen/ |
| HD | CodeGenInstruction.cpp | 41 NumDefs = OutDI->getNumArgs(); in CGIOperandList() 55 if (i < NumDefs) { in CGIOperandList() 59 ArgInit = InDI->getArg(i-NumDefs); in CGIOperandList() 60 ArgName = InDI->getArgName(i-NumDefs); in CGIOperandList()
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| HD | CodeGenInstruction.h | 134 unsigned NumDefs; variable
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| HD | InstrInfoEmitter.cpp | 477 << Inst.Operands.NumDefs << ",\t" in emitRecord()
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| HD | CodeGenDAGPatterns.cpp | 1199 unsigned NumDefsToAdd = InstInfo.Operands.NumDefs; in GetNumNodeResults() 1202 for (unsigned i = 0; i != InstInfo.Operands.NumDefs; ++i) { in GetNumNodeResults() 1784 unsigned NumResultsToAdd = std::min(InstInfo.Operands.NumDefs, in ApplyTypeConstraints() 3087 for (unsigned j = 0, e = InstInfo.Operands.NumDefs; j < e; ++j) in ParseInstructions() 3091 for (unsigned j = InstInfo.Operands.NumDefs, in ParseInstructions()
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| /NextBSD/contrib/llvm/lib/Target/Hexagon/ |
| HD | HexagonBitTracker.cpp | 125 unsigned NumDefs = 0; in evaluate() local 132 NumDefs++; in evaluate() 136 if (NumDefs == 0) in evaluate()
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| /NextBSD/contrib/llvm/lib/MC/MCParser/ |
| HD | AsmParser.cpp | 4584 unsigned NumDefs = Desc.getNumDefs(); in parseMSInlineAsm() local 4586 if (NumDefs && Operand.getMCOperandNum() < NumDefs) in parseMSInlineAsm()
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| /NextBSD/contrib/llvm/lib/Target/X86/ |
| HD | X86InstrInfo.cpp | 5661 unsigned NumDefs = MCID.NumDefs; in unfoldMemoryOperand() local 5669 if (i >= Index-NumDefs && i < Index-NumDefs + X86::AddrNumOperands) in unfoldMemoryOperand() 5671 else if (i < Index-NumDefs) in unfoldMemoryOperand() 5673 else if (i > Index-NumDefs) in unfoldMemoryOperand()
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