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Searched refs:Neg (Results 1 – 24 of 24) sorted by relevance

/NextBSD/contrib/llvm/include/llvm/ADT/
HDAPFloat.h568 void makeLargest(bool Neg = false);
569 void makeSmallest(bool Neg = false);
570 void makeNaN(bool SNaN = false, bool Neg = false,
574 void makeInf(bool Neg = false);
575 void makeZero(bool Neg = false);
/NextBSD/contrib/llvm/lib/Option/
HDArgList.cpp220 bool ArgList::hasFlag(OptSpecifier Pos, OptSpecifier Neg, bool Default) const { in hasFlag() argument
221 if (Arg *A = getLastArg(Pos, Neg)) in hasFlag()
226 bool ArgList::hasFlag(OptSpecifier Pos, OptSpecifier PosAlias, OptSpecifier Neg, in hasFlag() argument
228 if (Arg *A = getLastArg(Pos, PosAlias, Neg)) in hasFlag()
/NextBSD/usr.sbin/ppp/
HDccp.c186 if (IsEnabled(ccp->cfg.neg[algorithm[f]->Neg])) in ccp_ReportStatus()
303 if (IsEnabled(ccp->cfg.neg[algorithm[f]->Neg]) && in ccp_Required()
359 if (IsEnabled(ccp->cfg.neg[algorithm[f]->Neg]) && in CcpSendConfigReq()
506 if (IsEnabled(ccp->cfg.neg[algorithm[f]->Neg]) && in CcpLayerUp()
540 if (IsEnabled(ccp->cfg.neg[algorithm[f]->Neg])) in CcpLayerUp()
604 if (IsAccepted(ccp->cfg.neg[algorithm[f]->Neg]) && in CcpDecodeConfig()
HDccp.h125 int Neg; /* ccp_config neg array item */ member
/NextBSD/contrib/llvm/lib/Support/
HDraw_ostream.cpp439 bool Neg = (FN.DecValue < 0); in operator <<() local
440 uint64_t N = Neg ? -static_cast<uint64_t>(FN.DecValue) : FN.DecValue; in operator <<()
447 if (Neg) in operator <<()
451 if (Neg) in operator <<()
/NextBSD/contrib/llvm/lib/Transforms/Scalar/
HDReassociate.cpp386 static BinaryOperator *LowerNegateToMultiply(Instruction *Neg) { in LowerNegateToMultiply() argument
387 Type *Ty = Neg->getType(); in LowerNegateToMultiply()
391 BinaryOperator *Res = CreateMul(Neg->getOperand(1), NegOne, "", Neg, Neg); in LowerNegateToMultiply()
392 Neg->setOperand(1, Constant::getNullValue(Ty)); // Drop use of op. in LowerNegateToMultiply()
393 Res->takeName(Neg); in LowerNegateToMultiply()
394 Neg->replaceAllUsesWith(Res); in LowerNegateToMultiply()
395 Res->setDebugLoc(Neg->getDebugLoc()); in LowerNegateToMultiply()
/NextBSD/contrib/llvm/tools/clang/include/clang/Analysis/Analyses/
HDThreadSafety.h175 virtual void handleNegativeNotHeld(StringRef Kind, Name LockName, Name Neg, in handleNegativeNotHeld() argument
HDThreadSafetyCommon.h263 CapabilityExpr(const til::SExpr *E, bool Neg) : CapExpr(E), Negated(Neg) {} in CapabilityExpr() argument
/NextBSD/contrib/llvm/tools/clang/lib/Analysis/
HDThreadSafetyCommon.cpp169 bool Neg = false; in translateAttrExpr() local
172 Neg = true; in translateAttrExpr()
178 Neg = true; in translateAttrExpr()
193 return CapabilityExpr(CE->expr(), Neg); in translateAttrExpr()
195 return CapabilityExpr(E, Neg); in translateAttrExpr()
HDThreadSafety.cpp940 Expr *BrE, bool Neg);
1290 Expr *BrE, bool Neg) { in getMutexIDs() argument
1299 if (Neg) in getMutexIDs()
/NextBSD/contrib/llvm/include/llvm/Option/
HDArgList.h248 bool hasFlag(OptSpecifier Pos, OptSpecifier Neg, bool Default=true) const;
254 bool hasFlag(OptSpecifier Pos, OptSpecifier PosAlias, OptSpecifier Neg,
/NextBSD/contrib/llvm/lib/Transforms/InstCombine/
HDInstCombineMulDivRem.cpp308 Value *Neg = dyn_castNegVal(Op1C); in visitMul() local
310 (BO->getOperand(1) == Op1C || BO->getOperand(1) == Neg) && in visitMul()
663 Value *Neg = Builder->CreateFNeg(T); in visitFMul() local
664 Neg->takeName(&I); in visitFMul()
665 return ReplaceInstUsesWith(I, Neg); in visitFMul()
HDInstCombineCompares.cpp1785 Value *Neg = Builder->CreateNeg(BOp1); in visitICmpInstWithInstAndIntCst() local
1786 Neg->takeName(BO); in visitICmpInstWithInstAndIntCst()
1787 return new ICmpInst(ICI.getPredicate(), BOp0, Neg); in visitICmpInstWithInstAndIntCst()
/NextBSD/contrib/llvm/lib/Target/AMDGPU/
HDR600ISelLowering.cpp2044 FoldOperand(SDNode *ParentNode, unsigned SrcIdx, SDValue &Src, SDValue &Neg, in FoldOperand() argument
2052 if (!Neg.getNode()) in FoldOperand()
2055 Neg = DAG.getTargetConstant(1, SDLoc(ParentNode), MVT::i32); in FoldOperand()
2215 SDValue &Neg = Ops[NegIdx[i] - 1]; in PostISelFolding() local
2222 if (FoldOperand(Node, i, Src, Neg, Abs, Sel, FakeOp, DAG)) in PostISelFolding()
2267 SDValue &Neg = Ops[NegIdx[i] - 1]; in PostISelFolding() local
2279 if (FoldOperand(Node, i, Src, Neg, Abs, Sel, Imm, DAG)) in PostISelFolding()
HDAMDGPUISelDAGToDAG.cpp53 bool FoldOperand(SDValue &Src, SDValue &Sel, SDValue &Neg, SDValue &Abs,
HDAMDGPUISelLowering.cpp1068 SDValue Neg = DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, DL, VT), in LowerIntrinsicIABS() local
1071 return DAG.getNode(ISD::SMAX, DL, VT, Neg, Op.getOperand(1)); in LowerIntrinsicIABS()
/NextBSD/contrib/llvm/utils/TableGen/
HDAsmMatcherEmitter.cpp2298 bool Neg = false; in emitComputeAvailableFeatures() local
2301 Neg = true; in emitComputeAvailableFeatures()
2306 if (Neg) in emitComputeAvailableFeatures()
/NextBSD/contrib/llvm/tools/clang/lib/Sema/
HDAnalysisBasedWarnings.cpp1665 void handleNegativeNotHeld(StringRef Kind, Name LockName, Name Neg, in handleNegativeNotHeld() argument
1669 << Kind << LockName << Neg); in handleNegativeNotHeld()
/NextBSD/contrib/llvm/lib/Target/X86/
HDX86ISelDAGToDAG.cpp1225 SDValue Neg = CurDAG->getNode(ISD::SUB, dl, N.getValueType(), Zero, RHS); in MatchAddressRecursively() local
1226 AM.IndexReg = Neg; in MatchAddressRecursively()
1231 InsertDAGNode(*CurDAG, N, Neg); in MatchAddressRecursively()
HDX86ISelLowering.cpp14046 SDValue Neg = DAG.getNode(X86ISD::SUB, DL, VTs, in LowerSELECT() local
14052 SDValue(Neg.getNode(), 1)); in LowerSELECT()
23905 SDValue Neg = DAG.getNode(X86ISD::SUB, DL, DAG.getVTList(VT, MVT::i32), in performIntegerAbsCombine() local
23908 SDValue Ops[] = { N0.getOperand(0), Neg, in performIntegerAbsCombine()
23910 SDValue(Neg.getNode(), 1) }; in performIntegerAbsCombine()
/NextBSD/contrib/llvm/lib/Transforms/Utils/
HDSimplifyLibCalls.cpp1459 Value *Neg = B.CreateNeg(Op, "neg"); in optimizeAbs() local
1460 return B.CreateSelect(Pos, Op, Neg); in optimizeAbs()
/NextBSD/contrib/llvm/lib/CodeGen/SelectionDAG/
HDDAGCombiner.cpp352 SDNode *MatchRotatePosNeg(SDValue Shifted, SDValue Pos, SDValue Neg,
3738 static bool matchRotateSub(SDValue Pos, SDValue Neg, unsigned OpSize) { in matchRotateSub() argument
3771 if (Neg.getOpcode() == ISD::AND && in matchRotateSub()
3773 Neg.getOperand(1).getOpcode() == ISD::Constant && in matchRotateSub()
3774 cast<ConstantSDNode>(Neg.getOperand(1))->getAPIntValue() == OpSize - 1) { in matchRotateSub()
3775 Neg = Neg.getOperand(0); in matchRotateSub()
3780 if (Neg.getOpcode() != ISD::SUB) in matchRotateSub()
3782 ConstantSDNode *NegC = dyn_cast<ConstantSDNode>(Neg.getOperand(0)); in matchRotateSub()
3785 SDValue NegOp1 = Neg.getOperand(1); in matchRotateSub()
3837 SDValue Neg, SDValue InnerPos, in MatchRotatePosNeg() argument
[all …]
/NextBSD/contrib/llvm/lib/Target/SystemZ/
HDSystemZISelLowering.cpp2338 static bool isAbsolute(SDValue CmpOp, SDValue Pos, SDValue Neg) { in isAbsolute() argument
2339 return (Neg.getOpcode() == ISD::SUB && in isAbsolute()
2340 Neg.getOperand(0).getOpcode() == ISD::Constant && in isAbsolute()
2341 cast<ConstantSDNode>(Neg.getOperand(0))->getZExtValue() == 0 && in isAbsolute()
2342 Neg.getOperand(1) == Pos && in isAbsolute()
/NextBSD/contrib/llvm/lib/Target/AArch64/
HDAArch64ISelLowering.cpp7057 SDValue Neg = DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, DL, VT), in performIntegerAbsCombine() local
7063 return DAG.getNode(AArch64ISD::CSEL, DL, VT, N0.getOperand(0), Neg, in performIntegerAbsCombine()