| /NextBSD/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| HD | TargetLowering.cpp | 646 EVT InnerVT = InnerOp.getValueType(); in SimplifyDemandedBits() local
647 unsigned InnerBits = InnerVT.getSizeInBits(); in SimplifyDemandedBits()
649 isTypeDesirableForOp(ISD::SHL, InnerVT)) { in SimplifyDemandedBits()
650 EVT ShTy = getShiftAmountTy(InnerVT, DL); in SimplifyDemandedBits()
652 ShTy = InnerVT; in SimplifyDemandedBits()
654 TLO.DAG.getNode(ISD::SHL, dl, InnerVT, InnerOp, in SimplifyDemandedBits()
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| HD | DAGCombiner.cpp | 12743 EVT InnerVT = BC0->getValueType(0); in visitVECTOR_SHUFFLE() local
12744 EVT InnerSVT = InnerVT.getScalarType(); in visitVECTOR_SHUFFLE()
12747 EVT ScaleVT = SVT.bitsLT(InnerSVT) ? VT : InnerVT; in visitVECTOR_SHUFFLE()
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| /NextBSD/contrib/llvm/lib/Target/SystemZ/ |
| HD | SystemZISelLowering.cpp | 275 for (MVT InnerVT : MVT::vector_valuetypes()) { in SystemZTargetLowering() local
276 setTruncStoreAction(VT, InnerVT, Expand); in SystemZTargetLowering()
277 setLoadExtAction(ISD::SEXTLOAD, VT, InnerVT, Expand); in SystemZTargetLowering()
278 setLoadExtAction(ISD::ZEXTLOAD, VT, InnerVT, Expand); in SystemZTargetLowering()
279 setLoadExtAction(ISD::EXTLOAD, VT, InnerVT, Expand); in SystemZTargetLowering()
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| /NextBSD/contrib/llvm/lib/Target/AArch64/ |
| HD | AArch64ISelLowering.cpp | 599 for (MVT InnerVT : MVT::vector_valuetypes()) { in AArch64TargetLowering() local
600 setTruncStoreAction(VT, InnerVT, Expand); in AArch64TargetLowering()
601 setLoadExtAction(ISD::SEXTLOAD, VT, InnerVT, Expand); in AArch64TargetLowering()
602 setLoadExtAction(ISD::ZEXTLOAD, VT, InnerVT, Expand); in AArch64TargetLowering()
603 setLoadExtAction(ISD::EXTLOAD, VT, InnerVT, Expand); in AArch64TargetLowering()
667 for (MVT InnerVT : MVT::all_valuetypes()) in addTypeForNEON() local
668 setLoadExtAction(ISD::EXTLOAD, InnerVT, VT.getSimpleVT(), Expand); in addTypeForNEON()
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| /NextBSD/contrib/llvm/lib/Target/PowerPC/ |
| HD | PPCISelLowering.cpp | 481 for (MVT InnerVT : MVT::vector_valuetypes()) { in PPCTargetLowering() local
482 setTruncStoreAction(VT, InnerVT, Expand); in PPCTargetLowering()
483 setLoadExtAction(ISD::SEXTLOAD, VT, InnerVT, Expand); in PPCTargetLowering()
484 setLoadExtAction(ISD::ZEXTLOAD, VT, InnerVT, Expand); in PPCTargetLowering()
485 setLoadExtAction(ISD::EXTLOAD, VT, InnerVT, Expand); in PPCTargetLowering()
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| /NextBSD/contrib/llvm/lib/Target/ARM/ |
| HD | ARMISelLowering.cpp | 406 for (MVT InnerVT : MVT::vector_valuetypes()) { in ARMTargetLowering() local
407 setTruncStoreAction(VT, InnerVT, Expand); in ARMTargetLowering()
408 setLoadExtAction(ISD::SEXTLOAD, VT, InnerVT, Expand); in ARMTargetLowering()
409 setLoadExtAction(ISD::ZEXTLOAD, VT, InnerVT, Expand); in ARMTargetLowering()
410 setLoadExtAction(ISD::EXTLOAD, VT, InnerVT, Expand); in ARMTargetLowering()
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| /NextBSD/contrib/llvm/lib/Target/X86/ |
| HD | X86ISelLowering.cpp | 735 for (MVT InnerVT : MVT::vector_valuetypes()) { in X86TargetLowering() local
736 setTruncStoreAction(InnerVT, VT, Expand); in X86TargetLowering()
738 setLoadExtAction(ISD::SEXTLOAD, InnerVT, VT, Expand); in X86TargetLowering()
739 setLoadExtAction(ISD::ZEXTLOAD, InnerVT, VT, Expand); in X86TargetLowering()
746 setLoadExtAction(ISD::EXTLOAD, InnerVT, VT, Expand); in X86TargetLowering()
751 setLoadExtAction(ISD::EXTLOAD, InnerVT, VT, Expand); in X86TargetLowering()
25338 MVT InnerVT = V.getSimpleValueType(); in performVZEXTCombine() local
25339 MVT InnerEltVT = InnerVT.getVectorElementType(); in performVZEXTCombine()
25344 assert(OpVT == InnerVT && "Types must match for vzext!"); in performVZEXTCombine()
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