| /NextBSD/contrib/llvm/lib/Target/Hexagon/ |
| HD | HexagonSplitConst32AndConst64.cpp | 112 int64_t ImmValue; in runOnMachineFunction() local
115 ImmValue = *Val.bitcastToAPInt().getRawData(); in runOnMachineFunction()
118 ImmValue = MI->getOperand(1).getImm(); in runOnMachineFunction()
121 TII->get(Hexagon::A2_tfrsi), DestReg).addImm(ImmValue); in runOnMachineFunction()
131 int64_t ImmValue; in runOnMachineFunction() local
134 ImmValue = *Val.bitcastToAPInt().getRawData(); in runOnMachineFunction()
137 ImmValue = MI->getOperand(1).getImm(); in runOnMachineFunction()
142 int32_t LowWord = (ImmValue & 0xFFFFFFFF); in runOnMachineFunction()
143 int32_t HighWord = (ImmValue >> 32) & 0xFFFFFFFF; in runOnMachineFunction()
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| HD | HexagonInstrInfo.cpp | 1821 int ImmValue = MO.getImm(); in isConstExtended() local
1823 return (ImmValue < MinValue || ImmValue > MaxValue); in isConstExtended()
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| HD | HexagonHardwareLoops.cpp | 620 int Mask = 0, ImmValue = 0; in getLoopTripCount() local
622 Mask, ImmValue); in getLoopTripCount()
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| HD | HexagonInstrInfoV4.td | 2491 bits<6> ImmValue = !if(MajOp, src2{5-0}, src2{7-2});
2495 let Inst{22-21} = ImmValue{5-4};
2497 let Inst{13} = ImmValue{3};
2499 let Inst{7-5} = ImmValue{2-0};
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| /NextBSD/contrib/llvm/lib/Target/Mips/ |
| HD | MipsSEISelDAGToDAG.cpp | 523 APInt ImmValue; in selectVSplatCommon() local
529 if (selectVSplat(N.getNode(), ImmValue, EltTy.getSizeInBits()) && in selectVSplatCommon()
530 ImmValue.getBitWidth() == EltTy.getSizeInBits()) { in selectVSplatCommon()
532 if (( Signed && ImmValue.isSignedIntN(ImmBitSize)) || in selectVSplatCommon()
533 (!Signed && ImmValue.isIntN(ImmBitSize))) { in selectVSplatCommon()
534 Imm = CurDAG->getTargetConstant(ImmValue, SDLoc(N), EltTy); in selectVSplatCommon()
599 APInt ImmValue; in selectVSplatUimmPow2() local
605 if (selectVSplat(N.getNode(), ImmValue, EltTy.getSizeInBits()) && in selectVSplatUimmPow2()
606 ImmValue.getBitWidth() == EltTy.getSizeInBits()) { in selectVSplatUimmPow2()
607 int32_t Log2 = ImmValue.exactLogBase2(); in selectVSplatUimmPow2()
[all …]
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| /NextBSD/contrib/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| HD | HexagonInstPrinter.cpp | 199 int ImmValue = MO.getImm(); in printExtOperand() local
200 if (ImmValue < getMinValue(MII.TSFlags) || in printExtOperand()
201 ImmValue > getMaxValue(MII.TSFlags)) in printExtOperand()
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| HD | HexagonMCInstrInfo.cpp | 307 int ImmValue = MO.getImm(); in isConstExtended() local
308 return (ImmValue < MinValue || ImmValue > MaxValue); in isConstExtended()
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| /NextBSD/contrib/llvm/lib/Object/ |
| HD | MachOObjectFile.cpp | 1426 uint8_t ImmValue = Byte & MachO::REBASE_IMMEDIATE_MASK; in moveNext() local
1436 RebaseType = ImmValue; in moveNext()
1443 SegmentIndex = ImmValue; in moveNext()
1460 SegmentOffset += ImmValue * PointerSize; in moveNext()
1468 RemainingLoopCount = ImmValue - 1; in moveNext()
1600 uint8_t ImmValue = Byte & MachO::BIND_IMMEDIATE_MASK; in moveNext() local
1624 Ordinal = ImmValue; in moveNext()
1638 if (ImmValue) { in moveNext()
1639 SignExtended = MachO::BIND_OPCODE_MASK | ImmValue; in moveNext()
1649 Flags = ImmValue; in moveNext()
[all …]
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| /NextBSD/contrib/llvm/lib/Target/Mips/AsmParser/ |
| HD | MipsAsmParser.cpp | 186 bool loadImmediate(int64_t ImmValue, unsigned DstReg, unsigned SrcReg,
1835 bool MipsAsmParser::loadImmediate(int64_t ImmValue, unsigned DstReg, in loadImmediate() argument
1844 if (isInt<32>(ImmValue) || isUInt<32>(ImmValue)) { in loadImmediate()
1848 ImmValue = SignExtend64<32>(ImmValue); in loadImmediate()
1871 if (isInt<16>(ImmValue)) { in loadImmediate()
1875 emitRRI(Mips::ADDiu, DstReg, SrcReg, ImmValue, IDLoc, Instructions); in loadImmediate()
1876 } else if (isUInt<16>(ImmValue)) { in loadImmediate()
1886 emitRRI(Mips::ORi, TmpReg, Mips::ZERO, ImmValue, IDLoc, Instructions); in loadImmediate()
1889 } else if (isInt<32>(ImmValue) || isUInt<32>(ImmValue)) { in loadImmediate()
1895 uint16_t Bits31To16 = (ImmValue >> 16) & 0xffff; in loadImmediate()
[all …]
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| /NextBSD/contrib/llvm/lib/Target/Sparc/AsmParser/ |
| HD | SparcAsmParser.cpp | 410 uint64_t ImmValue = IsImm ? MCValOp.getImm() : 0; in expandSET() local
413 ValExpr = MCConstantExpr::create(ImmValue, getContext()); in expandSET()
419 if (!IsImm || (ImmValue & ~0x1fff)) { in expandSET()
431 if (!IsImm || ((ImmValue & 0x1fff) != 0 || ImmValue == 0)) { in expandSET()
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| /NextBSD/contrib/llvm/lib/Target/AMDGPU/ |
| HD | R600ISelLowering.cpp | 2120 uint64_t ImmValue = 0; in FoldOperand() local
2133 ImmValue = FPC->getValueAPF().bitcastToAPInt().getZExtValue(); in FoldOperand()
2143 ImmValue = Value; in FoldOperand()
2157 Imm = DAG.getTargetConstant(ImmValue, SDLoc(ParentNode), MVT::i32); in FoldOperand()
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| /NextBSD/contrib/llvm/lib/Target/ARM/ |
| HD | ARMBaseInstrInfo.cpp | 2316 unsigned SrcReg2, int ImmValue, in isRedundantFlagInstr() argument
2333 OI->getOperand(2).getImm() == ImmValue) in isRedundantFlagInstr()
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| /NextBSD/contrib/llvm/lib/Target/X86/ |
| HD | X86InstrInfo.cpp | 4221 unsigned SrcReg2, int ImmValue, in isRedundantFlagInstr() argument
4252 OI->getOperand(2).getImm() == ImmValue) in isRedundantFlagInstr()
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