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Searched refs:INTSTAT (Results 1 – 20 of 20) sorted by relevance

/NextBSD/sys/dev/aic/
HDaic.c480 while (!(aic_inb(aic, DMASTAT) & INTSTAT) && in aic_spiordy()
483 return !(aic_inb(aic, DMASTAT) & INTSTAT); in aic_spiordy()
877 if (dmastat & (INTSTAT|DFIFOFULL)) in aic_datain()
915 if (dmastat & INTSTAT) in aic_datain()
947 if (dmastat & (INTSTAT|DFIFOEMP)) in aic_dataout()
950 if (dmastat & INTSTAT) in aic_dataout()
983 if (dmastat & INTSTAT) { in aic_dataout()
1029 (aic_inb(aic, DMASTAT) & INTSTAT) == 0) in aic_cmd()
1189 if (!(aic_inb(aic, DMASTAT) & INTSTAT)) in aic_intr_locked()
HDaic6360reg.h293 #define INTSTAT 0x20 macro
/NextBSD/sys/dev/tx/
HDif_tx.c870 while (i-- && ((status = CSR_READ_4(sc, INTSTAT)) & INTSTAT_INT_ACTV)) { in epic_intr()
871 CSR_WRITE_4(sc, INTSTAT, status); in epic_intr()
1308 CSR_WRITE_4(sc, INTSTAT, CSR_READ_4(sc, INTSTAT)); in epic_init_locked()
1442 status = CSR_READ_4(sc, INTSTAT) & in epic_stop_activity()
1453 status = CSR_READ_4(sc, INTSTAT); in epic_stop_activity()
1529 if (CSR_READ_4(sc, INTSTAT) & INTSTAT_TXIDLE) in epic_queue_last_packet()
1534 if ((CSR_READ_4(sc, INTSTAT) & INTSTAT_TXIDLE) == 0) in epic_queue_last_packet()
HDif_txreg.h41 #define INTSTAT 0x0004 /* Interrupt status. See below */ macro
/NextBSD/sys/dev/aic7xxx/
HDaic79xx_pci.c517 if ((ahd_inb(ahd, INTSTAT) & PCIINT) != 0) { in ahd_pci_test_register_access()
529 if ((ahd_inb(ahd, INTSTAT) & PCIINT) != 0) { in ahd_pci_test_register_access()
838 intstat = ahd_inb(ahd, INTSTAT); in ahd_pci_intr()
HDaic79xx_osm.h190 ahd_inb(ahd, INTSTAT); in ahd_flush_device_writes()
HDaic7xxx_osm.h186 ahc_inb(ahc, INTSTAT); in ahc_flush_device_writes()
HDaic7xxx_inline.h114 if ((ahc_inb(ahc, INTSTAT) & (SCSIINT | SEQINT | BRKADRINT)) == 0) in ahc_unpause()
593 intstat = ahc_inb(ahc, INTSTAT); in ahc_intr()
HDaic79xx_inline.h226 if ((ahd_inb(ahd, INTSTAT) & ~CMDCMPLT) == 0) in ahd_unpause()
921 intstat = ahd_inb(ahd, INTSTAT); in ahd_intr()
HDaic7xxx.seq644 mvi INTSTAT,CMDCMPLT ret;
1693 mvi INTSTAT,CMDCMPLT ret;
1828 mvi INTSTAT, OUT_OF_RANGE;
1832 mvi INTSTAT, OUT_OF_RANGE;
1840 mvi INTSTAT, OUT_OF_RANGE;
1844 mvi INTSTAT, OUT_OF_RANGE;
2400 mov INTSTAT, SINDEX;
HDaic7xxx_pci.c1196 if ((ahc_inb(ahc, INTSTAT) & BRKADRINT) == 0 in ahc_probe_ext_scbram()
1208 && ((ahc_inb(ahc, INTSTAT) & BRKADRINT) == 0 in ahc_probe_ext_scbram()
HDaic7xxx_reg.h1518 #define INTSTAT 0x91 macro
HDaic7xxx.c5206 intstat = ahc_inb(ahc, INTSTAT); in ahc_pause_and_flushwork()
5209 intstat = ahc_inb(ahc, INTSTAT); in ahc_pause_and_flushwork()
5217 ahc_inb(ahc, INTSTAT)); in ahc_pause_and_flushwork()
HDaic79xx.c7167 intstat = ahd_inb(ahd, INTSTAT); in ahd_pause_and_flushwork()
7170 intstat = ahd_inb(ahd, INTSTAT); in ahd_pause_and_flushwork()
7180 ahd_inb(ahd, INTSTAT)); in ahd_pause_and_flushwork()
9035 ahd_intstat_print(ahd_inb(ahd, INTSTAT), &cur_col, 50); in ahd_dump_card_state()
HDaic7xxx.reg800 register INTSTAT {
HDaic79xx_reg.h2388 #define INTSTAT 0x01 macro
HDaic79xx.reg102 register INTSTAT {
HDaic79xx.seq286 mvi INTSTAT, CMDCMPLT;
/NextBSD/sys/dev/ahb/
HDahbreg.h98 #define INTSTAT 0x0D6 macro
HDahb.c853 intstat = ahb_inb(ahb, INTSTAT); in ahbintr_locked()