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Searched refs:IC (Results 1 – 25 of 70) sorted by relevance

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/NextBSD/contrib/binutils/opcodes/
HDia64-raw.tbl2 ALAT; chk.a.clr, IC:mem-readers-alat, IC:mem-writers, IC:invala-all; IC:mem-readers-alat, IC:mem-wr…
3 ….call, brl.call, br.ret, cover, IC:mov-to-AR-BSPSTORE, rfi; br.call, brl.call, br.ia, br.ret, cove…
4 AR[BSPSTORE]; alloc, loadrs, flushrs, IC:mov-to-AR-BSPSTORE; alloc, br.ia, flushrs, IC:mov-from-AR-…
5 AR[CCV]; IC:mov-to-AR-CCV; br.ia, IC:cmpxchg, IC:mov-from-AR-CCV; impliedF
6 AR[CFLG]; IC:mov-to-AR-CFLG; br.ia, IC:mov-from-AR-CFLG; impliedF
7 AR[CSD]; ld16, IC:mov-to-AR-CSD; br.ia, cmp8xchg16, IC:mov-from-AR-CSD, st16; impliedF
8 AR[EC]; IC:mod-sched-brs, br.ret, IC:mov-to-AR-EC; br.call, brl.call, br.ia, IC:mod-sched-brs, IC:m…
9 AR[EFLAG]; IC:mov-to-AR-EFLAG; br.ia, IC:mov-from-AR-EFLAG; impliedF
10 AR[FCR]; IC:mov-to-AR-FCR; br.ia, IC:mov-from-AR-FCR; impliedF
11 AR[FDR]; IC:mov-to-AR-FDR; br.ia, IC:mov-from-AR-FDR; impliedF
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HDia64-waw.tbl2 ALAT; IC:mem-readers-alat, IC:mem-writers, chk.a.clr, IC:invala-all; IC:mem-readers-alat, IC:mem-wr…
3 AR[BSP]; br.call, brl.call, br.ret, cover, IC:mov-to-AR-BSPSTORE, rfi; br.call, brl.call, br.ret, c…
4 AR[BSPSTORE]; alloc, loadrs, flushrs, IC:mov-to-AR-BSPSTORE; alloc, loadrs, flushrs, IC:mov-to-AR-B…
5 AR[CCV]; IC:mov-to-AR-CCV; IC:mov-to-AR-CCV; impliedF
6 AR[CFLG]; IC:mov-to-AR-CFLG; IC:mov-to-AR-CFLG; impliedF
7 AR[CSD]; ld16, IC:mov-to-AR-CSD; ld16, IC:mov-to-AR-CSD; impliedF
8 AR[EC]; br.ret, IC:mod-sched-brs, IC:mov-to-AR-EC; br.ret, IC:mod-sched-brs, IC:mov-to-AR-EC; impli…
9 AR[EFLAG]; IC:mov-to-AR-EFLAG; IC:mov-to-AR-EFLAG; impliedF
10 AR[FCR]; IC:mov-to-AR-FCR; IC:mov-to-AR-FCR; impliedF
11 AR[FDR]; IC:mov-to-AR-FDR; IC:mov-to-AR-FDR; impliedF
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HDia64-ic.tbl2 all; IC:predicatable-instructions, IC:unpredicatable-instructions
3 branches; IC:indirect-brs, IC:ip-rel-brs
4 …IC:fr-readers, IC:fr-writers, IC:gr-readers, IC:gr-writers, IC:mod-sched-brs, IC:predicatable-inst…
14 fp-arith-s0; IC:fp-arith[Field(sf)==s0]
15 fp-arith-s1; IC:fp-arith[Field(sf)==s1]
16 fp-arith-s2; IC:fp-arith[Field(sf)==s2]
17 fp-arith-s3; IC:fp-arith[Field(sf)==s3]
23 fr-readers; IC:fp-arith, IC:fp-non-arith, IC:mem-writers-fp, IC:pr-writers-fp, chk.s[Format in {M21…
24 fr-writers; IC:fp-arith, IC:fp-non-arith\fclass, IC:mem-readers-fp, setf
25 …IC:gr-readers-writers, IC:mem-readers, IC:mem-writers, chk.s, cmp, cmp4, fc, itc.i, itc.d, itr.i, …
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HDia64-war.tbl2 PR63; IC:pr-readers-br+1; IC:mod-sched-brs; stop
/NextBSD/contrib/llvm/lib/Transforms/InstCombine/
HDInstCombineLoadStoreAlloca.cpp167 static Instruction *simplifyAllocaArraySize(InstCombiner &IC, AllocaInst &AI) { in simplifyAllocaArraySize() argument
175 Value *V = IC.Builder->getInt32(1); in simplifyAllocaArraySize()
183 AllocaInst *New = IC.Builder->CreateAlloca(NewTy, nullptr, AI.getName()); in simplifyAllocaArraySize()
196 Type *IdxTy = IC.getDataLayout().getIntPtrType(AI.getType()); in simplifyAllocaArraySize()
201 IC.InsertNewInstBefore(GEP, *It); in simplifyAllocaArraySize()
205 return IC.ReplaceInstUsesWith(AI, GEP); in simplifyAllocaArraySize()
209 return IC.ReplaceInstUsesWith(AI, Constant::getNullValue(AI.getType())); in simplifyAllocaArraySize()
213 Type *IntPtrTy = IC.getDataLayout().getIntPtrType(AI.getType()); in simplifyAllocaArraySize()
215 Value *V = IC.Builder->CreateIntCast(AI.getArraySize(), IntPtrTy, false); in simplifyAllocaArraySize()
317 static LoadInst *combineLoadToNewType(InstCombiner &IC, LoadInst &LI, Type *NewTy, in combineLoadToNewType() argument
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HDInstCombineShifts.cpp71 InstCombiner &IC, Instruction *CxtI) { in CanEvaluateShifted() argument
114 return CanEvaluateShifted(I->getOperand(0), NumBits, isLeftShift, IC, I) && in CanEvaluateShifted()
115 CanEvaluateShifted(I->getOperand(1), NumBits, isLeftShift, IC, I); in CanEvaluateShifted()
134 if (IC.MaskedValueIsZero(I->getOperand(0), in CanEvaluateShifted()
159 if (IC.MaskedValueIsZero(I->getOperand(0), in CanEvaluateShifted()
170 IC, SI) && in CanEvaluateShifted()
171 CanEvaluateShifted(SI->getFalseValue(), NumBits, isLeftShift, IC, SI); in CanEvaluateShifted()
180 IC, PN)) in CanEvaluateShifted()
190 InstCombiner &IC, const DataLayout &DL) { in GetShiftedValue() argument
194 V = IC.Builder->CreateShl(C, NumBits); in GetShiftedValue()
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HDInstCombineCasts.cpp332 static bool CanEvaluateTruncated(Value *V, Type *Ty, InstCombiner &IC, in CanEvaluateTruncated() argument
362 return CanEvaluateTruncated(I->getOperand(0), Ty, IC, CxtI) && in CanEvaluateTruncated()
363 CanEvaluateTruncated(I->getOperand(1), Ty, IC, CxtI); in CanEvaluateTruncated()
372 if (IC.MaskedValueIsZero(I->getOperand(0), Mask, 0, CxtI) && in CanEvaluateTruncated()
373 IC.MaskedValueIsZero(I->getOperand(1), Mask, 0, CxtI)) { in CanEvaluateTruncated()
374 return CanEvaluateTruncated(I->getOperand(0), Ty, IC, CxtI) && in CanEvaluateTruncated()
375 CanEvaluateTruncated(I->getOperand(1), Ty, IC, CxtI); in CanEvaluateTruncated()
386 return CanEvaluateTruncated(I->getOperand(0), Ty, IC, CxtI); in CanEvaluateTruncated()
396 if (IC.MaskedValueIsZero(I->getOperand(0), in CanEvaluateTruncated()
399 return CanEvaluateTruncated(I->getOperand(0), Ty, IC, CxtI); in CanEvaluateTruncated()
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HDInstCombineSelect.cpp295 const ICmpInst *IC = dyn_cast<ICmpInst>(SI.getCondition()); in foldSelectICmpAndOr() local
296 if (!IC || !IC->isEquality() || !SI.getType()->isIntegerTy()) in foldSelectICmpAndOr()
299 Value *CmpLHS = IC->getOperand(0); in foldSelectICmpAndOr()
300 Value *CmpRHS = IC->getOperand(1); in foldSelectICmpAndOr()
333 ICmpInst::Predicate Pred = IC->getPredicate(); in foldSelectICmpAndOr()
755 const ICmpInst *IC = dyn_cast<ICmpInst>(SI.getCondition()); in foldSelectICmpAnd() local
756 if (!IC || !IC->isEquality() || !SI.getType()->isIntegerTy()) in foldSelectICmpAnd()
759 if (!match(IC->getOperand(1), m_Zero())) in foldSelectICmpAnd()
763 Value *LHS = IC->getOperand(0); in foldSelectICmpAnd()
813 ShouldNotVal ^= IC->getPredicate() == ICmpInst::ICMP_NE; in foldSelectICmpAnd()
HDInstCombineMulDivRem.cpp28 static Value *simplifyValueKnownNonZero(Value *V, InstCombiner &IC, in simplifyValueKnownNonZero() argument
42 A = IC.Builder->CreateSub(A, B); in simplifyValueKnownNonZero()
43 return IC.Builder->CreateShl(One, A); in simplifyValueKnownNonZero()
50 isKnownToBeAPowerOfTwo(I->getOperand(0), IC.getDataLayout(), false, 0, in simplifyValueKnownNonZero()
51 IC.getAssumptionCache(), &CxtI, in simplifyValueKnownNonZero()
52 IC.getDominatorTree())) { in simplifyValueKnownNonZero()
55 if (Value *V2 = simplifyValueKnownNonZero(I->getOperand(0), IC, CxtI)) { in simplifyValueKnownNonZero()
929 InstCombiner &IC);
955 const BinaryOperator &I, InstCombiner &IC) { in foldUDivPow2Cst() argument
966 const BinaryOperator &I, InstCombiner &IC) { in foldUDivNegCst() argument
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HDInstCombineCompares.cpp510 static Value *EvaluateGEPOffsetExpression(User *GEP, InstCombiner &IC, in EvaluateGEPOffsetExpression() argument
577 VariableIdx = IC.Builder->CreateTrunc(VariableIdx, IntPtrTy); in EvaluateGEPOffsetExpression()
599 VariableIdx = IC.Builder->CreateIntCast(VariableIdx, IntPtrTy, in EvaluateGEPOffsetExpression()
602 return IC.Builder->CreateAdd(VariableIdx, OffsetVal, "offset"); in EvaluateGEPOffsetExpression()
2033 InstCombiner &IC) { in ProcessUGT_ADDCST_ADD() argument
2061 if (IC.ComputeNumSignBits(A, 0, &I) < NeededSignBits || in ProcessUGT_ADDCST_ADD()
2062 IC.ComputeNumSignBits(B, 0, &I) < NeededSignBits) in ProcessUGT_ADDCST_ADD()
2092 InstCombiner::BuilderTy *Builder = IC.Builder; in ProcessUGT_ADDCST_ADD()
2106 IC.ReplaceInstUsesWith(*OrigAdd, ZExt); in ProcessUGT_ADDCST_ADD()
2218 Value *OtherVal, InstCombiner &IC) { in ProcessUMulZExtIdiom() argument
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/NextBSD/contrib/llvm/lib/Transforms/IPO/
HDInliner.cpp305 InlineCost IC = getInlineCost(CS); in shouldInline() local
307 if (IC.isAlways()) { in shouldInline()
315 if (IC.isNever()) { in shouldInline()
324 if (!IC) { in shouldInline()
325 DEBUG(dbgs() << " NOT Inlining: cost=" << IC.getCost() in shouldInline()
326 << ", thres=" << (IC.getCostDelta() + IC.getCost()) in shouldInline()
330 Twine(IC.getCost()) + ", threshold=" + in shouldInline()
331 Twine(IC.getCostDelta() + IC.getCost()) + ")"); in shouldInline()
354 int CandidateCost = IC.getCost() - (InlineConstants::CallPenalty + 1); in shouldInline()
394 if (inliningPreventsSomeOuterInline && TotalSecondaryCost < IC.getCost()) { in shouldInline()
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/NextBSD/contrib/llvm/lib/Analysis/
HDLint.cpp540 IntrinsicInst *IC = dyn_cast<IntrinsicInst>(I); in allSuccessorsReachEndCatch() local
541 if (IC && IC->getIntrinsicID() == Intrinsic::eh_endcatch) in allSuccessorsReachEndCatch()
545 if (IC && IC->getIntrinsicID() == Intrinsic::eh_begincatch) { in allSuccessorsReachEndCatch()
546 *SecondBeginCatch = IC; in allSuccessorsReachEndCatch()
625 IntrinsicInst *IC = dyn_cast<IntrinsicInst>(&*RI); in allPredCameFromBeginCatch() local
626 if (IC && IC->getIntrinsicID() == Intrinsic::eh_begincatch) in allPredCameFromBeginCatch()
630 if (IC && IC->getIntrinsicID() == Intrinsic::eh_endcatch) { in allPredCameFromBeginCatch()
631 *SecondEndCatch = IC; in allPredCameFromBeginCatch()
/NextBSD/contrib/llvm/utils/TableGen/
HDCodeEmitterGen.cpp270 for (std::vector<Record*>::iterator IC = Insts.begin(), EC = Insts.end(); in run() local
271 IC != EC; ++IC) { in run()
272 Record *R = *IC; in run()
HDX86DisassemblerShared.h25 insnContext = llvm::X86Disassembler::IC; in InstructionSpecifier()
HDCodeGenSchedule.h147 bool isKeyEqual(Record *IC, const IdxVec &W, const IdxVec &R) { in isKeyEqual()
148 return ItinClassDef == IC && Writes == W && Reads == R; in isKeyEqual()
/NextBSD/contrib/llvm/lib/Target/X86/AsmParser/
HDX86AsmParser.cpp269 InfixCalculator IC; member in __anon60f6c09b0111::X86AsmParser::IntelExprStateMachine
282 int64_t getImm() { return Imm + IC.execute(); } in getImm()
304 IC.pushOperator(IC_OR); in onOr()
319 IC.pushOperator(IC_XOR); in onXor()
334 IC.pushOperator(IC_AND); in onAnd()
349 IC.pushOperator(IC_LSHIFT); in onLShift()
364 IC.pushOperator(IC_RSHIFT); in onRShift()
379 IC.pushOperator(IC_PLUS); in onPlus()
416 IC.pushOperator(IC_MINUS); in onMinus()
455 IC.pushOperand(IC_REGISTER); in onRegister()
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/NextBSD/tools/kerneldoc/subsys/
HDDoxyfile-dev_ic8 PROJECT_NAME = "FreeBSD kernel IC device code"
/NextBSD/contrib/llvm/tools/clang/lib/Sema/
HDSemaObjCProperty.cpp827 ObjCImplementationDecl *IC = nullptr; in ActOnPropertyImplDecl() local
829 if ((IC = dyn_cast<ObjCImplementationDecl>(ClassImpDecl))) { in ActOnPropertyImplDecl()
830 IDecl = IC->getClassInterface(); in ActOnPropertyImplDecl()
848 Diag(IC->getLocation(), diag::warn_auto_implicit_atomic_property); in ActOnPropertyImplDecl()
1244 if (IC) { in ActOnPropertyImplDecl()
1247 IC->FindPropertyImplIvarDecl(PropertyIvar)) { in ActOnPropertyImplDecl()
1255 = IC->FindPropertyImplDecl(PropertyId)) { in ActOnPropertyImplDecl()
1260 IC->addPropertyImplementation(PIDecl); in ActOnPropertyImplDecl()
1277 declaresSameEntity(IC->getClassInterface(), ClassDeclared)) { in ActOnPropertyImplDecl()
1624 ObjCImplementationDecl *IC=dyn_cast_or_null<ObjCImplementationDecl>(D); in DefaultSynthesizeProperties() local
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HDSemaDeclObjC.cpp368 if (ObjCInterfaceDecl *IC = MDecl->getClassInterface()) { in ActOnStartOfObjCMethodDef() local
370 IC->lookupMethod(MDecl->getSelector(), MDecl->isInstanceMethod()); in ActOnStartOfObjCMethodDef()
399 IC->getSuperClass() != nullptr; in ActOnStartOfObjCMethodDef()
400 } else if (IC->hasDesignatedInitializers()) { in ActOnStartOfObjCMethodDef()
410 if (const ObjCInterfaceDecl *SuperClass = IC->getSuperClass()) { in ActOnStartOfObjCMethodDef()
3596 if (ObjCImplementationDecl *IC=dyn_cast<ObjCImplementationDecl>(ClassDecl)) { in ActOnAtEnd() local
3597 IC->setAtEndRange(AtEnd); in ActOnAtEnd()
3598 if (ObjCInterfaceDecl* IDecl = IC->getClassInterface()) { in ActOnAtEnd()
3608 = IC->FindPropertyImplDecl(Property->getIdentifier())) in ActOnAtEnd()
3624 ImplMethodsVsClassMethods(S, IC, IDecl); in ActOnAtEnd()
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/NextBSD/libexec/getty/
HDmain.c238 if (IC || AC) { in main()
245 if (IC) { in main()
246 if (getty_chat(IC, CT, DC) > 0) { in main()
/NextBSD/contrib/llvm/tools/clang/lib/AST/
HDCommentParser.cpp414 InlineCommandComment *IC; in parseInlineCommand() local
416 IC = S.actOnInlineCommand(CommandTok.getLocation(), in parseInlineCommand()
423 IC = S.actOnInlineCommand(CommandTok.getLocation(), in parseInlineCommand()
430 return IC; in parseInlineCommand()
/NextBSD/contrib/llvm/tools/clang/lib/CodeGen/
HDCGStmtOpenMP.cpp632 auto IC = C->varlist_begin(); in emitLinearClauseFinal() local
634 auto *OrigVD = cast<VarDecl>(cast<DeclRefExpr>(*IC)->getDecl()); in emitLinearClauseFinal()
637 (*IC)->getType(), VK_LValue, (*IC)->getExprLoc()); in emitLinearClauseFinal()
644 ++IC; in emitLinearClauseFinal()
754 auto IC = D.counters().begin(); in EmitOMPSimdFinal() local
756 auto *OrigVD = cast<VarDecl>(cast<DeclRefExpr>((*IC))->getDecl()); in EmitOMPSimdFinal()
760 (*IC)->getType(), VK_LValue, (*IC)->getExprLoc()); in EmitOMPSimdFinal()
768 ++IC; in EmitOMPSimdFinal()
1842 if (auto *IC = dyn_cast<llvm::ConstantInt>(UpdateVal)) { in emitOMPAtomicRMW() local
1844 IC, X.getAddress()->getType()->getPointerElementType(), in emitOMPAtomicRMW()
/NextBSD/contrib/binutils/opcodes/po/
HDopcodes.pot498 msgid "overwriting note %d with note %d (IC:%s)\n"
513 msgid "IC:%s [%s] has no terminals or sub-classes\n"
518 msgid "IC:%s has no terminals or sub-classes\n"
523 msgid "no insns mapped directly to terminal IC %s [%s]"
528 msgid "no insns mapped directly to terminal IC %s\n"
548 msgid "IC note %d in opcode %s (IC:%s) conflicts with resource %s note %d\n"
553 msgid "IC note %d for opcode %s (IC:%s) conflicts with resource %s note %d\n"
/NextBSD/sys/mips/include/
HDregnum.h104 #define IC 38 macro
/NextBSD/contrib/llvm/lib/Transforms/Vectorize/
HDLoopVectorize.cpp1652 unsigned IC = CM.selectInterleaveCount(OptForSize, VF.Width, VF.Cost); in processLoop() local
1656 DEBUG(dbgs() << "LV: Interleave Count is " << IC << '\n'); in processLoop()
1661 if (IC == 1) { in processLoop()
1671 Twine("interleaved by " + Twine(IC) + in processLoop()
1674 InnerLoopUnroller Unroller(L, SE, LI, DT, TLI, TTI, IC); in processLoop()
1678 InnerLoopVectorizer LB(L, SE, LI, DT, TLI, TTI, VF.Width, IC); in processLoop()
1692 Twine(IC) + ")"); in processLoop()
4675 unsigned IC = PowerOf2Floor((TargetNumRegisters - R.LoopInvariantRegs) / in selectInterleaveCount() local
4680 IC = PowerOf2Floor((TargetNumRegisters - R.LoopInvariantRegs - 1) / in selectInterleaveCount()
4702 if (IC > MaxInterleaveCount) in selectInterleaveCount()
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