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Searched refs:HSYNC (Results 1 – 7 of 7) sorted by relevance

/NextBSD/sys/gnu/dts/arm/
HDimx53-mba53.dts152 /* VGA_VSYNC, HSYNC with max drive strength */
HDam437x-sk-evm.dts340 0x0e4 (PIN_OUTPUT | MUX_MODE0) /* DSS HSYNC */
HDam43x-epos-evm.dts234 0x0E4 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
HDam437x-gp-evm.dts244 0x0e4 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
HDat91sam9g45.dtsi516 AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* HSYNC */
/NextBSD/sys/dev/drm2/i915/
HDintel_display.c2865 I915_WRITE(TRANS_HSYNC(pipe), I915_READ(HSYNC(pipe))); in ironlake_pch_enable()
4142 I915_WRITE(HSYNC(pipe), in i9xx_crtc_mode_set()
4716 I915_WRITE(HSYNC(pipe), in ironlake_crtc_mode_set()
5639 int hsync = I915_READ(HSYNC(pipe)); in intel_crtc_mode_get()
7199 error->pipe[i].hsync = I915_READ(HSYNC(i)); in intel_display_capture_error_state()
HDi915_reg.h1600 #define HSYNC(trans) _TRANSCODER(trans, _HSYNC_A, _HSYNC_B) macro