xref: /NextBSD/sys/arm/rockchip/rk30xx_grf.h (revision 95f7c2f56c7268d6ed9c2a56d357aeeac260363b)
1 /*-
2  * Copyright (c) 2013 Ganbold Tsagaankhuu <ganbold@freebsd.org>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  *
26  * $FreeBSD$
27  */
28 
29 #ifndef _RK30_GRF_H_
30 #define	_RK30_GRF_H_
31 
32 #define	RK30_GRF_BASE		0xF0008000
33 
34 #define	GRF_GPIO0L_DIR		0x0000
35 #define	GRF_GPIO0H_DIR		0x0004
36 #define	GRF_GPIO1L_DIR		0x0008
37 #define	GRF_GPIO1H_DIR		0x000c
38 #define	GRF_GPIO2L_DIR		0x0010
39 #define	GRF_GPIO2H_DIR		0x0014
40 #define	GRF_GPIO3L_DIR		0x0018
41 #define	GRF_GPIO3H_DIR		0x001c
42 #define	GRF_GPIO0L_DO		0x0020
43 #define	GRF_GPIO0H_DO		0x0024
44 #define	GRF_GPIO1L_DO		0x0028
45 #define	GRF_GPIO1H_DO		0x002c
46 #define	GRF_GPIO2L_DO		0x0030
47 #define	GRF_GPIO2H_DO		0x0034
48 #define	GRF_GPIO3L_DO		0x0038
49 #define	GRF_GPIO3H_DO		0x003c
50 #define	GRF_GPIO0L_EN		0x0040
51 #define	GRF_GPIO0H_EN		0x0044
52 #define	GRF_GPIO1L_EN		0x0048
53 #define	GRF_GPIO1H_EN		0x004c
54 #define	GRF_GPIO2L_EN		0x0050
55 #define	GRF_GPIO2H_EN		0x0054
56 #define	GRF_GPIO3L_EN		0x0058
57 #define	GRF_GPIO3H_EN		0x005c
58 
59 #define	GRF_GPIO0C_IOMUX	0x0068
60 #define	GRF_GPIO0D_IOMUX	0x006c
61 #define	GRF_GPIO1A_IOMUX	0x0070
62 #define	GRF_GPIO1B_IOMUX	0x0074
63 #define	GRF_GPIO1C_IOMUX	0x0078
64 #define	GRF_GPIO1D_IOMUX	0x007c
65 #define	GRF_GPIO2A_IOMUX	0x0080
66 #define	GRF_GPIO2B_IOMUX	0x0084
67 #define	GRF_GPIO2C_IOMUX	0x0088
68 #define	GRF_GPIO2D_IOMUX	0x008c
69 #define	GRF_GPIO3A_IOMUX	0x0090
70 #define	GRF_GPIO3B_IOMUX	0x0094
71 #define	GRF_GPIO3C_IOMUX	0x0098
72 #define	GRF_GPIO3D_IOMUX	0x009c
73 #define	GRF_SOC_CON0		0x00a0
74 #define	GRF_SOC_CON1		0x00a4
75 #define	GRF_SOC_CON2		0x00a8
76 #define	GRF_SOC_STATUS0		0x00ac
77 #define	GRF_DMAC1_CON0		0x00b0
78 #define	GRF_DMAC1_CON1		0x00b4
79 #define	GRF_DMAC1_CON2		0x00b8
80 #define	GRF_DMAC2_CON0		0x00bc
81 #define	GRF_DMAC2_CON1		0x00c0
82 #define	GRF_DMAC2_CON2		0x00c4
83 #define	GRF_DMAC2_CON3		0x00c8
84 #define	GRF_CPU_CON0		0x00cc
85 #define	GRF_CPU_CON1		0x00d0
86 #define	GRF_CPU_CON2		0x00d4
87 #define	GRF_CPU_CON3		0x00d8
88 #define	GRF_CPU_CON4		0x00dc
89 #define	GRF_CPU_CON5		0x00e0
90 
91 #define	GRF_DDRC_CON0		0x00ec
92 #define	GRF_DDRC_STAT		0x00f0
93 #define	GRF_IO_CON0		0x00f4
94 #define	GRF_IO_CON1		0x00f8
95 #define	GRF_IO_CON2		0x00fc
96 #define	GRF_IO_CON3		0x0100
97 #define	GRF_IO_CON4		0x0104
98 #define	GRF_SOC_STATUS1		0x0108
99 #define	GRF_UOC0_CON0		0x010c
100 #define	GRF_UOC0_CON1		0x0110
101 #define	GRF_UOC0_CON2		0x0114
102 #define	GRF_UOC0_CON3		0x0118
103 #define	GRF_UOC1_CON0		0x011c
104 #define	GRF_UOC1_CON1		0x0120
105 #define	GRF_UOC1_CON2		0x0124
106 #define	GRF_UOC1_CON3		0x0128
107 #define	GRF_UOC2_CON0		0x012c
108 #define	GRF_UOC2_CON1		0x0130
109 
110 #define	GRF_UOC3_CON0		0x0138
111 #define	GRF_UOC3_CON1		0x013c
112 #define	GRF_HSIC_STAT		0x0140
113 #define	GRF_OS_REG0		0x0144
114 #define	GRF_OS_REG1		0x0148
115 #define	GRF_OS_REG2		0x014c
116 #define	GRF_OS_REG3		0x0150
117 #define	GRF_OS_REG4		0x0154
118 #define	GRF_OS_REG5		0x0158
119 #define	GRF_OS_REG6		0x015c
120 #define	GRF_OS_REG7		0x0160
121 #define	GRF_GPIO0B_PULL		0x0164
122 #define	GRF_GPIO0C_PULL		0x0168
123 #define	GRF_GPIO0D_PULL		0x016c
124 #define	GRF_GPIO1A_PULL		0x0170
125 #define	GRF_GPIO1B_PULL		0x0174
126 #define	GRF_GPIO1C_PULL		0x0178
127 #define	GRF_GPIO1D_PULL		0x017c
128 #define	GRF_GPIO2A_PULL		0x0180
129 #define	GRF_GPIO2B_PULL		0x0184
130 #define	GRF_GPIO2C_PULL		0x0188
131 #define	GRF_GPIO2D_PULL		0x018c
132 #define	GRF_GPIO3A_PULL		0x0190
133 #define	GRF_GPIO3B_PULL		0x0194
134 #define	GRF_GPIO3C_PULL		0x0198
135 #define	GRF_GPIO3D_PULL		0x019c
136 #define	GRF_FLASH_DATA_PULL	0x01a0
137 #define	GRF_FLASH_CMD_PULL	0x01a4
138 
139 void rk30_grf_gpio_pud(uint32_t bank, uint32_t pin, uint32_t state);
140 
141 #endif /* _RK30_GRF_H_ */
142