Searched refs:FMIN (Results 1 – 11 of 11) sorted by relevance
| /NextBSD/contrib/llvm/lib/Target/X86/ |
| HD | X86IntrinsicsInfo.h | 479 X86_INTRINSIC_DATA(avx512_mask_min_pd_128, INTR_TYPE_2OP_MASK, X86ISD::FMIN, 0), 480 X86_INTRINSIC_DATA(avx512_mask_min_pd_256, INTR_TYPE_2OP_MASK, X86ISD::FMIN, 0), 481 X86_INTRINSIC_DATA(avx512_mask_min_pd_512, INTR_TYPE_2OP_MASK, X86ISD::FMIN, 483 X86_INTRINSIC_DATA(avx512_mask_min_ps_128, INTR_TYPE_2OP_MASK, X86ISD::FMIN, 0), 484 X86_INTRINSIC_DATA(avx512_mask_min_ps_256, INTR_TYPE_2OP_MASK, X86ISD::FMIN, 0), 485 X86_INTRINSIC_DATA(avx512_mask_min_ps_512, INTR_TYPE_2OP_MASK, X86ISD::FMIN, 487 X86_INTRINSIC_DATA(avx512_mask_min_sd_round, INTR_TYPE_SCALAR_MASK_RM, X86ISD::FMIN, 489 X86_INTRINSIC_DATA(avx512_mask_min_ss_round, INTR_TYPE_SCALAR_MASK_RM, X86ISD::FMIN, 976 X86_INTRINSIC_DATA(avx_min_pd_256, INTR_TYPE_2OP, X86ISD::FMIN, 0), 977 X86_INTRINSIC_DATA(avx_min_ps_256, INTR_TYPE_2OP, X86ISD::FMIN, 0), [all …]
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| HD | X86ISelLowering.h | 240 FMAX, FMIN, enumerator
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| HD | X86InstrFragmentsSIMD.td | 42 def X86fmin : SDNode<"X86ISD::FMIN", SDTFPBinOp>; 45 // Commutative and Associative FMIN and FMAX.
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| HD | X86ISelLowering.cpp | 18639 case X86ISD::FMIN: in ReplaceNodeResults() 18915 case X86ISD::FMIN: return "X86ISD::FMIN"; in getTargetNodeName() 22213 Opcode = X86ISD::FMIN; in PerformSELECTCombine() 22221 Opcode = X86ISD::FMIN; in PerformSELECTCombine() 22230 Opcode = X86ISD::FMIN; in PerformSELECTCombine() 22278 Opcode = X86ISD::FMIN; in PerformSELECTCombine() 22285 Opcode = X86ISD::FMIN; in PerformSELECTCombine() 22294 Opcode = X86ISD::FMIN; in PerformSELECTCombine() 24560 assert(N->getOpcode() == X86ISD::FMIN || N->getOpcode() == X86ISD::FMAX); in PerformFMinFMaxCombine() 24571 case X86ISD::FMIN: NewOp = X86ISD::FMINC; break; in PerformFMinFMaxCombine() [all …]
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| /NextBSD/contrib/llvm/lib/Target/AArch64/ |
| HD | AArch64SchedA57.td | 459 def : InstRW<[A57Write_5cyc_1V], (instregex "^(FMAX|FMIN)(NM)?(v2f32)")>; 461 def : InstRW<[A57Write_5cyc_2V], (instregex "^(FMAX|FMIN)(NM)?(v4f32|v2f64)")>; 463 def : InstRW<[A57Write_5cyc_1V], (instregex "^(FMAX|FMIN)(NM)?P(v2f32|v2i32)")>; 465 def : InstRW<[A57Write_9cyc_3V], (instregex "^(FMAX|FMIN)(NM)?P(v4f32|v2f64|v2i64)")>; 467 def : InstRW<[A57Write_10cyc_3V], (instregex "^(FMAX|FMIN)(NM)?Vv")>;
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| HD | AArch64ISelLowering.h | 66 FMIN, enumerator
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| HD | AArch64ISelLowering.cpp | 813 case AArch64ISD::FMIN: return "AArch64ISD::FMIN"; in getTargetNodeName() 7984 return DAG.getNode(AArch64ISD::FMIN, SDLoc(N), N->getValueType(0), in performIntrinsicCombine() 8909 Opcode = IsReversed ? AArch64ISD::FMAX : AArch64ISD::FMIN; in performSelectCCCombine() 8920 Opcode = IsReversed ? AArch64ISD::FMIN : AArch64ISD::FMAX; in performSelectCCCombine()
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| HD | AArch64InstrInfo.td | 168 def AArch64fmin : SDNode<"AArch64ISD::FMIN", SDTFPBinOp>; 2494 defm FMIN : TwoOperandFPData<0b0101, "fmin", AArch64fmin>; 2799 defm FMIN : SIMDThreeSameVectorFP<0,1,0b11110,"fmin", AArch64fmin>;
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| /NextBSD/contrib/llvm/lib/Target/ARM/ |
| HD | ARMISelLowering.h | 177 FMIN, enumerator
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| HD | ARMISelLowering.cpp | 1137 case ARMISD::FMIN: return "ARMISD::FMIN"; in getTargetNodeName() 9996 Opcode = IsReversed ? ARMISD::FMAX : ARMISD::FMIN; in PerformSELECT_CCCombine() 10018 Opcode = IsReversed ? ARMISD::FMIN : ARMISD::FMAX; in PerformSELECT_CCCombine()
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| HD | ARMInstrNEON.td | 593 def NEONfmin : SDNode<"ARMISD::FMIN", SDTARMFMAX>;
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