Searched refs:ElemVT (Results 1 – 5 of 5) sorted by relevance
| /NextBSD/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| HD | LegalizeTypesGeneric.cpp | 105 EVT ElemVT = NOutVT; in ExpandRes_BITCAST() local 106 EVT NVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, NumElems); in ExpandRes_BITCAST() 110 unsigned NewSizeInBits = ElemVT.getSizeInBits() / 2; in ExpandRes_BITCAST() 115 ElemVT = EVT::getIntegerVT(*DAG.getContext(), NewSizeInBits); in ExpandRes_BITCAST() 116 NVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, NumElems); in ExpandRes_BITCAST() 125 ISD::EXTRACT_VECTOR_ELT, dl, ElemVT, CastInOp, in ExpandRes_BITCAST()
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| /NextBSD/contrib/llvm/lib/Target/SystemZ/ |
| HD | SystemZISelLowering.h | 487 SDValue combineExtract(SDLoc DL, EVT ElemVT, EVT VecVT, SDValue OrigOp,
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| HD | SystemZISelLowering.cpp | 3800 EVT ElemVT = BVN->getValueType(0).getVectorElementType(); in tryBuildVectorByteMask() local 3801 unsigned BytesPerElement = ElemVT.getStoreSize(); in tryBuildVectorByteMask()
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| /NextBSD/contrib/llvm/lib/Target/AMDGPU/ |
| HD | R600ISelLowering.cpp | 1385 EVT ElemVT = ValueVT.getVectorElementType(); in LowerSTORE() local 1396 SDValue Elem = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, ElemVT, in LowerSTORE() 1578 EVT ElemVT = VT.getVectorElementType(); in LowerLOAD() local 1589 Loads[i] = DAG.getNode(AMDGPUISD::REGISTER_LOAD, DL, ElemVT, in LowerLOAD() 1595 Loads[i] = DAG.getUNDEF(ElemVT); in LowerLOAD() 1597 EVT TargetVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, 4); in LowerLOAD()
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| HD | AMDGPUISelLowering.cpp | 1315 EVT ElemVT = VT.getVectorElementType(); in MergeVectorStore() local 1327 SDValue Elt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, ElemVT, Value, in MergeVectorStore()
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