Searched refs:DstMask (Results 1 – 3 of 3) sorted by relevance
| /NextBSD/contrib/llvm/lib/Target/AMDGPU/ |
| HD | AMDGPUISelLowering.cpp | 1565 SDValue DstMask = DAG.getNode(ISD::SHL, DL, MVT::i32, in LowerSTORE() local
1568 DstMask = DAG.getNode(ISD::XOR, DL, MVT::i32, DstMask, in LowerSTORE()
1570 Dst = DAG.getNode(ISD::AND, DL, MVT::i32, Dst, DstMask); in LowerSTORE()
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| /NextBSD/contrib/llvm/lib/CodeGen/ |
| HD | RegisterCoalescer.cpp | 1131 unsigned DstMask = TRI->getSubRegIndexLaneMask(DstSubIdx); in eliminateUndefCopy() local
1133 if ((SR.LaneMask & DstMask) == 0) in eliminateUndefCopy()
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| /NextBSD/contrib/llvm/lib/Target/AArch64/ |
| HD | AArch64ISelDAGToDAG.cpp | 1633 static bool isBitfieldDstMask(uint64_t DstMask, APInt BitsToBeInserted, in isBitfieldDstMask() argument
1639 APInt SignificantDstMask = APInt(BitWidth, DstMask); in isBitfieldDstMask()
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