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Searched refs:DMAR_GCMD_REG (Results 1 – 4 of 4) sorted by relevance

/NextBSD/sys/x86/iommu/
HDintel_utils.c415 dmar_write4(unit, DMAR_GCMD_REG, unit->hw_gcmd | DMAR_GCMD_SRTP); in dmar_load_root_entry_ptr()
488 dmar_write4(unit, DMAR_GCMD_REG, unit->hw_gcmd | DMAR_GCMD_WBF); in dmar_flush_write_bufs()
501 dmar_write4(unit, DMAR_GCMD_REG, unit->hw_gcmd); in dmar_enable_translation()
514 dmar_write4(unit, DMAR_GCMD_REG, unit->hw_gcmd); in dmar_disable_translation()
536 dmar_write4(unit, DMAR_GCMD_REG, unit->hw_gcmd | DMAR_GCMD_SIRTP); in dmar_load_irt_ptr()
550 dmar_write4(unit, DMAR_GCMD_REG, unit->hw_gcmd); in dmar_enable_ir()
563 dmar_write4(unit, DMAR_GCMD_REG, unit->hw_gcmd); in dmar_disable_ir()
HDintel_qi.c76 dmar_write4(unit, DMAR_GCMD_REG, unit->hw_gcmd); in dmar_enable_qi()
89 dmar_write4(unit, DMAR_GCMD_REG, unit->hw_gcmd); in dmar_disable_qi()
HDintel_dmar.h408 KASSERT(reg != DMAR_GCMD_REG || (val & DMAR_GCMD_TE) == in dmar_write4()
419 KASSERT(reg != DMAR_GCMD_REG, ("8byte GCMD write")); in dmar_write8()
HDintel_reg.h190 #define DMAR_GCMD_REG 0x18 macro