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Searched refs:Branch (Results 1 – 25 of 92) sorted by relevance

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/NextBSD/contrib/llvm/lib/Target/SystemZ/
HDSystemZLongBranch.cpp98 MachineInstr *Branch; member
114 TerminatorInfo() : Branch(nullptr), Size(0), TargetBlock(0), in TerminatorInfo()
251 Terminator.Branch = MI; in describeTerminator()
307 if (!Terminator.Branch) in mustRelaxBranch()
384 MachineInstr *Branch = Terminator.Branch; in relaxBranch() local
385 switch (Branch->getOpcode()) { in relaxBranch()
387 Branch->setDesc(TII->get(SystemZ::JG)); in relaxBranch()
390 Branch->setDesc(TII->get(SystemZ::BRCL)); in relaxBranch()
393 splitBranchOnCount(Branch, SystemZ::AHI); in relaxBranch()
396 splitBranchOnCount(Branch, SystemZ::AGHI); in relaxBranch()
[all …]
HDSystemZElimCompare.cpp182 MachineInstr *Branch = CCUsers[0]; in convertToBRCT() local
183 if (Branch->getOpcode() != SystemZ::BRC || in convertToBRCT()
184 Branch->getOperand(0).getImm() != SystemZ::CCMASK_ICMP || in convertToBRCT()
185 Branch->getOperand(1).getImm() != SystemZ::CCMASK_CMP_NE) in convertToBRCT()
192 MachineBasicBlock::iterator MBBI = Compare, MBBE = Branch; in convertToBRCT()
198 MachineOperand Target(Branch->getOperand(2)); in convertToBRCT()
199 Branch->RemoveOperand(2); in convertToBRCT()
200 Branch->RemoveOperand(1); in convertToBRCT()
201 Branch->RemoveOperand(0); in convertToBRCT()
202 Branch->setDesc(TII->get(BRCT)); in convertToBRCT()
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HDSystemZInstrInfo.cpp267 SystemZII::Branch Branch(getBranchInfo(I)); in AnalyzeBranch() local
268 if (!Branch.Target->isMBB()) in AnalyzeBranch()
272 if (Branch.Type != SystemZII::BranchNormal) in AnalyzeBranch()
275 if (Branch.CCMask == SystemZ::CCMASK_ANY) { in AnalyzeBranch()
278 TBB = Branch.Target->getMBB(); in AnalyzeBranch()
290 if (MBB.isLayoutSuccessor(Branch.Target->getMBB())) { in AnalyzeBranch()
298 TBB = Branch.Target->getMBB(); in AnalyzeBranch()
306 TBB = Branch.Target->getMBB(); in AnalyzeBranch()
307 Cond.push_back(MachineOperand::CreateImm(Branch.CCValid)); in AnalyzeBranch()
308 Cond.push_back(MachineOperand::CreateImm(Branch.CCMask)); in AnalyzeBranch()
[all …]
HDSystemZInstrInfo.h97 struct Branch { struct
110 Branch(BranchType type, unsigned ccValid, unsigned ccMask, in Branch() function
209 SystemZII::Branch getBranchInfo(const MachineInstr *MI) const;
/NextBSD/contrib/llvm/tools/clang/include/clang/Analysis/Analyses/
HDUninitializedValues.h32 struct Branch { struct
52 SmallVector<Branch, 2> UninitBranches; argument
59 void addUninitBranch(Branch B) { in addUninitBranch()
93 typedef SmallVectorImpl<Branch>::const_iterator branch_iterator;
HDThreadSafetyOps.def50 TIL_OPCODE_DEF(Branch)
/NextBSD/contrib/gcc/
HDpredict.def65 /* Branch containing goto is probably not taken. */
68 /* Branch to basic block containing call marked by noreturn attribute. */
102 /* Branch guarding call is probably taken. */
105 /* Branch causing function to terminate is probably not taken. */
109 /* Branch containing goto is probably not taken. */
112 /* Branch ending with return constant is probably not taken. */
115 /* Branch ending with return negative constant is probably not taken. */
118 /* Branch ending with return; is probably not taken */
/NextBSD/contrib/llvm/tools/clang/lib/Analysis/
HDUninitializedValues.cpp657 UninitUse::Branch Branch; in getUninitUse() local
658 Branch.Terminator = Label; in getUninitUse()
659 Branch.Output = 0; // Ignored. in getUninitUse()
660 Use.addUninitBranch(Branch); in getUninitUse()
662 UninitUse::Branch Branch; in getUninitUse() local
663 Branch.Terminator = Term; in getUninitUse()
664 Branch.Output = I - Block->succ_begin(); in getUninitUse()
665 Use.addUninitBranch(Branch); in getUninitUse()
/NextBSD/contrib/llvm/lib/CodeGen/
HDWinEHPrepare.cpp900 IndirectBrInst *Branch = in prepareExceptionHandlers() local
903 Branch->addDestination(Target); in prepareExceptionHandlers()
908 LPadImpls.push_back(std::make_pair(Recover, Branch)); in prepareExceptionHandlers()
929 IndirectBrInst *Branch = LPadImplPair.second; in prepareExceptionHandlers() local
944 for (unsigned int I = 0, E = Branch->getNumDestinations(); I < E; ++I) { in prepareExceptionHandlers()
945 BasicBlock *KnownTarget = Branch->getDestination(I); in prepareExceptionHandlers()
950 Branch->addDestination(Target); in prepareExceptionHandlers()
1158 IndirectBrInst *Branch = in completeNestedLandingPad() local
1160 if (!Branch) { in completeNestedLandingPad()
1227 if (Branch) { in completeNestedLandingPad()
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/NextBSD/contrib/llvm/lib/Target/Mips/
HDMipsDelaySlotFiller.cpp201 Iter Branch, DebugLoc DL);
510 Iter Branch, DebugLoc DL) { in replaceWithCompactBranch() argument
515 (((unsigned) Branch->getOpcode()) == Mips::BEQ) ? Mips::BEQZC_MM in replaceWithCompactBranch()
519 MachineInstrBuilder MIB = BuildMI(MBB, Branch, DL, NewDesc); in replaceWithCompactBranch()
521 MIB.addReg(Branch->getOperand(0).getReg()); in replaceWithCompactBranch()
522 MIB.addMBB(Branch->getOperand(2).getMBB()); in replaceWithCompactBranch()
524 Iter tmpIter = Branch; in replaceWithCompactBranch()
525 Branch = std::prev(Branch); in replaceWithCompactBranch()
528 return Branch; in replaceWithCompactBranch()
/NextBSD/contrib/llvm/include/llvm/ADT/
HDIntervalMap.h936 Branch; typedef
1148 NR = NR.get<Branch>().safeLookup(x); in treeSafeLookup()
1201 const unsigned Nodes = RootBranch::Capacity / Branch::Capacity + 1; in splitRoot()
1218 Branch *B = newNode<Branch>(); in splitRoot()
1225 rootBranch().stop(n) = Node[n].template get<Branch>().stop(Size[n]-1); in splitRoot()
1265 deleteNode(&Node.get<Branch>()); in deleteNode()
1449 unsigned p = NR.get<Branch>().safeFind(0, x); in pathFillFind()
1483 if (!Traits::stopLess(path.node<Branch>(l).stop(path.offset(l)), x)) { in treeAdvanceTo()
1486 path.node<Branch>(l + 1).safeFind(path.offset(l + 1), x); in treeAdvanceTo()
1493 path.offset(1) = path.node<Branch>(1).safeFind(path.offset(1), x); in treeAdvanceTo()
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/NextBSD/contrib/llvm/include/llvm/MC/
HDMCInstrDesc.h105 Branch, enumerator
233 bool isBranch() const { return Flags & (1 << MCID::Branch); } in isBranch()
/NextBSD/contrib/llvm/lib/Transforms/Utils/
HDSimplifyIndVar.cpp342 BranchInst *Branch = nullptr; in splitOverflowIntrinsic() local
351 Branch = dyn_cast<BranchInst>(ExtractInst->user_back()); in splitOverflowIntrinsic()
354 if (!AddVal || !Branch) in splitOverflowIntrinsic()
357 BasicBlock *ContinueBB = Branch->getSuccessor(1); in splitOverflowIntrinsic()
/NextBSD/contrib/llvm/lib/Target/AArch64/
HDAArch64Schedule.td41 def WriteBr : SchedWrite; // Branch
42 def WriteBrReg : SchedWrite; // Indirect Branch
/NextBSD/contrib/gcc/config/mips/
HDmips-ps-3d.md437 ; Floating Point Branch Instructions.
440 ; Branch on Any of Four Floating Point Condition Codes True
452 ; Branch on Any of Four Floating Point Condition Codes False
464 ; Branch on Any of Two Floating Point Condition Codes True
476 ; Branch on Any of Two Floating Point Condition Codes False
/NextBSD/sys/arm/mv/
HDfiles.mv11 # - Branch Prediction
/NextBSD/contrib/llvm/lib/Target/AMDGPU/
HDSILowerControlFlow.cpp89 void Branch(MachineInstr &MI);
291 void SILowerControlFlowPass::Branch(MachineInstr &MI) { in Branch() function in SILowerControlFlowPass
541 Branch(MI); in runOnMachineFunction()
/NextBSD/contrib/gcc/config/arm/
HDarm926ejs.md166 ;; Branch and Call Instructions
169 ;; Branch instructions are difficult to model accurately. The ARM
HDarm1026ejs.md219 ;; Branch and Call Instructions
222 ;; Branch instructions are difficult to model accurately. The ARM
/NextBSD/contrib/llvm/lib/Target/PowerPC/
HDPPCScheduleE500mc.td21 // queues (GIQx), FP Issue Queue (FIQ), or Branch issue queue (BIQ).
32 def E500_BU : FuncUnit; // Branch unit
HDPPCScheduleG3.td14 def G3_BPU : FuncUnit; // Branch unit
HDPPCScheduleG4.td14 def G4_BPU : FuncUnit; // Branch unit
/NextBSD/contrib/llvm/tools/clang/lib/CodeGen/
HDCGExprComplex.cpp667 llvm::Instruction *Branch = Builder.CreateCondBr(IsRNaN, INaNBB, ContBB); in EmitBinMul() local
668 llvm::BasicBlock *OrigBB = Branch->getParent(); in EmitBinMul()
673 Branch->setMetadata(llvm::LLVMContext::MD_prof, BrWeight); in EmitBinMul()
679 Branch = Builder.CreateCondBr(IsINaN, LibCallBB, ContBB); in EmitBinMul()
680 Branch->setMetadata(llvm::LLVMContext::MD_prof, BrWeight); in EmitBinMul()
/NextBSD/contrib/gcc/config/rs6000/
HD8540.md44 ;; Branch unit:
105 ;; Branch. Actually this latency time is not used by the scheduler.
/NextBSD/contrib/llvm/lib/Transforms/Scalar/
HDInductiveRangeCheckElimination.cpp122 BranchInst *Branch; member in __anon8a8a06b10111::InductiveRangeCheck
134 Offset(nullptr), Scale(nullptr), Length(nullptr), Branch(nullptr) { } in InductiveRangeCheck()
164 BranchInst *getBranch() const { return Branch; } in getBranch()
420 IRC->Branch = BI; in create()

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