Searched refs:ATOMIC_LOAD_SUB (Results 1 – 15 of 15) sorted by relevance
| /NextBSD/contrib/llvm/include/llvm/CodeGen/ |
| HD | ISDOpcodes.h | 689 ATOMIC_LOAD_SUB, enumerator
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| HD | SelectionDAGNodes.h | 1203 N->getOpcode() == ISD::ATOMIC_LOAD_SUB ||
1322 N->getOpcode() == ISD::ATOMIC_LOAD_SUB ||
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| /NextBSD/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| HD | SelectionDAGDumper.cpp | 62 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; in getOperationName()
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| HD | LegalizeIntegerTypes.cpp | 133 case ISD::ATOMIC_LOAD_SUB: in PromoteIntegerResult()
1284 case ISD::ATOMIC_LOAD_SUB: in ExpandIntegerResult()
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| HD | SelectionDAG.cpp | 516 case ISD::ATOMIC_LOAD_SUB: in AddNodeIDCustom()
4762 Opcode == ISD::ATOMIC_LOAD_SUB || in getAtomic()
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| HD | LegalizeDAG.cpp | 2967 case ISD::ATOMIC_LOAD_SUB: in ExpandNode()
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| HD | SelectionDAGBuilder.cpp | 3292 case AtomicRMWInst::Sub: NT = ISD::ATOMIC_LOAD_SUB; break; in visitAtomicRMW()
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| /NextBSD/contrib/llvm/lib/Target/Mips/ |
| HD | Mips16ISelLowering.cpp | 137 setOperationAction(ISD::ATOMIC_LOAD_SUB, MVT::i32, Expand); in Mips16TargetLowering()
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| /NextBSD/contrib/llvm/lib/Target/AMDGPU/ |
| HD | SIISelLowering.cpp | 234 setTargetDAGCombine(ISD::ATOMIC_LOAD_SUB); in SITargetLowering()
1915 case ISD::ATOMIC_LOAD_SUB: in PerformDAGCombine()
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| /NextBSD/contrib/llvm/lib/Target/Sparc/ |
| HD | SparcInstr64Bit.td | 528 defm ATOMIC_LOAD_SUB : AtomicRMW<atomic_load_sub_32, atomic_load_sub_64>;
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| /NextBSD/contrib/llvm/lib/CodeGen/ |
| HD | TargetLoweringBase.cpp | 702 OP_TO_LIBCALL(ISD::ATOMIC_LOAD_SUB, SYNC_FETCH_AND_SUB) in getATOMIC()
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| /NextBSD/contrib/llvm/lib/Target/SystemZ/ |
| HD | SystemZISelLowering.cpp | 180 setOperationAction(ISD::ATOMIC_LOAD_SUB, VT, Custom); in SystemZTargetLowering()
211 setOperationAction(ISD::ATOMIC_LOAD_SUB, MVT::i32, Custom); in SystemZTargetLowering()
4332 case ISD::ATOMIC_LOAD_SUB: in LowerOperation()
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| /NextBSD/contrib/llvm/include/llvm/Target/ |
| HD | TargetSelectionDAG.td | 471 def atomic_load_sub : SDNode<"ISD::ATOMIC_LOAD_SUB" , SDTAtomic2,
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| /NextBSD/contrib/llvm/lib/Target/X86/ |
| HD | X86ISelLowering.cpp | 462 setOperationAction(ISD::ATOMIC_LOAD_SUB, VT, Custom); in X86TargetLowering()
18539 case ISD::ATOMIC_LOAD_SUB: return LowerLOAD_SUB(Op,DAG); in LowerOperation()
18804 case ISD::ATOMIC_LOAD_SUB: in ReplaceNodeResults()
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| /NextBSD/contrib/llvm/lib/Target/ARM/ |
| HD | ARMISelLowering.cpp | 818 setOperationAction(ISD::ATOMIC_LOAD_SUB, MVT::i32, Expand); in ARMTargetLowering()
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