1 # $FreeBSD$ 2.file "x86cpuid.s" 3.text 4.globl OPENSSL_ia32_cpuid 5.type OPENSSL_ia32_cpuid,@function 6.align 16 7OPENSSL_ia32_cpuid: 8.L_OPENSSL_ia32_cpuid_begin: 9 pushl %ebp 10 pushl %ebx 11 pushl %esi 12 pushl %edi 13 xorl %edx,%edx 14 pushfl 15 popl %eax 16 movl %eax,%ecx 17 xorl $2097152,%eax 18 pushl %eax 19 popfl 20 pushfl 21 popl %eax 22 xorl %eax,%ecx 23 xorl %eax,%eax 24 btl $21,%ecx 25 jnc .L000nocpuid 26 movl 20(%esp),%esi 27 movl %eax,8(%esi) 28 .byte 0x0f,0xa2 29 movl %eax,%edi 30 xorl %eax,%eax 31 cmpl $1970169159,%ebx 32 setne %al 33 movl %eax,%ebp 34 cmpl $1231384169,%edx 35 setne %al 36 orl %eax,%ebp 37 cmpl $1818588270,%ecx 38 setne %al 39 orl %eax,%ebp 40 jz .L001intel 41 cmpl $1752462657,%ebx 42 setne %al 43 movl %eax,%esi 44 cmpl $1769238117,%edx 45 setne %al 46 orl %eax,%esi 47 cmpl $1145913699,%ecx 48 setne %al 49 orl %eax,%esi 50 jnz .L001intel 51 movl $2147483648,%eax 52 .byte 0x0f,0xa2 53 cmpl $2147483649,%eax 54 jb .L001intel 55 movl %eax,%esi 56 movl $2147483649,%eax 57 .byte 0x0f,0xa2 58 orl %ecx,%ebp 59 andl $2049,%ebp 60 cmpl $2147483656,%esi 61 jb .L001intel 62 movl $2147483656,%eax 63 .byte 0x0f,0xa2 64 movzbl %cl,%esi 65 incl %esi 66 movl $1,%eax 67 xorl %ecx,%ecx 68 .byte 0x0f,0xa2 69 btl $28,%edx 70 jnc .L002generic 71 shrl $16,%ebx 72 andl $255,%ebx 73 cmpl %esi,%ebx 74 ja .L002generic 75 andl $4026531839,%edx 76 jmp .L002generic 77.L001intel: 78 cmpl $7,%edi 79 jb .L003cacheinfo 80 movl 20(%esp),%esi 81 movl $7,%eax 82 xorl %ecx,%ecx 83 .byte 0x0f,0xa2 84 movl %ebx,8(%esi) 85.L003cacheinfo: 86 cmpl $4,%edi 87 movl $-1,%edi 88 jb .L004nocacheinfo 89 movl $4,%eax 90 movl $0,%ecx 91 .byte 0x0f,0xa2 92 movl %eax,%edi 93 shrl $14,%edi 94 andl $4095,%edi 95.L004nocacheinfo: 96 movl $1,%eax 97 xorl %ecx,%ecx 98 .byte 0x0f,0xa2 99 andl $3220176895,%edx 100 cmpl $0,%ebp 101 jne .L005notintel 102 orl $1073741824,%edx 103 andb $15,%ah 104 cmpb $15,%ah 105 jne .L005notintel 106 orl $1048576,%edx 107.L005notintel: 108 btl $28,%edx 109 jnc .L002generic 110 andl $4026531839,%edx 111 cmpl $0,%edi 112 je .L002generic 113 orl $268435456,%edx 114 shrl $16,%ebx 115 cmpb $1,%bl 116 ja .L002generic 117 andl $4026531839,%edx 118.L002generic: 119 andl $2048,%ebp 120 andl $4294965247,%ecx 121 movl %edx,%esi 122 orl %ecx,%ebp 123 btl $27,%ecx 124 jnc .L006clear_avx 125 xorl %ecx,%ecx 126.byte 15,1,208 127 andl $6,%eax 128 cmpl $6,%eax 129 je .L007done 130 cmpl $2,%eax 131 je .L006clear_avx 132.L008clear_xmm: 133 andl $4261412861,%ebp 134 andl $4278190079,%esi 135.L006clear_avx: 136 andl $4026525695,%ebp 137 movl 20(%esp),%edi 138 andl $4294967263,8(%edi) 139.L007done: 140 movl %esi,%eax 141 movl %ebp,%edx 142.L000nocpuid: 143 popl %edi 144 popl %esi 145 popl %ebx 146 popl %ebp 147 ret 148.size OPENSSL_ia32_cpuid,.-.L_OPENSSL_ia32_cpuid_begin 149.globl OPENSSL_rdtsc 150.type OPENSSL_rdtsc,@function 151.align 16 152OPENSSL_rdtsc: 153.L_OPENSSL_rdtsc_begin: 154 xorl %eax,%eax 155 xorl %edx,%edx 156 leal OPENSSL_ia32cap_P,%ecx 157 btl $4,(%ecx) 158 jnc .L009notsc 159 .byte 0x0f,0x31 160.L009notsc: 161 ret 162.size OPENSSL_rdtsc,.-.L_OPENSSL_rdtsc_begin 163.globl OPENSSL_instrument_halt 164.type OPENSSL_instrument_halt,@function 165.align 16 166OPENSSL_instrument_halt: 167.L_OPENSSL_instrument_halt_begin: 168 leal OPENSSL_ia32cap_P,%ecx 169 btl $4,(%ecx) 170 jnc .L010nohalt 171.long 2421723150 172 andl $3,%eax 173 jnz .L010nohalt 174 pushfl 175 popl %eax 176 btl $9,%eax 177 jnc .L010nohalt 178 .byte 0x0f,0x31 179 pushl %edx 180 pushl %eax 181 hlt 182 .byte 0x0f,0x31 183 subl (%esp),%eax 184 sbbl 4(%esp),%edx 185 addl $8,%esp 186 ret 187.L010nohalt: 188 xorl %eax,%eax 189 xorl %edx,%edx 190 ret 191.size OPENSSL_instrument_halt,.-.L_OPENSSL_instrument_halt_begin 192.globl OPENSSL_far_spin 193.type OPENSSL_far_spin,@function 194.align 16 195OPENSSL_far_spin: 196.L_OPENSSL_far_spin_begin: 197 pushfl 198 popl %eax 199 btl $9,%eax 200 jnc .L011nospin 201 movl 4(%esp),%eax 202 movl 8(%esp),%ecx 203.long 2430111262 204 xorl %eax,%eax 205 movl (%ecx),%edx 206 jmp .L012spin 207.align 16 208.L012spin: 209 incl %eax 210 cmpl (%ecx),%edx 211 je .L012spin 212.long 529567888 213 ret 214.L011nospin: 215 xorl %eax,%eax 216 xorl %edx,%edx 217 ret 218.size OPENSSL_far_spin,.-.L_OPENSSL_far_spin_begin 219.globl OPENSSL_wipe_cpu 220.type OPENSSL_wipe_cpu,@function 221.align 16 222OPENSSL_wipe_cpu: 223.L_OPENSSL_wipe_cpu_begin: 224 xorl %eax,%eax 225 xorl %edx,%edx 226 leal OPENSSL_ia32cap_P,%ecx 227 movl (%ecx),%ecx 228 btl $1,(%ecx) 229 jnc .L013no_x87 230 andl $83886080,%ecx 231 cmpl $83886080,%ecx 232 jne .L014no_sse2 233 pxor %xmm0,%xmm0 234 pxor %xmm1,%xmm1 235 pxor %xmm2,%xmm2 236 pxor %xmm3,%xmm3 237 pxor %xmm4,%xmm4 238 pxor %xmm5,%xmm5 239 pxor %xmm6,%xmm6 240 pxor %xmm7,%xmm7 241.L014no_sse2: 242.long 4007259865,4007259865,4007259865,4007259865,2430851995 243.L013no_x87: 244 leal 4(%esp),%eax 245 ret 246.size OPENSSL_wipe_cpu,.-.L_OPENSSL_wipe_cpu_begin 247.globl OPENSSL_atomic_add 248.type OPENSSL_atomic_add,@function 249.align 16 250OPENSSL_atomic_add: 251.L_OPENSSL_atomic_add_begin: 252 movl 4(%esp),%edx 253 movl 8(%esp),%ecx 254 pushl %ebx 255 nop 256 movl (%edx),%eax 257.L015spin: 258 leal (%eax,%ecx,1),%ebx 259 nop 260.long 447811568 261 jne .L015spin 262 movl %ebx,%eax 263 popl %ebx 264 ret 265.size OPENSSL_atomic_add,.-.L_OPENSSL_atomic_add_begin 266.globl OPENSSL_indirect_call 267.type OPENSSL_indirect_call,@function 268.align 16 269OPENSSL_indirect_call: 270.L_OPENSSL_indirect_call_begin: 271 pushl %ebp 272 movl %esp,%ebp 273 subl $28,%esp 274 movl 12(%ebp),%ecx 275 movl %ecx,(%esp) 276 movl 16(%ebp),%edx 277 movl %edx,4(%esp) 278 movl 20(%ebp),%eax 279 movl %eax,8(%esp) 280 movl 24(%ebp),%eax 281 movl %eax,12(%esp) 282 movl 28(%ebp),%eax 283 movl %eax,16(%esp) 284 movl 32(%ebp),%eax 285 movl %eax,20(%esp) 286 movl 36(%ebp),%eax 287 movl %eax,24(%esp) 288 call *8(%ebp) 289 movl %ebp,%esp 290 popl %ebp 291 ret 292.size OPENSSL_indirect_call,.-.L_OPENSSL_indirect_call_begin 293.globl OPENSSL_cleanse 294.type OPENSSL_cleanse,@function 295.align 16 296OPENSSL_cleanse: 297.L_OPENSSL_cleanse_begin: 298 movl 4(%esp),%edx 299 movl 8(%esp),%ecx 300 xorl %eax,%eax 301 cmpl $7,%ecx 302 jae .L016lot 303 cmpl $0,%ecx 304 je .L017ret 305.L018little: 306 movb %al,(%edx) 307 subl $1,%ecx 308 leal 1(%edx),%edx 309 jnz .L018little 310.L017ret: 311 ret 312.align 16 313.L016lot: 314 testl $3,%edx 315 jz .L019aligned 316 movb %al,(%edx) 317 leal -1(%ecx),%ecx 318 leal 1(%edx),%edx 319 jmp .L016lot 320.L019aligned: 321 movl %eax,(%edx) 322 leal -4(%ecx),%ecx 323 testl $-4,%ecx 324 leal 4(%edx),%edx 325 jnz .L019aligned 326 cmpl $0,%ecx 327 jne .L018little 328 ret 329.size OPENSSL_cleanse,.-.L_OPENSSL_cleanse_begin 330.globl OPENSSL_ia32_rdrand 331.type OPENSSL_ia32_rdrand,@function 332.align 16 333OPENSSL_ia32_rdrand: 334.L_OPENSSL_ia32_rdrand_begin: 335 movl $8,%ecx 336.L020loop: 337.byte 15,199,240 338 jc .L021break 339 loop .L020loop 340.L021break: 341 cmpl $0,%eax 342 cmovel %ecx,%eax 343 ret 344.size OPENSSL_ia32_rdrand,.-.L_OPENSSL_ia32_rdrand_begin 345.globl OPENSSL_ia32_rdseed 346.type OPENSSL_ia32_rdseed,@function 347.align 16 348OPENSSL_ia32_rdseed: 349.L_OPENSSL_ia32_rdseed_begin: 350 movl $8,%ecx 351.L022loop: 352.byte 15,199,248 353 jc .L023break 354 loop .L022loop 355.L023break: 356 cmpl $0,%eax 357 cmovel %ecx,%eax 358 ret 359.size OPENSSL_ia32_rdseed,.-.L_OPENSSL_ia32_rdseed_begin 360.hidden OPENSSL_cpuid_setup 361.hidden OPENSSL_ia32cap_P 362.comm OPENSSL_ia32cap_P,16,4 363.section .init 364 call OPENSSL_cpuid_setup 365