1 /* $NetBSD: vmwgfx_stdu.c,v 1.3 2021/12/18 23:45:45 riastradh Exp $ */
2
3 // SPDX-License-Identifier: GPL-2.0 OR MIT
4 /******************************************************************************
5 *
6 * COPYRIGHT (C) 2014-2015 VMware, Inc., Palo Alto, CA., USA
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the
10 * "Software"), to deal in the Software without restriction, including
11 * without limitation the rights to use, copy, modify, merge, publish,
12 * distribute, sub license, and/or sell copies of the Software, and to
13 * permit persons to whom the Software is furnished to do so, subject to
14 * the following conditions:
15 *
16 * The above copyright notice and this permission notice (including the
17 * next paragraph) shall be included in all copies or substantial portions
18 * of the Software.
19 *
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
23 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
24 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
25 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
26 * USE OR OTHER DEALINGS IN THE SOFTWARE.
27 *
28 ******************************************************************************/
29
30 #include <sys/cdefs.h>
31 __KERNEL_RCSID(0, "$NetBSD: vmwgfx_stdu.c,v 1.3 2021/12/18 23:45:45 riastradh Exp $");
32
33 #include <drm/drm_atomic.h>
34 #include <drm/drm_atomic_helper.h>
35 #include <drm/drm_damage_helper.h>
36 #include <drm/drm_fourcc.h>
37 #include <drm/drm_plane_helper.h>
38 #include <drm/drm_vblank.h>
39
40 #include "vmwgfx_kms.h"
41 #include "device_include/svga3d_surfacedefs.h"
42
43 #define vmw_crtc_to_stdu(x) \
44 container_of(x, struct vmw_screen_target_display_unit, base.crtc)
45 #define vmw_encoder_to_stdu(x) \
46 container_of(x, struct vmw_screen_target_display_unit, base.encoder)
47 #define vmw_connector_to_stdu(x) \
48 container_of(x, struct vmw_screen_target_display_unit, base.connector)
49
50
51
52 enum stdu_content_type {
53 SAME_AS_DISPLAY = 0,
54 SEPARATE_SURFACE,
55 SEPARATE_BO
56 };
57
58 /**
59 * struct vmw_stdu_dirty - closure structure for the update functions
60 *
61 * @base: The base type we derive from. Used by vmw_kms_helper_dirty().
62 * @transfer: Transfer direction for DMA command.
63 * @left: Left side of bounding box.
64 * @right: Right side of bounding box.
65 * @top: Top side of bounding box.
66 * @bottom: Bottom side of bounding box.
67 * @fb_left: Left side of the framebuffer/content bounding box
68 * @fb_top: Top of the framebuffer/content bounding box
69 * @buf: buffer object when DMA-ing between buffer and screen targets.
70 * @sid: Surface ID when copying between surface and screen targets.
71 */
72 struct vmw_stdu_dirty {
73 struct vmw_kms_dirty base;
74 SVGA3dTransferType transfer;
75 s32 left, right, top, bottom;
76 s32 fb_left, fb_top;
77 u32 pitch;
78 union {
79 struct vmw_buffer_object *buf;
80 u32 sid;
81 };
82 };
83
84 /*
85 * SVGA commands that are used by this code. Please see the device headers
86 * for explanation.
87 */
88 struct vmw_stdu_update {
89 SVGA3dCmdHeader header;
90 SVGA3dCmdUpdateGBScreenTarget body;
91 };
92
93 struct vmw_stdu_dma {
94 SVGA3dCmdHeader header;
95 SVGA3dCmdSurfaceDMA body;
96 };
97
98 struct vmw_stdu_surface_copy {
99 SVGA3dCmdHeader header;
100 SVGA3dCmdSurfaceCopy body;
101 };
102
103 struct vmw_stdu_update_gb_image {
104 SVGA3dCmdHeader header;
105 SVGA3dCmdUpdateGBImage body;
106 };
107
108 /**
109 * struct vmw_screen_target_display_unit
110 *
111 * @base: VMW specific DU structure
112 * @display_srf: surface to be displayed. The dimension of this will always
113 * match the display mode. If the display mode matches
114 * content_vfbs dimensions, then this is a pointer into the
115 * corresponding field in content_vfbs. If not, then this
116 * is a separate buffer to which content_vfbs will blit to.
117 * @content_type: content_fb type
118 * @defined: true if the current display unit has been initialized
119 */
120 struct vmw_screen_target_display_unit {
121 struct vmw_display_unit base;
122 struct vmw_surface *display_srf;
123 enum stdu_content_type content_fb_type;
124 s32 display_width, display_height;
125
126 bool defined;
127
128 /* For CPU Blit */
129 unsigned int cpp;
130 };
131
132
133
134 static void vmw_stdu_destroy(struct vmw_screen_target_display_unit *stdu);
135
136
137
138 /******************************************************************************
139 * Screen Target Display Unit CRTC Functions
140 *****************************************************************************/
141
142
143 /**
144 * vmw_stdu_crtc_destroy - cleans up the STDU
145 *
146 * @crtc: used to get a reference to the containing STDU
147 */
vmw_stdu_crtc_destroy(struct drm_crtc * crtc)148 static void vmw_stdu_crtc_destroy(struct drm_crtc *crtc)
149 {
150 vmw_stdu_destroy(vmw_crtc_to_stdu(crtc));
151 }
152
153 /**
154 * vmw_stdu_define_st - Defines a Screen Target
155 *
156 * @dev_priv: VMW DRM device
157 * @stdu: display unit to create a Screen Target for
158 * @mode: The mode to set.
159 * @crtc_x: X coordinate of screen target relative to framebuffer origin.
160 * @crtc_y: Y coordinate of screen target relative to framebuffer origin.
161 *
162 * Creates a STDU that we can used later. This function is called whenever the
163 * framebuffer size changes.
164 *
165 * RETURNs:
166 * 0 on success, error code on failure
167 */
vmw_stdu_define_st(struct vmw_private * dev_priv,struct vmw_screen_target_display_unit * stdu,struct drm_display_mode * mode,int crtc_x,int crtc_y)168 static int vmw_stdu_define_st(struct vmw_private *dev_priv,
169 struct vmw_screen_target_display_unit *stdu,
170 struct drm_display_mode *mode,
171 int crtc_x, int crtc_y)
172 {
173 struct {
174 SVGA3dCmdHeader header;
175 SVGA3dCmdDefineGBScreenTarget body;
176 } *cmd;
177
178 cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));
179 if (unlikely(cmd == NULL))
180 return -ENOMEM;
181
182 cmd->header.id = SVGA_3D_CMD_DEFINE_GB_SCREENTARGET;
183 cmd->header.size = sizeof(cmd->body);
184
185 cmd->body.stid = stdu->base.unit;
186 cmd->body.width = mode->hdisplay;
187 cmd->body.height = mode->vdisplay;
188 cmd->body.flags = (0 == cmd->body.stid) ? SVGA_STFLAG_PRIMARY : 0;
189 cmd->body.dpi = 0;
190 cmd->body.xRoot = crtc_x;
191 cmd->body.yRoot = crtc_y;
192
193 stdu->base.set_gui_x = cmd->body.xRoot;
194 stdu->base.set_gui_y = cmd->body.yRoot;
195
196 vmw_fifo_commit(dev_priv, sizeof(*cmd));
197
198 stdu->defined = true;
199 stdu->display_width = mode->hdisplay;
200 stdu->display_height = mode->vdisplay;
201
202 return 0;
203 }
204
205
206
207 /**
208 * vmw_stdu_bind_st - Binds a surface to a Screen Target
209 *
210 * @dev_priv: VMW DRM device
211 * @stdu: display unit affected
212 * @res: Buffer to bind to the screen target. Set to NULL to blank screen.
213 *
214 * Binding a surface to a Screen Target the same as flipping
215 */
vmw_stdu_bind_st(struct vmw_private * dev_priv,struct vmw_screen_target_display_unit * stdu,const struct vmw_resource * res)216 static int vmw_stdu_bind_st(struct vmw_private *dev_priv,
217 struct vmw_screen_target_display_unit *stdu,
218 const struct vmw_resource *res)
219 {
220 SVGA3dSurfaceImageId image;
221
222 struct {
223 SVGA3dCmdHeader header;
224 SVGA3dCmdBindGBScreenTarget body;
225 } *cmd;
226
227
228 if (!stdu->defined) {
229 DRM_ERROR("No screen target defined\n");
230 return -EINVAL;
231 }
232
233 /* Set up image using information in vfb */
234 memset(&image, 0, sizeof(image));
235 image.sid = res ? res->id : SVGA3D_INVALID_ID;
236
237 cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));
238 if (unlikely(cmd == NULL))
239 return -ENOMEM;
240
241 cmd->header.id = SVGA_3D_CMD_BIND_GB_SCREENTARGET;
242 cmd->header.size = sizeof(cmd->body);
243
244 cmd->body.stid = stdu->base.unit;
245 cmd->body.image = image;
246
247 vmw_fifo_commit(dev_priv, sizeof(*cmd));
248
249 return 0;
250 }
251
252 /**
253 * vmw_stdu_populate_update - populate an UPDATE_GB_SCREENTARGET command with a
254 * bounding box.
255 *
256 * @cmd: Pointer to command stream.
257 * @unit: Screen target unit.
258 * @left: Left side of bounding box.
259 * @right: Right side of bounding box.
260 * @top: Top side of bounding box.
261 * @bottom: Bottom side of bounding box.
262 */
vmw_stdu_populate_update(void * cmd,int unit,s32 left,s32 right,s32 top,s32 bottom)263 static void vmw_stdu_populate_update(void *cmd, int unit,
264 s32 left, s32 right, s32 top, s32 bottom)
265 {
266 struct vmw_stdu_update *update = cmd;
267
268 update->header.id = SVGA_3D_CMD_UPDATE_GB_SCREENTARGET;
269 update->header.size = sizeof(update->body);
270
271 update->body.stid = unit;
272 update->body.rect.x = left;
273 update->body.rect.y = top;
274 update->body.rect.w = right - left;
275 update->body.rect.h = bottom - top;
276 }
277
278 /**
279 * vmw_stdu_update_st - Full update of a Screen Target
280 *
281 * @dev_priv: VMW DRM device
282 * @stdu: display unit affected
283 *
284 * This function needs to be called whenever the content of a screen
285 * target has changed completely. Typically as a result of a backing
286 * surface change.
287 *
288 * RETURNS:
289 * 0 on success, error code on failure
290 */
vmw_stdu_update_st(struct vmw_private * dev_priv,struct vmw_screen_target_display_unit * stdu)291 static int vmw_stdu_update_st(struct vmw_private *dev_priv,
292 struct vmw_screen_target_display_unit *stdu)
293 {
294 struct vmw_stdu_update *cmd;
295
296 if (!stdu->defined) {
297 DRM_ERROR("No screen target defined");
298 return -EINVAL;
299 }
300
301 cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));
302 if (unlikely(cmd == NULL))
303 return -ENOMEM;
304
305 vmw_stdu_populate_update(cmd, stdu->base.unit,
306 0, stdu->display_width,
307 0, stdu->display_height);
308
309 vmw_fifo_commit(dev_priv, sizeof(*cmd));
310
311 return 0;
312 }
313
314
315
316 /**
317 * vmw_stdu_destroy_st - Destroy a Screen Target
318 *
319 * @dev_priv: VMW DRM device
320 * @stdu: display unit to destroy
321 */
vmw_stdu_destroy_st(struct vmw_private * dev_priv,struct vmw_screen_target_display_unit * stdu)322 static int vmw_stdu_destroy_st(struct vmw_private *dev_priv,
323 struct vmw_screen_target_display_unit *stdu)
324 {
325 int ret;
326
327 struct {
328 SVGA3dCmdHeader header;
329 SVGA3dCmdDestroyGBScreenTarget body;
330 } *cmd;
331
332
333 /* Nothing to do if not successfully defined */
334 if (unlikely(!stdu->defined))
335 return 0;
336
337 cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));
338 if (unlikely(cmd == NULL))
339 return -ENOMEM;
340
341 cmd->header.id = SVGA_3D_CMD_DESTROY_GB_SCREENTARGET;
342 cmd->header.size = sizeof(cmd->body);
343
344 cmd->body.stid = stdu->base.unit;
345
346 vmw_fifo_commit(dev_priv, sizeof(*cmd));
347
348 /* Force sync */
349 ret = vmw_fallback_wait(dev_priv, false, true, 0, false, 3*HZ);
350 if (unlikely(ret != 0))
351 DRM_ERROR("Failed to sync with HW");
352
353 stdu->defined = false;
354 stdu->display_width = 0;
355 stdu->display_height = 0;
356
357 return ret;
358 }
359
360
361 /**
362 * vmw_stdu_crtc_mode_set_nofb - Updates screen target size
363 *
364 * @crtc: CRTC associated with the screen target
365 *
366 * This function defines/destroys a screen target
367 *
368 */
vmw_stdu_crtc_mode_set_nofb(struct drm_crtc * crtc)369 static void vmw_stdu_crtc_mode_set_nofb(struct drm_crtc *crtc)
370 {
371 struct vmw_private *dev_priv;
372 struct vmw_screen_target_display_unit *stdu;
373 struct drm_connector_state *conn_state;
374 struct vmw_connector_state *vmw_conn_state;
375 int x, y, ret;
376
377 stdu = vmw_crtc_to_stdu(crtc);
378 dev_priv = vmw_priv(crtc->dev);
379 conn_state = stdu->base.connector.state;
380 vmw_conn_state = vmw_connector_state_to_vcs(conn_state);
381
382 if (stdu->defined) {
383 ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
384 if (ret)
385 DRM_ERROR("Failed to blank CRTC\n");
386
387 (void) vmw_stdu_update_st(dev_priv, stdu);
388
389 ret = vmw_stdu_destroy_st(dev_priv, stdu);
390 if (ret)
391 DRM_ERROR("Failed to destroy Screen Target\n");
392
393 stdu->content_fb_type = SAME_AS_DISPLAY;
394 }
395
396 if (!crtc->state->enable)
397 return;
398
399 x = vmw_conn_state->gui_x;
400 y = vmw_conn_state->gui_y;
401
402 vmw_svga_enable(dev_priv);
403 ret = vmw_stdu_define_st(dev_priv, stdu, &crtc->mode, x, y);
404
405 if (ret)
406 DRM_ERROR("Failed to define Screen Target of size %dx%d\n",
407 crtc->x, crtc->y);
408 }
409
410
vmw_stdu_crtc_helper_prepare(struct drm_crtc * crtc)411 static void vmw_stdu_crtc_helper_prepare(struct drm_crtc *crtc)
412 {
413 }
414
vmw_stdu_crtc_atomic_enable(struct drm_crtc * crtc,struct drm_crtc_state * old_state)415 static void vmw_stdu_crtc_atomic_enable(struct drm_crtc *crtc,
416 struct drm_crtc_state *old_state)
417 {
418 }
419
vmw_stdu_crtc_atomic_disable(struct drm_crtc * crtc,struct drm_crtc_state * old_state)420 static void vmw_stdu_crtc_atomic_disable(struct drm_crtc *crtc,
421 struct drm_crtc_state *old_state)
422 {
423 struct vmw_private *dev_priv;
424 struct vmw_screen_target_display_unit *stdu;
425 int ret;
426
427
428 if (!crtc) {
429 DRM_ERROR("CRTC is NULL\n");
430 return;
431 }
432
433 stdu = vmw_crtc_to_stdu(crtc);
434 dev_priv = vmw_priv(crtc->dev);
435
436 if (stdu->defined) {
437 ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
438 if (ret)
439 DRM_ERROR("Failed to blank CRTC\n");
440
441 (void) vmw_stdu_update_st(dev_priv, stdu);
442
443 ret = vmw_stdu_destroy_st(dev_priv, stdu);
444 if (ret)
445 DRM_ERROR("Failed to destroy Screen Target\n");
446
447 stdu->content_fb_type = SAME_AS_DISPLAY;
448 }
449 }
450
451 /**
452 * vmw_stdu_bo_clip - Callback to encode a suface DMA command cliprect
453 *
454 * @dirty: The closure structure.
455 *
456 * Encodes a surface DMA command cliprect and updates the bounding box
457 * for the DMA.
458 */
vmw_stdu_bo_clip(struct vmw_kms_dirty * dirty)459 static void vmw_stdu_bo_clip(struct vmw_kms_dirty *dirty)
460 {
461 struct vmw_stdu_dirty *ddirty =
462 container_of(dirty, struct vmw_stdu_dirty, base);
463 struct vmw_stdu_dma *cmd = dirty->cmd;
464 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
465
466 blit += dirty->num_hits;
467 blit->srcx = dirty->fb_x;
468 blit->srcy = dirty->fb_y;
469 blit->x = dirty->unit_x1;
470 blit->y = dirty->unit_y1;
471 blit->d = 1;
472 blit->w = dirty->unit_x2 - dirty->unit_x1;
473 blit->h = dirty->unit_y2 - dirty->unit_y1;
474 dirty->num_hits++;
475
476 if (ddirty->transfer != SVGA3D_WRITE_HOST_VRAM)
477 return;
478
479 /* Destination bounding box */
480 ddirty->left = min_t(s32, ddirty->left, dirty->unit_x1);
481 ddirty->top = min_t(s32, ddirty->top, dirty->unit_y1);
482 ddirty->right = max_t(s32, ddirty->right, dirty->unit_x2);
483 ddirty->bottom = max_t(s32, ddirty->bottom, dirty->unit_y2);
484 }
485
486 /**
487 * vmw_stdu_bo_fifo_commit - Callback to fill in and submit a DMA command.
488 *
489 * @dirty: The closure structure.
490 *
491 * Fills in the missing fields in a DMA command, and optionally encodes
492 * a screen target update command, depending on transfer direction.
493 */
vmw_stdu_bo_fifo_commit(struct vmw_kms_dirty * dirty)494 static void vmw_stdu_bo_fifo_commit(struct vmw_kms_dirty *dirty)
495 {
496 struct vmw_stdu_dirty *ddirty =
497 container_of(dirty, struct vmw_stdu_dirty, base);
498 struct vmw_screen_target_display_unit *stdu =
499 container_of(dirty->unit, typeof(*stdu), base);
500 struct vmw_stdu_dma *cmd = dirty->cmd;
501 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
502 SVGA3dCmdSurfaceDMASuffix *suffix =
503 (SVGA3dCmdSurfaceDMASuffix *) &blit[dirty->num_hits];
504 size_t blit_size = sizeof(*blit) * dirty->num_hits + sizeof(*suffix);
505
506 if (!dirty->num_hits) {
507 vmw_fifo_commit(dirty->dev_priv, 0);
508 return;
509 }
510
511 cmd->header.id = SVGA_3D_CMD_SURFACE_DMA;
512 cmd->header.size = sizeof(cmd->body) + blit_size;
513 vmw_bo_get_guest_ptr(&ddirty->buf->base, &cmd->body.guest.ptr);
514 cmd->body.guest.pitch = ddirty->pitch;
515 cmd->body.host.sid = stdu->display_srf->res.id;
516 cmd->body.host.face = 0;
517 cmd->body.host.mipmap = 0;
518 cmd->body.transfer = ddirty->transfer;
519 suffix->suffixSize = sizeof(*suffix);
520 suffix->maximumOffset = ddirty->buf->base.num_pages * PAGE_SIZE;
521
522 if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM) {
523 blit_size += sizeof(struct vmw_stdu_update);
524
525 vmw_stdu_populate_update(&suffix[1], stdu->base.unit,
526 ddirty->left, ddirty->right,
527 ddirty->top, ddirty->bottom);
528 }
529
530 vmw_fifo_commit(dirty->dev_priv, sizeof(*cmd) + blit_size);
531
532 stdu->display_srf->res.res_dirty = true;
533 ddirty->left = ddirty->top = S32_MAX;
534 ddirty->right = ddirty->bottom = S32_MIN;
535 }
536
537
538 /**
539 * vmw_stdu_bo_cpu_clip - Callback to encode a CPU blit
540 *
541 * @dirty: The closure structure.
542 *
543 * This function calculates the bounding box for all the incoming clips.
544 */
vmw_stdu_bo_cpu_clip(struct vmw_kms_dirty * dirty)545 static void vmw_stdu_bo_cpu_clip(struct vmw_kms_dirty *dirty)
546 {
547 struct vmw_stdu_dirty *ddirty =
548 container_of(dirty, struct vmw_stdu_dirty, base);
549
550 dirty->num_hits = 1;
551
552 /* Calculate destination bounding box */
553 ddirty->left = min_t(s32, ddirty->left, dirty->unit_x1);
554 ddirty->top = min_t(s32, ddirty->top, dirty->unit_y1);
555 ddirty->right = max_t(s32, ddirty->right, dirty->unit_x2);
556 ddirty->bottom = max_t(s32, ddirty->bottom, dirty->unit_y2);
557
558 /*
559 * Calculate content bounding box. We only need the top-left
560 * coordinate because width and height will be the same as the
561 * destination bounding box above
562 */
563 ddirty->fb_left = min_t(s32, ddirty->fb_left, dirty->fb_x);
564 ddirty->fb_top = min_t(s32, ddirty->fb_top, dirty->fb_y);
565 }
566
567
568 /**
569 * vmw_stdu_bo_cpu_commit - Callback to do a CPU blit from buffer object
570 *
571 * @dirty: The closure structure.
572 *
573 * For the special case when we cannot create a proxy surface in a
574 * 2D VM, we have to do a CPU blit ourselves.
575 */
vmw_stdu_bo_cpu_commit(struct vmw_kms_dirty * dirty)576 static void vmw_stdu_bo_cpu_commit(struct vmw_kms_dirty *dirty)
577 {
578 struct vmw_stdu_dirty *ddirty =
579 container_of(dirty, struct vmw_stdu_dirty, base);
580 struct vmw_screen_target_display_unit *stdu =
581 container_of(dirty->unit, typeof(*stdu), base);
582 s32 width, height;
583 s32 src_pitch, dst_pitch;
584 struct ttm_buffer_object *src_bo, *dst_bo;
585 u32 src_offset, dst_offset;
586 struct vmw_diff_cpy diff = VMW_CPU_BLIT_DIFF_INITIALIZER(stdu->cpp);
587
588 if (!dirty->num_hits)
589 return;
590
591 width = ddirty->right - ddirty->left;
592 height = ddirty->bottom - ddirty->top;
593
594 if (width == 0 || height == 0)
595 return;
596
597 /* Assume we are blitting from Guest (bo) to Host (display_srf) */
598 dst_pitch = stdu->display_srf->base_size.width * stdu->cpp;
599 dst_bo = &stdu->display_srf->res.backup->base;
600 dst_offset = ddirty->top * dst_pitch + ddirty->left * stdu->cpp;
601
602 src_pitch = ddirty->pitch;
603 src_bo = &ddirty->buf->base;
604 src_offset = ddirty->fb_top * src_pitch + ddirty->fb_left * stdu->cpp;
605
606 /* Swap src and dst if the assumption was wrong. */
607 if (ddirty->transfer != SVGA3D_WRITE_HOST_VRAM) {
608 swap(dst_pitch, src_pitch);
609 swap(dst_bo, src_bo);
610 swap(src_offset, dst_offset);
611 }
612
613 (void) vmw_bo_cpu_blit(dst_bo, dst_offset, dst_pitch,
614 src_bo, src_offset, src_pitch,
615 width * stdu->cpp, height, &diff);
616
617 if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM &&
618 drm_rect_visible(&diff.rect)) {
619 struct vmw_private *dev_priv;
620 struct vmw_stdu_update *cmd;
621 struct drm_clip_rect region;
622 int ret;
623
624 /* We are updating the actual surface, not a proxy */
625 region.x1 = diff.rect.x1;
626 region.x2 = diff.rect.x2;
627 region.y1 = diff.rect.y1;
628 region.y2 = diff.rect.y2;
629 ret = vmw_kms_update_proxy(&stdu->display_srf->res, ®ion,
630 1, 1);
631 if (ret)
632 goto out_cleanup;
633
634
635 dev_priv = vmw_priv(stdu->base.crtc.dev);
636 cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));
637 if (!cmd)
638 goto out_cleanup;
639
640 vmw_stdu_populate_update(cmd, stdu->base.unit,
641 region.x1, region.x2,
642 region.y1, region.y2);
643
644 vmw_fifo_commit(dev_priv, sizeof(*cmd));
645 }
646
647 out_cleanup:
648 ddirty->left = ddirty->top = ddirty->fb_left = ddirty->fb_top = S32_MAX;
649 ddirty->right = ddirty->bottom = S32_MIN;
650 }
651
652 /**
653 * vmw_kms_stdu_dma - Perform a DMA transfer between a buffer-object backed
654 * framebuffer and the screen target system.
655 *
656 * @dev_priv: Pointer to the device private structure.
657 * @file_priv: Pointer to a struct drm-file identifying the caller. May be
658 * set to NULL, but then @user_fence_rep must also be set to NULL.
659 * @vfb: Pointer to the buffer-object backed framebuffer.
660 * @clips: Array of clip rects. Either @clips or @vclips must be NULL.
661 * @vclips: Alternate array of clip rects. Either @clips or @vclips must
662 * be NULL.
663 * @num_clips: Number of clip rects in @clips or @vclips.
664 * @increment: Increment to use when looping over @clips or @vclips.
665 * @to_surface: Whether to DMA to the screen target system as opposed to
666 * from the screen target system.
667 * @interruptible: Whether to perform waits interruptible if possible.
668 * @crtc: If crtc is passed, perform stdu dma on that crtc only.
669 *
670 * If DMA-ing till the screen target system, the function will also notify
671 * the screen target system that a bounding box of the cliprects has been
672 * updated.
673 * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
674 * interrupted.
675 */
vmw_kms_stdu_dma(struct vmw_private * dev_priv,struct drm_file * file_priv,struct vmw_framebuffer * vfb,struct drm_vmw_fence_rep __user * user_fence_rep,struct drm_clip_rect * clips,struct drm_vmw_rect * vclips,uint32_t num_clips,int increment,bool to_surface,bool interruptible,struct drm_crtc * crtc)676 int vmw_kms_stdu_dma(struct vmw_private *dev_priv,
677 struct drm_file *file_priv,
678 struct vmw_framebuffer *vfb,
679 struct drm_vmw_fence_rep __user *user_fence_rep,
680 struct drm_clip_rect *clips,
681 struct drm_vmw_rect *vclips,
682 uint32_t num_clips,
683 int increment,
684 bool to_surface,
685 bool interruptible,
686 struct drm_crtc *crtc)
687 {
688 struct vmw_buffer_object *buf =
689 container_of(vfb, struct vmw_framebuffer_bo, base)->buffer;
690 struct vmw_stdu_dirty ddirty;
691 int ret;
692 bool cpu_blit = !(dev_priv->capabilities & SVGA_CAP_3D);
693 DECLARE_VAL_CONTEXT(val_ctx, NULL, 0);
694
695 /*
696 * VMs without 3D support don't have the surface DMA command and
697 * we'll be using a CPU blit, and the framebuffer should be moved out
698 * of VRAM.
699 */
700 ret = vmw_validation_add_bo(&val_ctx, buf, false, cpu_blit);
701 if (ret)
702 return ret;
703
704 ret = vmw_validation_prepare(&val_ctx, NULL, interruptible);
705 if (ret)
706 goto out_unref;
707
708 ddirty.transfer = (to_surface) ? SVGA3D_WRITE_HOST_VRAM :
709 SVGA3D_READ_HOST_VRAM;
710 ddirty.left = ddirty.top = S32_MAX;
711 ddirty.right = ddirty.bottom = S32_MIN;
712 ddirty.fb_left = ddirty.fb_top = S32_MAX;
713 ddirty.pitch = vfb->base.pitches[0];
714 ddirty.buf = buf;
715 ddirty.base.fifo_commit = vmw_stdu_bo_fifo_commit;
716 ddirty.base.clip = vmw_stdu_bo_clip;
717 ddirty.base.fifo_reserve_size = sizeof(struct vmw_stdu_dma) +
718 num_clips * sizeof(SVGA3dCopyBox) +
719 sizeof(SVGA3dCmdSurfaceDMASuffix);
720 if (to_surface)
721 ddirty.base.fifo_reserve_size += sizeof(struct vmw_stdu_update);
722
723
724 if (cpu_blit) {
725 ddirty.base.fifo_commit = vmw_stdu_bo_cpu_commit;
726 ddirty.base.clip = vmw_stdu_bo_cpu_clip;
727 ddirty.base.fifo_reserve_size = 0;
728 }
729
730 ddirty.base.crtc = crtc;
731
732 ret = vmw_kms_helper_dirty(dev_priv, vfb, clips, vclips,
733 0, 0, num_clips, increment, &ddirty.base);
734
735 vmw_kms_helper_validation_finish(dev_priv, file_priv, &val_ctx, NULL,
736 user_fence_rep);
737 return ret;
738
739 out_unref:
740 vmw_validation_unref_lists(&val_ctx);
741 return ret;
742 }
743
744 /**
745 * vmw_stdu_surface_clip - Callback to encode a surface copy command cliprect
746 *
747 * @dirty: The closure structure.
748 *
749 * Encodes a surface copy command cliprect and updates the bounding box
750 * for the copy.
751 */
vmw_kms_stdu_surface_clip(struct vmw_kms_dirty * dirty)752 static void vmw_kms_stdu_surface_clip(struct vmw_kms_dirty *dirty)
753 {
754 struct vmw_stdu_dirty *sdirty =
755 container_of(dirty, struct vmw_stdu_dirty, base);
756 struct vmw_stdu_surface_copy *cmd = dirty->cmd;
757 struct vmw_screen_target_display_unit *stdu =
758 container_of(dirty->unit, typeof(*stdu), base);
759
760 if (sdirty->sid != stdu->display_srf->res.id) {
761 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
762
763 blit += dirty->num_hits;
764 blit->srcx = dirty->fb_x;
765 blit->srcy = dirty->fb_y;
766 blit->x = dirty->unit_x1;
767 blit->y = dirty->unit_y1;
768 blit->d = 1;
769 blit->w = dirty->unit_x2 - dirty->unit_x1;
770 blit->h = dirty->unit_y2 - dirty->unit_y1;
771 }
772
773 dirty->num_hits++;
774
775 /* Destination bounding box */
776 sdirty->left = min_t(s32, sdirty->left, dirty->unit_x1);
777 sdirty->top = min_t(s32, sdirty->top, dirty->unit_y1);
778 sdirty->right = max_t(s32, sdirty->right, dirty->unit_x2);
779 sdirty->bottom = max_t(s32, sdirty->bottom, dirty->unit_y2);
780 }
781
782 /**
783 * vmw_stdu_surface_fifo_commit - Callback to fill in and submit a surface
784 * copy command.
785 *
786 * @dirty: The closure structure.
787 *
788 * Fills in the missing fields in a surface copy command, and encodes a screen
789 * target update command.
790 */
vmw_kms_stdu_surface_fifo_commit(struct vmw_kms_dirty * dirty)791 static void vmw_kms_stdu_surface_fifo_commit(struct vmw_kms_dirty *dirty)
792 {
793 struct vmw_stdu_dirty *sdirty =
794 container_of(dirty, struct vmw_stdu_dirty, base);
795 struct vmw_screen_target_display_unit *stdu =
796 container_of(dirty->unit, typeof(*stdu), base);
797 struct vmw_stdu_surface_copy *cmd = dirty->cmd;
798 struct vmw_stdu_update *update;
799 size_t blit_size = sizeof(SVGA3dCopyBox) * dirty->num_hits;
800 size_t commit_size;
801
802 if (!dirty->num_hits) {
803 vmw_fifo_commit(dirty->dev_priv, 0);
804 return;
805 }
806
807 if (sdirty->sid != stdu->display_srf->res.id) {
808 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
809
810 cmd->header.id = SVGA_3D_CMD_SURFACE_COPY;
811 cmd->header.size = sizeof(cmd->body) + blit_size;
812 cmd->body.src.sid = sdirty->sid;
813 cmd->body.dest.sid = stdu->display_srf->res.id;
814 update = (struct vmw_stdu_update *) &blit[dirty->num_hits];
815 commit_size = sizeof(*cmd) + blit_size + sizeof(*update);
816 stdu->display_srf->res.res_dirty = true;
817 } else {
818 update = dirty->cmd;
819 commit_size = sizeof(*update);
820 }
821
822 vmw_stdu_populate_update(update, stdu->base.unit, sdirty->left,
823 sdirty->right, sdirty->top, sdirty->bottom);
824
825 vmw_fifo_commit(dirty->dev_priv, commit_size);
826
827 sdirty->left = sdirty->top = S32_MAX;
828 sdirty->right = sdirty->bottom = S32_MIN;
829 }
830
831 /**
832 * vmw_kms_stdu_surface_dirty - Dirty part of a surface backed framebuffer
833 *
834 * @dev_priv: Pointer to the device private structure.
835 * @framebuffer: Pointer to the surface-buffer backed framebuffer.
836 * @clips: Array of clip rects. Either @clips or @vclips must be NULL.
837 * @vclips: Alternate array of clip rects. Either @clips or @vclips must
838 * be NULL.
839 * @srf: Pointer to surface to blit from. If NULL, the surface attached
840 * to @framebuffer will be used.
841 * @dest_x: X coordinate offset to align @srf with framebuffer coordinates.
842 * @dest_y: Y coordinate offset to align @srf with framebuffer coordinates.
843 * @num_clips: Number of clip rects in @clips.
844 * @inc: Increment to use when looping over @clips.
845 * @out_fence: If non-NULL, will return a ref-counted pointer to a
846 * struct vmw_fence_obj. The returned fence pointer may be NULL in which
847 * case the device has already synchronized.
848 * @crtc: If crtc is passed, perform surface dirty on that crtc only.
849 *
850 * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
851 * interrupted.
852 */
vmw_kms_stdu_surface_dirty(struct vmw_private * dev_priv,struct vmw_framebuffer * framebuffer,struct drm_clip_rect * clips,struct drm_vmw_rect * vclips,struct vmw_resource * srf,s32 dest_x,s32 dest_y,unsigned num_clips,int inc,struct vmw_fence_obj ** out_fence,struct drm_crtc * crtc)853 int vmw_kms_stdu_surface_dirty(struct vmw_private *dev_priv,
854 struct vmw_framebuffer *framebuffer,
855 struct drm_clip_rect *clips,
856 struct drm_vmw_rect *vclips,
857 struct vmw_resource *srf,
858 s32 dest_x,
859 s32 dest_y,
860 unsigned num_clips, int inc,
861 struct vmw_fence_obj **out_fence,
862 struct drm_crtc *crtc)
863 {
864 struct vmw_framebuffer_surface *vfbs =
865 container_of(framebuffer, typeof(*vfbs), base);
866 struct vmw_stdu_dirty sdirty;
867 DECLARE_VAL_CONTEXT(val_ctx, NULL, 0);
868 int ret;
869
870 if (!srf)
871 srf = &vfbs->surface->res;
872
873 ret = vmw_validation_add_resource(&val_ctx, srf, 0, VMW_RES_DIRTY_NONE,
874 NULL, NULL);
875 if (ret)
876 return ret;
877
878 ret = vmw_validation_prepare(&val_ctx, &dev_priv->cmdbuf_mutex, true);
879 if (ret)
880 goto out_unref;
881
882 if (vfbs->is_bo_proxy) {
883 ret = vmw_kms_update_proxy(srf, clips, num_clips, inc);
884 if (ret)
885 goto out_finish;
886 }
887
888 sdirty.base.fifo_commit = vmw_kms_stdu_surface_fifo_commit;
889 sdirty.base.clip = vmw_kms_stdu_surface_clip;
890 sdirty.base.fifo_reserve_size = sizeof(struct vmw_stdu_surface_copy) +
891 sizeof(SVGA3dCopyBox) * num_clips +
892 sizeof(struct vmw_stdu_update);
893 sdirty.base.crtc = crtc;
894 sdirty.sid = srf->id;
895 sdirty.left = sdirty.top = S32_MAX;
896 sdirty.right = sdirty.bottom = S32_MIN;
897
898 ret = vmw_kms_helper_dirty(dev_priv, framebuffer, clips, vclips,
899 dest_x, dest_y, num_clips, inc,
900 &sdirty.base);
901 out_finish:
902 vmw_kms_helper_validation_finish(dev_priv, NULL, &val_ctx, out_fence,
903 NULL);
904
905 return ret;
906
907 out_unref:
908 vmw_validation_unref_lists(&val_ctx);
909 return ret;
910 }
911
912
913 /*
914 * Screen Target CRTC dispatch table
915 */
916 static const struct drm_crtc_funcs vmw_stdu_crtc_funcs = {
917 .gamma_set = vmw_du_crtc_gamma_set,
918 .destroy = vmw_stdu_crtc_destroy,
919 .reset = vmw_du_crtc_reset,
920 .atomic_duplicate_state = vmw_du_crtc_duplicate_state,
921 .atomic_destroy_state = vmw_du_crtc_destroy_state,
922 .set_config = drm_atomic_helper_set_config,
923 .page_flip = drm_atomic_helper_page_flip,
924 };
925
926
927
928 /******************************************************************************
929 * Screen Target Display Unit Encoder Functions
930 *****************************************************************************/
931
932 /**
933 * vmw_stdu_encoder_destroy - cleans up the STDU
934 *
935 * @encoder: used the get the containing STDU
936 *
937 * vmwgfx cleans up crtc/encoder/connector all at the same time so technically
938 * this can be a no-op. Nevertheless, it doesn't hurt of have this in case
939 * the common KMS code changes and somehow vmw_stdu_crtc_destroy() doesn't
940 * get called.
941 */
vmw_stdu_encoder_destroy(struct drm_encoder * encoder)942 static void vmw_stdu_encoder_destroy(struct drm_encoder *encoder)
943 {
944 vmw_stdu_destroy(vmw_encoder_to_stdu(encoder));
945 }
946
947 static const struct drm_encoder_funcs vmw_stdu_encoder_funcs = {
948 .destroy = vmw_stdu_encoder_destroy,
949 };
950
951
952
953 /******************************************************************************
954 * Screen Target Display Unit Connector Functions
955 *****************************************************************************/
956
957 /**
958 * vmw_stdu_connector_destroy - cleans up the STDU
959 *
960 * @connector: used to get the containing STDU
961 *
962 * vmwgfx cleans up crtc/encoder/connector all at the same time so technically
963 * this can be a no-op. Nevertheless, it doesn't hurt of have this in case
964 * the common KMS code changes and somehow vmw_stdu_crtc_destroy() doesn't
965 * get called.
966 */
vmw_stdu_connector_destroy(struct drm_connector * connector)967 static void vmw_stdu_connector_destroy(struct drm_connector *connector)
968 {
969 vmw_stdu_destroy(vmw_connector_to_stdu(connector));
970 }
971
972
973
974 static const struct drm_connector_funcs vmw_stdu_connector_funcs = {
975 .dpms = vmw_du_connector_dpms,
976 .detect = vmw_du_connector_detect,
977 .fill_modes = vmw_du_connector_fill_modes,
978 .destroy = vmw_stdu_connector_destroy,
979 .reset = vmw_du_connector_reset,
980 .atomic_duplicate_state = vmw_du_connector_duplicate_state,
981 .atomic_destroy_state = vmw_du_connector_destroy_state,
982 };
983
984
985 static const struct
986 drm_connector_helper_funcs vmw_stdu_connector_helper_funcs = {
987 };
988
989
990
991 /******************************************************************************
992 * Screen Target Display Plane Functions
993 *****************************************************************************/
994
995
996
997 /**
998 * vmw_stdu_primary_plane_cleanup_fb - Unpins the display surface
999 *
1000 * @plane: display plane
1001 * @old_state: Contains the FB to clean up
1002 *
1003 * Unpins the display surface
1004 *
1005 * Returns 0 on success
1006 */
1007 static void
vmw_stdu_primary_plane_cleanup_fb(struct drm_plane * plane,struct drm_plane_state * old_state)1008 vmw_stdu_primary_plane_cleanup_fb(struct drm_plane *plane,
1009 struct drm_plane_state *old_state)
1010 {
1011 struct vmw_plane_state *vps = vmw_plane_state_to_vps(old_state);
1012
1013 if (vps->surf)
1014 WARN_ON(!vps->pinned);
1015
1016 vmw_du_plane_cleanup_fb(plane, old_state);
1017
1018 vps->content_fb_type = SAME_AS_DISPLAY;
1019 vps->cpp = 0;
1020 }
1021
1022
1023
1024 /**
1025 * vmw_stdu_primary_plane_prepare_fb - Readies the display surface
1026 *
1027 * @plane: display plane
1028 * @new_state: info on the new plane state, including the FB
1029 *
1030 * This function allocates a new display surface if the content is
1031 * backed by a buffer object. The display surface is pinned here, and it'll
1032 * be unpinned in .cleanup_fb()
1033 *
1034 * Returns 0 on success
1035 */
1036 static int
vmw_stdu_primary_plane_prepare_fb(struct drm_plane * plane,struct drm_plane_state * new_state)1037 vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane,
1038 struct drm_plane_state *new_state)
1039 {
1040 struct vmw_private *dev_priv = vmw_priv(plane->dev);
1041 struct drm_framebuffer *new_fb = new_state->fb;
1042 struct vmw_framebuffer *vfb;
1043 struct vmw_plane_state *vps = vmw_plane_state_to_vps(new_state);
1044 enum stdu_content_type new_content_type;
1045 struct vmw_framebuffer_surface *new_vfbs;
1046 struct drm_crtc *crtc = new_state->crtc;
1047 uint32_t hdisplay = new_state->crtc_w, vdisplay = new_state->crtc_h;
1048 int ret;
1049
1050 /* No FB to prepare */
1051 if (!new_fb) {
1052 if (vps->surf) {
1053 WARN_ON(vps->pinned != 0);
1054 vmw_surface_unreference(&vps->surf);
1055 }
1056
1057 return 0;
1058 }
1059
1060 vfb = vmw_framebuffer_to_vfb(new_fb);
1061 new_vfbs = (vfb->bo) ? NULL : vmw_framebuffer_to_vfbs(new_fb);
1062
1063 if (new_vfbs && new_vfbs->surface->base_size.width == hdisplay &&
1064 new_vfbs->surface->base_size.height == vdisplay)
1065 new_content_type = SAME_AS_DISPLAY;
1066 else if (vfb->bo)
1067 new_content_type = SEPARATE_BO;
1068 else
1069 new_content_type = SEPARATE_SURFACE;
1070
1071 if (new_content_type != SAME_AS_DISPLAY) {
1072 struct vmw_surface content_srf;
1073 struct drm_vmw_size display_base_size = {0};
1074
1075 display_base_size.width = hdisplay;
1076 display_base_size.height = vdisplay;
1077 display_base_size.depth = 1;
1078
1079 /*
1080 * If content buffer is a buffer object, then we have to
1081 * construct surface info
1082 */
1083 if (new_content_type == SEPARATE_BO) {
1084
1085 switch (new_fb->format->cpp[0]*8) {
1086 case 32:
1087 content_srf.format = SVGA3D_X8R8G8B8;
1088 break;
1089
1090 case 16:
1091 content_srf.format = SVGA3D_R5G6B5;
1092 break;
1093
1094 case 8:
1095 content_srf.format = SVGA3D_P8;
1096 break;
1097
1098 default:
1099 DRM_ERROR("Invalid format\n");
1100 return -EINVAL;
1101 }
1102
1103 content_srf.flags = 0;
1104 content_srf.mip_levels[0] = 1;
1105 content_srf.multisample_count = 0;
1106 content_srf.multisample_pattern =
1107 SVGA3D_MS_PATTERN_NONE;
1108 content_srf.quality_level = SVGA3D_MS_QUALITY_NONE;
1109 } else {
1110 content_srf = *new_vfbs->surface;
1111 }
1112
1113 if (vps->surf) {
1114 struct drm_vmw_size cur_base_size = vps->surf->base_size;
1115
1116 if (cur_base_size.width != display_base_size.width ||
1117 cur_base_size.height != display_base_size.height ||
1118 vps->surf->format != content_srf.format) {
1119 WARN_ON(vps->pinned != 0);
1120 vmw_surface_unreference(&vps->surf);
1121 }
1122
1123 }
1124
1125 if (!vps->surf) {
1126 ret = vmw_surface_gb_priv_define
1127 (crtc->dev,
1128 /* Kernel visible only */
1129 0,
1130 content_srf.flags,
1131 content_srf.format,
1132 true, /* a scanout buffer */
1133 content_srf.mip_levels[0],
1134 content_srf.multisample_count,
1135 0,
1136 display_base_size,
1137 content_srf.multisample_pattern,
1138 content_srf.quality_level,
1139 &vps->surf);
1140 if (ret != 0) {
1141 DRM_ERROR("Couldn't allocate STDU surface.\n");
1142 return ret;
1143 }
1144 }
1145 } else {
1146 /*
1147 * prepare_fb and clean_fb should only take care of pinning
1148 * and unpinning. References are tracked by state objects.
1149 * The only time we add a reference in prepare_fb is if the
1150 * state object doesn't have a reference to begin with
1151 */
1152 if (vps->surf) {
1153 WARN_ON(vps->pinned != 0);
1154 vmw_surface_unreference(&vps->surf);
1155 }
1156
1157 vps->surf = vmw_surface_reference(new_vfbs->surface);
1158 }
1159
1160 if (vps->surf) {
1161
1162 /* Pin new surface before flipping */
1163 ret = vmw_resource_pin(&vps->surf->res, false);
1164 if (ret)
1165 goto out_srf_unref;
1166
1167 vps->pinned++;
1168 }
1169
1170 vps->content_fb_type = new_content_type;
1171
1172 /*
1173 * This should only happen if the buffer object is too large to create a
1174 * proxy surface for.
1175 * If we are a 2D VM with a buffer object then we have to use CPU blit
1176 * so cache these mappings
1177 */
1178 if (vps->content_fb_type == SEPARATE_BO &&
1179 !(dev_priv->capabilities & SVGA_CAP_3D))
1180 vps->cpp = new_fb->pitches[0] / new_fb->width;
1181
1182 return 0;
1183
1184 out_srf_unref:
1185 vmw_surface_unreference(&vps->surf);
1186 return ret;
1187 }
1188
vmw_stdu_bo_fifo_size(struct vmw_du_update_plane * update,uint32_t num_hits)1189 static uint32_t vmw_stdu_bo_fifo_size(struct vmw_du_update_plane *update,
1190 uint32_t num_hits)
1191 {
1192 return sizeof(struct vmw_stdu_dma) + sizeof(SVGA3dCopyBox) * num_hits +
1193 sizeof(SVGA3dCmdSurfaceDMASuffix) +
1194 sizeof(struct vmw_stdu_update);
1195 }
1196
vmw_stdu_bo_fifo_size_cpu(struct vmw_du_update_plane * update,uint32_t num_hits)1197 static uint32_t vmw_stdu_bo_fifo_size_cpu(struct vmw_du_update_plane *update,
1198 uint32_t num_hits)
1199 {
1200 return sizeof(struct vmw_stdu_update_gb_image) +
1201 sizeof(struct vmw_stdu_update);
1202 }
1203
vmw_stdu_bo_populate_dma(struct vmw_du_update_plane * update,void * cmd,uint32_t num_hits)1204 static uint32_t vmw_stdu_bo_populate_dma(struct vmw_du_update_plane *update,
1205 void *cmd, uint32_t num_hits)
1206 {
1207 struct vmw_screen_target_display_unit *stdu;
1208 struct vmw_framebuffer_bo *vfbbo;
1209 struct vmw_stdu_dma *cmd_dma = cmd;
1210
1211 stdu = container_of(update->du, typeof(*stdu), base);
1212 vfbbo = container_of(update->vfb, typeof(*vfbbo), base);
1213
1214 cmd_dma->header.id = SVGA_3D_CMD_SURFACE_DMA;
1215 cmd_dma->header.size = sizeof(cmd_dma->body) +
1216 sizeof(struct SVGA3dCopyBox) * num_hits +
1217 sizeof(SVGA3dCmdSurfaceDMASuffix);
1218 vmw_bo_get_guest_ptr(&vfbbo->buffer->base, &cmd_dma->body.guest.ptr);
1219 cmd_dma->body.guest.pitch = update->vfb->base.pitches[0];
1220 cmd_dma->body.host.sid = stdu->display_srf->res.id;
1221 cmd_dma->body.host.face = 0;
1222 cmd_dma->body.host.mipmap = 0;
1223 cmd_dma->body.transfer = SVGA3D_WRITE_HOST_VRAM;
1224
1225 return sizeof(*cmd_dma);
1226 }
1227
vmw_stdu_bo_populate_clip(struct vmw_du_update_plane * update,void * cmd,struct drm_rect * clip,uint32_t fb_x,uint32_t fb_y)1228 static uint32_t vmw_stdu_bo_populate_clip(struct vmw_du_update_plane *update,
1229 void *cmd, struct drm_rect *clip,
1230 uint32_t fb_x, uint32_t fb_y)
1231 {
1232 struct SVGA3dCopyBox *box = cmd;
1233
1234 box->srcx = fb_x;
1235 box->srcy = fb_y;
1236 box->srcz = 0;
1237 box->x = clip->x1;
1238 box->y = clip->y1;
1239 box->z = 0;
1240 box->w = drm_rect_width(clip);
1241 box->h = drm_rect_height(clip);
1242 box->d = 1;
1243
1244 return sizeof(*box);
1245 }
1246
vmw_stdu_bo_populate_update(struct vmw_du_update_plane * update,void * cmd,struct drm_rect * bb)1247 static uint32_t vmw_stdu_bo_populate_update(struct vmw_du_update_plane *update,
1248 void *cmd, struct drm_rect *bb)
1249 {
1250 struct vmw_screen_target_display_unit *stdu;
1251 struct vmw_framebuffer_bo *vfbbo;
1252 SVGA3dCmdSurfaceDMASuffix *suffix = cmd;
1253
1254 stdu = container_of(update->du, typeof(*stdu), base);
1255 vfbbo = container_of(update->vfb, typeof(*vfbbo), base);
1256
1257 suffix->suffixSize = sizeof(*suffix);
1258 suffix->maximumOffset = vfbbo->buffer->base.num_pages * PAGE_SIZE;
1259
1260 vmw_stdu_populate_update(&suffix[1], stdu->base.unit, bb->x1, bb->x2,
1261 bb->y1, bb->y2);
1262
1263 return sizeof(*suffix) + sizeof(struct vmw_stdu_update);
1264 }
1265
vmw_stdu_bo_pre_clip_cpu(struct vmw_du_update_plane * update,void * cmd,uint32_t num_hits)1266 static uint32_t vmw_stdu_bo_pre_clip_cpu(struct vmw_du_update_plane *update,
1267 void *cmd, uint32_t num_hits)
1268 {
1269 struct vmw_du_update_plane_buffer *bo_update =
1270 container_of(update, typeof(*bo_update), base);
1271
1272 bo_update->fb_left = INT_MAX;
1273 bo_update->fb_top = INT_MAX;
1274
1275 return 0;
1276 }
1277
vmw_stdu_bo_clip_cpu(struct vmw_du_update_plane * update,void * cmd,struct drm_rect * clip,uint32_t fb_x,uint32_t fb_y)1278 static uint32_t vmw_stdu_bo_clip_cpu(struct vmw_du_update_plane *update,
1279 void *cmd, struct drm_rect *clip,
1280 uint32_t fb_x, uint32_t fb_y)
1281 {
1282 struct vmw_du_update_plane_buffer *bo_update =
1283 container_of(update, typeof(*bo_update), base);
1284
1285 bo_update->fb_left = min_t(int, bo_update->fb_left, fb_x);
1286 bo_update->fb_top = min_t(int, bo_update->fb_top, fb_y);
1287
1288 return 0;
1289 }
1290
1291 static uint32_t
vmw_stdu_bo_populate_update_cpu(struct vmw_du_update_plane * update,void * cmd,struct drm_rect * bb)1292 vmw_stdu_bo_populate_update_cpu(struct vmw_du_update_plane *update, void *cmd,
1293 struct drm_rect *bb)
1294 {
1295 struct vmw_du_update_plane_buffer *bo_update;
1296 struct vmw_screen_target_display_unit *stdu;
1297 struct vmw_framebuffer_bo *vfbbo;
1298 struct vmw_diff_cpy diff = VMW_CPU_BLIT_DIFF_INITIALIZER(0);
1299 struct vmw_stdu_update_gb_image *cmd_img = cmd;
1300 struct vmw_stdu_update *cmd_update;
1301 struct ttm_buffer_object *src_bo, *dst_bo;
1302 u32 src_offset, dst_offset;
1303 s32 src_pitch, dst_pitch;
1304 s32 width, height;
1305
1306 bo_update = container_of(update, typeof(*bo_update), base);
1307 stdu = container_of(update->du, typeof(*stdu), base);
1308 vfbbo = container_of(update->vfb, typeof(*vfbbo), base);
1309
1310 width = bb->x2 - bb->x1;
1311 height = bb->y2 - bb->y1;
1312
1313 diff.cpp = stdu->cpp;
1314
1315 dst_bo = &stdu->display_srf->res.backup->base;
1316 dst_pitch = stdu->display_srf->base_size.width * stdu->cpp;
1317 dst_offset = bb->y1 * dst_pitch + bb->x1 * stdu->cpp;
1318
1319 src_bo = &vfbbo->buffer->base;
1320 src_pitch = update->vfb->base.pitches[0];
1321 src_offset = bo_update->fb_top * src_pitch + bo_update->fb_left *
1322 stdu->cpp;
1323
1324 (void) vmw_bo_cpu_blit(dst_bo, dst_offset, dst_pitch, src_bo,
1325 src_offset, src_pitch, width * stdu->cpp, height,
1326 &diff);
1327
1328 if (drm_rect_visible(&diff.rect)) {
1329 SVGA3dBox *box = &cmd_img->body.box;
1330
1331 cmd_img->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
1332 cmd_img->header.size = sizeof(cmd_img->body);
1333 cmd_img->body.image.sid = stdu->display_srf->res.id;
1334 cmd_img->body.image.face = 0;
1335 cmd_img->body.image.mipmap = 0;
1336
1337 box->x = diff.rect.x1;
1338 box->y = diff.rect.y1;
1339 box->z = 0;
1340 box->w = drm_rect_width(&diff.rect);
1341 box->h = drm_rect_height(&diff.rect);
1342 box->d = 1;
1343
1344 cmd_update = (struct vmw_stdu_update *)&cmd_img[1];
1345 vmw_stdu_populate_update(cmd_update, stdu->base.unit,
1346 diff.rect.x1, diff.rect.x2,
1347 diff.rect.y1, diff.rect.y2);
1348
1349 return sizeof(*cmd_img) + sizeof(*cmd_update);
1350 }
1351
1352 return 0;
1353 }
1354
1355 /**
1356 * vmw_stdu_plane_update_bo - Update display unit for bo backed fb.
1357 * @dev_priv: device private.
1358 * @plane: plane state.
1359 * @old_state: old plane state.
1360 * @vfb: framebuffer which is blitted to display unit.
1361 * @out_fence: If non-NULL, will return a ref-counted pointer to vmw_fence_obj.
1362 * The returned fence pointer may be NULL in which case the device
1363 * has already synchronized.
1364 *
1365 * Return: 0 on success or a negative error code on failure.
1366 */
vmw_stdu_plane_update_bo(struct vmw_private * dev_priv,struct drm_plane * plane,struct drm_plane_state * old_state,struct vmw_framebuffer * vfb,struct vmw_fence_obj ** out_fence)1367 static int vmw_stdu_plane_update_bo(struct vmw_private *dev_priv,
1368 struct drm_plane *plane,
1369 struct drm_plane_state *old_state,
1370 struct vmw_framebuffer *vfb,
1371 struct vmw_fence_obj **out_fence)
1372 {
1373 struct vmw_du_update_plane_buffer bo_update;
1374
1375 memset(&bo_update, 0, sizeof(struct vmw_du_update_plane_buffer));
1376 bo_update.base.plane = plane;
1377 bo_update.base.old_state = old_state;
1378 bo_update.base.dev_priv = dev_priv;
1379 bo_update.base.du = vmw_crtc_to_du(plane->state->crtc);
1380 bo_update.base.vfb = vfb;
1381 bo_update.base.out_fence = out_fence;
1382 bo_update.base.mutex = NULL;
1383 bo_update.base.cpu_blit = !(dev_priv->capabilities & SVGA_CAP_3D);
1384 bo_update.base.intr = false;
1385
1386 /*
1387 * VM without 3D support don't have surface DMA command and framebuffer
1388 * should be moved out of VRAM.
1389 */
1390 if (bo_update.base.cpu_blit) {
1391 bo_update.base.calc_fifo_size = vmw_stdu_bo_fifo_size_cpu;
1392 bo_update.base.pre_clip = vmw_stdu_bo_pre_clip_cpu;
1393 bo_update.base.clip = vmw_stdu_bo_clip_cpu;
1394 bo_update.base.post_clip = vmw_stdu_bo_populate_update_cpu;
1395 } else {
1396 bo_update.base.calc_fifo_size = vmw_stdu_bo_fifo_size;
1397 bo_update.base.pre_clip = vmw_stdu_bo_populate_dma;
1398 bo_update.base.clip = vmw_stdu_bo_populate_clip;
1399 bo_update.base.post_clip = vmw_stdu_bo_populate_update;
1400 }
1401
1402 return vmw_du_helper_plane_update(&bo_update.base);
1403 }
1404
1405 static uint32_t
vmw_stdu_surface_fifo_size_same_display(struct vmw_du_update_plane * update,uint32_t num_hits)1406 vmw_stdu_surface_fifo_size_same_display(struct vmw_du_update_plane *update,
1407 uint32_t num_hits)
1408 {
1409 struct vmw_framebuffer_surface *vfbs;
1410 uint32_t size = 0;
1411
1412 vfbs = container_of(update->vfb, typeof(*vfbs), base);
1413
1414 if (vfbs->is_bo_proxy)
1415 size += sizeof(struct vmw_stdu_update_gb_image) * num_hits;
1416
1417 size += sizeof(struct vmw_stdu_update);
1418
1419 return size;
1420 }
1421
vmw_stdu_surface_fifo_size(struct vmw_du_update_plane * update,uint32_t num_hits)1422 static uint32_t vmw_stdu_surface_fifo_size(struct vmw_du_update_plane *update,
1423 uint32_t num_hits)
1424 {
1425 struct vmw_framebuffer_surface *vfbs;
1426 uint32_t size = 0;
1427
1428 vfbs = container_of(update->vfb, typeof(*vfbs), base);
1429
1430 if (vfbs->is_bo_proxy)
1431 size += sizeof(struct vmw_stdu_update_gb_image) * num_hits;
1432
1433 size += sizeof(struct vmw_stdu_surface_copy) + sizeof(SVGA3dCopyBox) *
1434 num_hits + sizeof(struct vmw_stdu_update);
1435
1436 return size;
1437 }
1438
1439 static uint32_t
vmw_stdu_surface_update_proxy(struct vmw_du_update_plane * update,void * cmd)1440 vmw_stdu_surface_update_proxy(struct vmw_du_update_plane *update, void *cmd)
1441 {
1442 struct vmw_framebuffer_surface *vfbs;
1443 struct drm_plane_state *state = update->plane->state;
1444 struct drm_plane_state *old_state = update->old_state;
1445 struct vmw_stdu_update_gb_image *cmd_update = cmd;
1446 struct drm_atomic_helper_damage_iter iter;
1447 struct drm_rect clip;
1448 uint32_t copy_size = 0;
1449
1450 vfbs = container_of(update->vfb, typeof(*vfbs), base);
1451
1452 /*
1453 * proxy surface is special where a buffer object type fb is wrapped
1454 * in a surface and need an update gb image command to sync with device.
1455 */
1456 drm_atomic_helper_damage_iter_init(&iter, old_state, state);
1457 drm_atomic_for_each_plane_damage(&iter, &clip) {
1458 SVGA3dBox *box = &cmd_update->body.box;
1459
1460 cmd_update->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
1461 cmd_update->header.size = sizeof(cmd_update->body);
1462 cmd_update->body.image.sid = vfbs->surface->res.id;
1463 cmd_update->body.image.face = 0;
1464 cmd_update->body.image.mipmap = 0;
1465
1466 box->x = clip.x1;
1467 box->y = clip.y1;
1468 box->z = 0;
1469 box->w = drm_rect_width(&clip);
1470 box->h = drm_rect_height(&clip);
1471 box->d = 1;
1472
1473 copy_size += sizeof(*cmd_update);
1474 cmd_update++;
1475 }
1476
1477 return copy_size;
1478 }
1479
1480 static uint32_t
vmw_stdu_surface_populate_copy(struct vmw_du_update_plane * update,void * cmd,uint32_t num_hits)1481 vmw_stdu_surface_populate_copy(struct vmw_du_update_plane *update, void *cmd,
1482 uint32_t num_hits)
1483 {
1484 struct vmw_screen_target_display_unit *stdu;
1485 struct vmw_framebuffer_surface *vfbs;
1486 struct vmw_stdu_surface_copy *cmd_copy = cmd;
1487
1488 stdu = container_of(update->du, typeof(*stdu), base);
1489 vfbs = container_of(update->vfb, typeof(*vfbs), base);
1490
1491 cmd_copy->header.id = SVGA_3D_CMD_SURFACE_COPY;
1492 cmd_copy->header.size = sizeof(cmd_copy->body) + sizeof(SVGA3dCopyBox) *
1493 num_hits;
1494 cmd_copy->body.src.sid = vfbs->surface->res.id;
1495 cmd_copy->body.dest.sid = stdu->display_srf->res.id;
1496
1497 return sizeof(*cmd_copy);
1498 }
1499
1500 static uint32_t
vmw_stdu_surface_populate_clip(struct vmw_du_update_plane * update,void * cmd,struct drm_rect * clip,uint32_t fb_x,uint32_t fb_y)1501 vmw_stdu_surface_populate_clip(struct vmw_du_update_plane *update, void *cmd,
1502 struct drm_rect *clip, uint32_t fb_x,
1503 uint32_t fb_y)
1504 {
1505 struct SVGA3dCopyBox *box = cmd;
1506
1507 box->srcx = fb_x;
1508 box->srcy = fb_y;
1509 box->srcz = 0;
1510 box->x = clip->x1;
1511 box->y = clip->y1;
1512 box->z = 0;
1513 box->w = drm_rect_width(clip);
1514 box->h = drm_rect_height(clip);
1515 box->d = 1;
1516
1517 return sizeof(*box);
1518 }
1519
1520 static uint32_t
vmw_stdu_surface_populate_update(struct vmw_du_update_plane * update,void * cmd,struct drm_rect * bb)1521 vmw_stdu_surface_populate_update(struct vmw_du_update_plane *update, void *cmd,
1522 struct drm_rect *bb)
1523 {
1524 vmw_stdu_populate_update(cmd, update->du->unit, bb->x1, bb->x2, bb->y1,
1525 bb->y2);
1526
1527 return sizeof(struct vmw_stdu_update);
1528 }
1529
1530 /**
1531 * vmw_stdu_plane_update_surface - Update display unit for surface backed fb
1532 * @dev_priv: Device private
1533 * @plane: Plane state
1534 * @old_state: Old plane state
1535 * @vfb: Framebuffer which is blitted to display unit
1536 * @out_fence: If non-NULL, will return a ref-counted pointer to vmw_fence_obj.
1537 * The returned fence pointer may be NULL in which case the device
1538 * has already synchronized.
1539 *
1540 * Return: 0 on success or a negative error code on failure.
1541 */
vmw_stdu_plane_update_surface(struct vmw_private * dev_priv,struct drm_plane * plane,struct drm_plane_state * old_state,struct vmw_framebuffer * vfb,struct vmw_fence_obj ** out_fence)1542 static int vmw_stdu_plane_update_surface(struct vmw_private *dev_priv,
1543 struct drm_plane *plane,
1544 struct drm_plane_state *old_state,
1545 struct vmw_framebuffer *vfb,
1546 struct vmw_fence_obj **out_fence)
1547 {
1548 struct vmw_du_update_plane srf_update;
1549 struct vmw_screen_target_display_unit *stdu;
1550 struct vmw_framebuffer_surface *vfbs;
1551
1552 stdu = vmw_crtc_to_stdu(plane->state->crtc);
1553 vfbs = container_of(vfb, typeof(*vfbs), base);
1554
1555 memset(&srf_update, 0, sizeof(struct vmw_du_update_plane));
1556 srf_update.plane = plane;
1557 srf_update.old_state = old_state;
1558 srf_update.dev_priv = dev_priv;
1559 srf_update.du = vmw_crtc_to_du(plane->state->crtc);
1560 srf_update.vfb = vfb;
1561 srf_update.out_fence = out_fence;
1562 srf_update.mutex = &dev_priv->cmdbuf_mutex;
1563 srf_update.cpu_blit = false;
1564 srf_update.intr = true;
1565
1566 if (vfbs->is_bo_proxy)
1567 srf_update.post_prepare = vmw_stdu_surface_update_proxy;
1568
1569 if (vfbs->surface->res.id != stdu->display_srf->res.id) {
1570 srf_update.calc_fifo_size = vmw_stdu_surface_fifo_size;
1571 srf_update.pre_clip = vmw_stdu_surface_populate_copy;
1572 srf_update.clip = vmw_stdu_surface_populate_clip;
1573 } else {
1574 srf_update.calc_fifo_size =
1575 vmw_stdu_surface_fifo_size_same_display;
1576 }
1577
1578 srf_update.post_clip = vmw_stdu_surface_populate_update;
1579
1580 return vmw_du_helper_plane_update(&srf_update);
1581 }
1582
1583 /**
1584 * vmw_stdu_primary_plane_atomic_update - formally switches STDU to new plane
1585 * @plane: display plane
1586 * @old_state: Only used to get crtc info
1587 *
1588 * Formally update stdu->display_srf to the new plane, and bind the new
1589 * plane STDU. This function is called during the commit phase when
1590 * all the preparation have been done and all the configurations have
1591 * been checked.
1592 */
1593 static void
vmw_stdu_primary_plane_atomic_update(struct drm_plane * plane,struct drm_plane_state * old_state)1594 vmw_stdu_primary_plane_atomic_update(struct drm_plane *plane,
1595 struct drm_plane_state *old_state)
1596 {
1597 struct vmw_plane_state *vps = vmw_plane_state_to_vps(plane->state);
1598 struct drm_crtc *crtc = plane->state->crtc;
1599 struct vmw_screen_target_display_unit *stdu;
1600 struct drm_pending_vblank_event *event;
1601 struct vmw_fence_obj *fence = NULL;
1602 struct vmw_private *dev_priv;
1603 int ret;
1604
1605 /* If case of device error, maintain consistent atomic state */
1606 if (crtc && plane->state->fb) {
1607 struct vmw_framebuffer *vfb =
1608 vmw_framebuffer_to_vfb(plane->state->fb);
1609 stdu = vmw_crtc_to_stdu(crtc);
1610 dev_priv = vmw_priv(crtc->dev);
1611
1612 stdu->display_srf = vps->surf;
1613 stdu->content_fb_type = vps->content_fb_type;
1614 stdu->cpp = vps->cpp;
1615
1616 ret = vmw_stdu_bind_st(dev_priv, stdu, &stdu->display_srf->res);
1617 if (ret)
1618 DRM_ERROR("Failed to bind surface to STDU.\n");
1619
1620 if (vfb->bo)
1621 ret = vmw_stdu_plane_update_bo(dev_priv, plane,
1622 old_state, vfb, &fence);
1623 else
1624 ret = vmw_stdu_plane_update_surface(dev_priv, plane,
1625 old_state, vfb,
1626 &fence);
1627 if (ret)
1628 DRM_ERROR("Failed to update STDU.\n");
1629 } else {
1630 crtc = old_state->crtc;
1631 stdu = vmw_crtc_to_stdu(crtc);
1632 dev_priv = vmw_priv(crtc->dev);
1633
1634 /* Blank STDU when fb and crtc are NULL */
1635 if (!stdu->defined)
1636 return;
1637
1638 ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
1639 if (ret)
1640 DRM_ERROR("Failed to blank STDU\n");
1641
1642 ret = vmw_stdu_update_st(dev_priv, stdu);
1643 if (ret)
1644 DRM_ERROR("Failed to update STDU.\n");
1645
1646 return;
1647 }
1648
1649 /* In case of error, vblank event is send in vmw_du_crtc_atomic_flush */
1650 event = crtc->state->event;
1651 if (event && fence) {
1652 struct drm_file *file_priv = event->base.file_priv;
1653
1654 ret = vmw_event_fence_action_queue(file_priv,
1655 fence,
1656 &event->base,
1657 &event->event.vbl.tv_sec,
1658 &event->event.vbl.tv_usec,
1659 true);
1660 if (ret)
1661 DRM_ERROR("Failed to queue event on fence.\n");
1662 else
1663 crtc->state->event = NULL;
1664 }
1665
1666 if (fence)
1667 vmw_fence_obj_unreference(&fence);
1668 }
1669
1670
1671 static const struct drm_plane_funcs vmw_stdu_plane_funcs = {
1672 .update_plane = drm_atomic_helper_update_plane,
1673 .disable_plane = drm_atomic_helper_disable_plane,
1674 .destroy = vmw_du_primary_plane_destroy,
1675 .reset = vmw_du_plane_reset,
1676 .atomic_duplicate_state = vmw_du_plane_duplicate_state,
1677 .atomic_destroy_state = vmw_du_plane_destroy_state,
1678 };
1679
1680 static const struct drm_plane_funcs vmw_stdu_cursor_funcs = {
1681 .update_plane = drm_atomic_helper_update_plane,
1682 .disable_plane = drm_atomic_helper_disable_plane,
1683 .destroy = vmw_du_cursor_plane_destroy,
1684 .reset = vmw_du_plane_reset,
1685 .atomic_duplicate_state = vmw_du_plane_duplicate_state,
1686 .atomic_destroy_state = vmw_du_plane_destroy_state,
1687 };
1688
1689
1690 /*
1691 * Atomic Helpers
1692 */
1693 static const struct
1694 drm_plane_helper_funcs vmw_stdu_cursor_plane_helper_funcs = {
1695 .atomic_check = vmw_du_cursor_plane_atomic_check,
1696 .atomic_update = vmw_du_cursor_plane_atomic_update,
1697 .prepare_fb = vmw_du_cursor_plane_prepare_fb,
1698 .cleanup_fb = vmw_du_plane_cleanup_fb,
1699 };
1700
1701 static const struct
1702 drm_plane_helper_funcs vmw_stdu_primary_plane_helper_funcs = {
1703 .atomic_check = vmw_du_primary_plane_atomic_check,
1704 .atomic_update = vmw_stdu_primary_plane_atomic_update,
1705 .prepare_fb = vmw_stdu_primary_plane_prepare_fb,
1706 .cleanup_fb = vmw_stdu_primary_plane_cleanup_fb,
1707 };
1708
1709 static const struct drm_crtc_helper_funcs vmw_stdu_crtc_helper_funcs = {
1710 .prepare = vmw_stdu_crtc_helper_prepare,
1711 .mode_set_nofb = vmw_stdu_crtc_mode_set_nofb,
1712 .atomic_check = vmw_du_crtc_atomic_check,
1713 .atomic_begin = vmw_du_crtc_atomic_begin,
1714 .atomic_flush = vmw_du_crtc_atomic_flush,
1715 .atomic_enable = vmw_stdu_crtc_atomic_enable,
1716 .atomic_disable = vmw_stdu_crtc_atomic_disable,
1717 };
1718
1719
1720 /**
1721 * vmw_stdu_init - Sets up a Screen Target Display Unit
1722 *
1723 * @dev_priv: VMW DRM device
1724 * @unit: unit number range from 0 to VMWGFX_NUM_DISPLAY_UNITS
1725 *
1726 * This function is called once per CRTC, and allocates one Screen Target
1727 * display unit to represent that CRTC. Since the SVGA device does not separate
1728 * out encoder and connector, they are represented as part of the STDU as well.
1729 */
vmw_stdu_init(struct vmw_private * dev_priv,unsigned unit)1730 static int vmw_stdu_init(struct vmw_private *dev_priv, unsigned unit)
1731 {
1732 struct vmw_screen_target_display_unit *stdu;
1733 struct drm_device *dev = dev_priv->dev;
1734 struct drm_connector *connector;
1735 struct drm_encoder *encoder;
1736 struct drm_plane *primary, *cursor;
1737 struct drm_crtc *crtc;
1738 int ret;
1739
1740
1741 stdu = kzalloc(sizeof(*stdu), GFP_KERNEL);
1742 if (!stdu)
1743 return -ENOMEM;
1744
1745 stdu->base.unit = unit;
1746 crtc = &stdu->base.crtc;
1747 encoder = &stdu->base.encoder;
1748 connector = &stdu->base.connector;
1749 primary = &stdu->base.primary;
1750 cursor = &stdu->base.cursor;
1751
1752 stdu->base.pref_active = (unit == 0);
1753 stdu->base.pref_width = dev_priv->initial_width;
1754 stdu->base.pref_height = dev_priv->initial_height;
1755 stdu->base.is_implicit = false;
1756
1757 /* Initialize primary plane */
1758 vmw_du_plane_reset(primary);
1759
1760 ret = drm_universal_plane_init(dev, primary,
1761 0, &vmw_stdu_plane_funcs,
1762 vmw_primary_plane_formats,
1763 ARRAY_SIZE(vmw_primary_plane_formats),
1764 NULL, DRM_PLANE_TYPE_PRIMARY, NULL);
1765 if (ret) {
1766 DRM_ERROR("Failed to initialize primary plane");
1767 goto err_free;
1768 }
1769
1770 drm_plane_helper_add(primary, &vmw_stdu_primary_plane_helper_funcs);
1771 drm_plane_enable_fb_damage_clips(primary);
1772
1773 /* Initialize cursor plane */
1774 vmw_du_plane_reset(cursor);
1775
1776 ret = drm_universal_plane_init(dev, cursor,
1777 0, &vmw_stdu_cursor_funcs,
1778 vmw_cursor_plane_formats,
1779 ARRAY_SIZE(vmw_cursor_plane_formats),
1780 NULL, DRM_PLANE_TYPE_CURSOR, NULL);
1781 if (ret) {
1782 DRM_ERROR("Failed to initialize cursor plane");
1783 drm_plane_cleanup(&stdu->base.primary);
1784 goto err_free;
1785 }
1786
1787 drm_plane_helper_add(cursor, &vmw_stdu_cursor_plane_helper_funcs);
1788
1789 vmw_du_connector_reset(connector);
1790
1791 ret = drm_connector_init(dev, connector, &vmw_stdu_connector_funcs,
1792 DRM_MODE_CONNECTOR_VIRTUAL);
1793 if (ret) {
1794 DRM_ERROR("Failed to initialize connector\n");
1795 goto err_free;
1796 }
1797
1798 drm_connector_helper_add(connector, &vmw_stdu_connector_helper_funcs);
1799 connector->status = vmw_du_connector_detect(connector, false);
1800
1801 ret = drm_encoder_init(dev, encoder, &vmw_stdu_encoder_funcs,
1802 DRM_MODE_ENCODER_VIRTUAL, NULL);
1803 if (ret) {
1804 DRM_ERROR("Failed to initialize encoder\n");
1805 goto err_free_connector;
1806 }
1807
1808 (void) drm_connector_attach_encoder(connector, encoder);
1809 encoder->possible_crtcs = (1 << unit);
1810 encoder->possible_clones = 0;
1811
1812 ret = drm_connector_register(connector);
1813 if (ret) {
1814 DRM_ERROR("Failed to register connector\n");
1815 goto err_free_encoder;
1816 }
1817
1818 vmw_du_crtc_reset(crtc);
1819 ret = drm_crtc_init_with_planes(dev, crtc, &stdu->base.primary,
1820 &stdu->base.cursor,
1821 &vmw_stdu_crtc_funcs, NULL);
1822 if (ret) {
1823 DRM_ERROR("Failed to initialize CRTC\n");
1824 goto err_free_unregister;
1825 }
1826
1827 drm_crtc_helper_add(crtc, &vmw_stdu_crtc_helper_funcs);
1828
1829 drm_mode_crtc_set_gamma_size(crtc, 256);
1830
1831 drm_object_attach_property(&connector->base,
1832 dev_priv->hotplug_mode_update_property, 1);
1833 drm_object_attach_property(&connector->base,
1834 dev->mode_config.suggested_x_property, 0);
1835 drm_object_attach_property(&connector->base,
1836 dev->mode_config.suggested_y_property, 0);
1837 return 0;
1838
1839 err_free_unregister:
1840 drm_connector_unregister(connector);
1841 err_free_encoder:
1842 drm_encoder_cleanup(encoder);
1843 err_free_connector:
1844 drm_connector_cleanup(connector);
1845 err_free:
1846 kfree(stdu);
1847 return ret;
1848 }
1849
1850
1851
1852 /**
1853 * vmw_stdu_destroy - Cleans up a vmw_screen_target_display_unit
1854 *
1855 * @stdu: Screen Target Display Unit to be destroyed
1856 *
1857 * Clean up after vmw_stdu_init
1858 */
vmw_stdu_destroy(struct vmw_screen_target_display_unit * stdu)1859 static void vmw_stdu_destroy(struct vmw_screen_target_display_unit *stdu)
1860 {
1861 vmw_du_cleanup(&stdu->base);
1862 kfree(stdu);
1863 }
1864
1865
1866
1867 /******************************************************************************
1868 * Screen Target Display KMS Functions
1869 *
1870 * These functions are called by the common KMS code in vmwgfx_kms.c
1871 *****************************************************************************/
1872
1873 /**
1874 * vmw_kms_stdu_init_display - Initializes a Screen Target based display
1875 *
1876 * @dev_priv: VMW DRM device
1877 *
1878 * This function initialize a Screen Target based display device. It checks
1879 * the capability bits to make sure the underlying hardware can support
1880 * screen targets, and then creates the maximum number of CRTCs, a.k.a Display
1881 * Units, as supported by the display hardware.
1882 *
1883 * RETURNS:
1884 * 0 on success, error code otherwise
1885 */
vmw_kms_stdu_init_display(struct vmw_private * dev_priv)1886 int vmw_kms_stdu_init_display(struct vmw_private *dev_priv)
1887 {
1888 struct drm_device *dev = dev_priv->dev;
1889 int i, ret;
1890
1891
1892 /* Do nothing if Screen Target support is turned off */
1893 if (!VMWGFX_ENABLE_SCREEN_TARGET_OTABLE)
1894 return -ENOSYS;
1895
1896 if (!(dev_priv->capabilities & SVGA_CAP_GBOBJECTS))
1897 return -ENOSYS;
1898
1899 ret = drm_vblank_init(dev, VMWGFX_NUM_DISPLAY_UNITS);
1900 if (unlikely(ret != 0))
1901 return ret;
1902
1903 dev_priv->active_display_unit = vmw_du_screen_target;
1904
1905 for (i = 0; i < VMWGFX_NUM_DISPLAY_UNITS; ++i) {
1906 ret = vmw_stdu_init(dev_priv, i);
1907
1908 if (unlikely(ret != 0)) {
1909 DRM_ERROR("Failed to initialize STDU %d", i);
1910 return ret;
1911 }
1912 }
1913
1914 DRM_INFO("Screen Target Display device initialized\n");
1915
1916 return 0;
1917 }
1918