1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2006 Marcel Moolenaar All rights reserved.
5 * Copyright (c) 2001 M. Warner Losh <imp@FreeBSD.org>
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 */
27
28 #include <sys/cdefs.h>
29 #include <sys/param.h>
30 #include <sys/systm.h>
31 #include <sys/bus.h>
32 #include <sys/conf.h>
33 #include <sys/kernel.h>
34 #include <sys/module.h>
35 #include <machine/bus.h>
36 #include <sys/rman.h>
37 #include <machine/resource.h>
38
39 #include <dev/pci/pcivar.h>
40
41 #include <dev/uart/uart.h>
42 #include <dev/uart/uart_bus.h>
43 #include <dev/uart/uart_cpu.h>
44
45 #define DEFAULT_RCLK 1843200
46
47 static int uart_pci_probe(device_t dev);
48 static int uart_pci_attach(device_t dev);
49 static int uart_pci_detach(device_t dev);
50
51 static device_method_t uart_pci_methods[] = {
52 /* Device interface */
53 DEVMETHOD(device_probe, uart_pci_probe),
54 DEVMETHOD(device_attach, uart_pci_attach),
55 DEVMETHOD(device_detach, uart_pci_detach),
56 DEVMETHOD(device_resume, uart_bus_resume),
57 DEVMETHOD_END
58 };
59
60 static driver_t uart_pci_driver = {
61 uart_driver_name,
62 uart_pci_methods,
63 sizeof(struct uart_softc),
64 };
65
66 struct pci_id {
67 uint16_t vendor;
68 uint16_t device;
69 uint16_t subven;
70 uint16_t subdev;
71 const char *desc;
72 int rid;
73 int rclk;
74 int regshft;
75 };
76
77 struct pci_unique_id {
78 uint16_t vendor;
79 uint16_t device;
80 };
81
82 static const struct pci_id pci_ns8250_ids[] = {
83 { 0x1028, 0x0008, 0xffff, 0, "Dell Remote Access Card III", 0x14,
84 128 * DEFAULT_RCLK },
85 { 0x1028, 0x0012, 0xffff, 0, "Dell RAC 4 Daughter Card Virtual UART", 0x14,
86 128 * DEFAULT_RCLK },
87 { 0x1033, 0x0074, 0x1033, 0x8014, "NEC RCV56ACF 56k Voice Modem", 0x10 },
88 { 0x1033, 0x007d, 0x1033, 0x8012, "NEC RS232C", 0x10 },
89 { 0x103c, 0x1048, 0x103c, 0x1227, "HP Diva Serial [GSP] UART - Powerbar SP2",
90 0x10 },
91 { 0x103c, 0x1048, 0x103c, 0x1301, "HP Diva RMP3", 0x14 },
92 { 0x103c, 0x1290, 0xffff, 0, "HP Auxiliary Diva Serial Port", 0x18 },
93 { 0x103c, 0x3301, 0xffff, 0, "HP iLO serial port", 0x10 },
94 { 0x11c1, 0x0480, 0xffff, 0, "Agere Systems Venus Modem (V90, 56KFlex)", 0x14 },
95 { 0x115d, 0x0103, 0xffff, 0, "Xircom Cardbus Ethernet + 56k Modem", 0x10 },
96 { 0x125b, 0x9100, 0xa000, 0x1000,
97 "ASIX AX99100 PCIe 1/2/3/4-port RS-232/422/485", 0x10 },
98 { 0x1282, 0x6585, 0xffff, 0, "Davicom 56PDV PCI Modem", 0x10 },
99 { 0x12b9, 0x1008, 0xffff, 0, "3Com 56K FaxModem Model 5610", 0x10 },
100 { 0x131f, 0x1000, 0xffff, 0, "Siig CyberSerial (1-port) 16550", 0x18 },
101 { 0x131f, 0x1001, 0xffff, 0, "Siig CyberSerial (1-port) 16650", 0x18 },
102 { 0x131f, 0x1002, 0xffff, 0, "Siig CyberSerial (1-port) 16850", 0x18 },
103 { 0x131f, 0x2000, 0xffff, 0, "Siig CyberSerial (1-port) 16550", 0x10 },
104 { 0x131f, 0x2001, 0xffff, 0, "Siig CyberSerial (1-port) 16650", 0x10 },
105 { 0x131f, 0x2002, 0xffff, 0, "Siig CyberSerial (1-port) 16850", 0x10 },
106 { 0x135a, 0x0a61, 0xffff, 0, "Brainboxes UC-324", 0x18 },
107 { 0x135a, 0x0aa1, 0xffff, 0, "Brainboxes UC-246", 0x18 },
108 { 0x135a, 0x0aa2, 0xffff, 0, "Brainboxes UC-246", 0x18 },
109 { 0x135a, 0x0d60, 0xffff, 0, "Intashield IS-100", 0x18 },
110 { 0x135a, 0x0da0, 0xffff, 0, "Intashield IS-300", 0x18 },
111 { 0x135a, 0x4000, 0xffff, 0, "Brainboxes PX-420", 0x10 },
112 { 0x135a, 0x4001, 0xffff, 0, "Brainboxes PX-431", 0x10 },
113 { 0x135a, 0x4002, 0xffff, 0, "Brainboxes PX-820", 0x10 },
114 { 0x135a, 0x4003, 0xffff, 0, "Brainboxes PX-831", 0x10 },
115 { 0x135a, 0x4004, 0xffff, 0, "Brainboxes PX-246", 0x10 },
116 { 0x135a, 0x4005, 0xffff, 0, "Brainboxes PX-101", 0x10 },
117 { 0x135a, 0x4006, 0xffff, 0, "Brainboxes PX-257", 0x10 },
118 { 0x135a, 0x4008, 0xffff, 0, "Brainboxes PX-846", 0x10 },
119 { 0x135a, 0x4009, 0xffff, 0, "Brainboxes PX-857", 0x10 },
120 { 0x135c, 0x0190, 0xffff, 0, "Quatech SSCLP-100", 0x18 },
121 { 0x135c, 0x01c0, 0xffff, 0, "Quatech SSCLP-200/300", 0x18 },
122 { 0x135e, 0x7101, 0xffff, 0, "Sealevel Systems Single Port RS-232/422/485/530",
123 0x18 },
124 { 0x1407, 0x0110, 0xffff, 0, "Lava Computer mfg DSerial-PCI Port A", 0x10 },
125 { 0x1407, 0x0111, 0xffff, 0, "Lava Computer mfg DSerial-PCI Port B", 0x10 },
126 { 0x1407, 0x0510, 0xffff, 0, "Lava SP Serial 550 PCI", 0x10 },
127 { 0x1409, 0x7168, 0x1409, 0x4025, "Timedia Technology Serial Port", 0x10,
128 8 * DEFAULT_RCLK },
129 { 0x1409, 0x7168, 0x1409, 0x4027, "Timedia Technology Serial Port", 0x10,
130 8 * DEFAULT_RCLK },
131 { 0x1409, 0x7168, 0x1409, 0x4028, "Timedia Technology Serial Port", 0x10,
132 8 * DEFAULT_RCLK },
133 { 0x1409, 0x7168, 0x1409, 0x5025, "Timedia Technology Serial Port", 0x10,
134 8 * DEFAULT_RCLK },
135 { 0x1409, 0x7168, 0x1409, 0x5027, "Timedia Technology Serial Port", 0x10,
136 8 * DEFAULT_RCLK },
137 { 0x1415, 0x950b, 0xffff, 0, "Oxford Semiconductor OXCB950 Cardbus 16950 UART",
138 0x10, 16384000 },
139 { 0x1415, 0xc120, 0xffff, 0, "Oxford Semiconductor OXPCIe952 PCIe 16950 UART",
140 0x10 },
141 { 0x14e4, 0x160a, 0xffff, 0, "Broadcom TruManage UART", 0x10,
142 128 * DEFAULT_RCLK, 2},
143 { 0x14e4, 0x4344, 0xffff, 0, "Sony Ericsson GC89 PC Card", 0x10},
144 { 0x151f, 0x0000, 0xffff, 0, "TOPIC Semiconductor TP560 56k modem", 0x10 },
145 { 0x1d0f, 0x8250, 0x0000, 0, "Amazon PCI serial device", 0x10 },
146 { 0x1d0f, 0x8250, 0x1d0f, 0, "Amazon PCI serial device", 0x10 },
147 { 0x1fd4, 0x1999, 0x1fd4, 0x0001, "Sunix SER5xxxx Serial Port", 0x10,
148 8 * DEFAULT_RCLK },
149 { 0x8086, 0x0f0a, 0xffff, 0, "Intel ValleyView LPIO1 HSUART#1", 0x10,
150 24 * DEFAULT_RCLK, 2 },
151 { 0x8086, 0x0f0c, 0xffff, 0, "Intel ValleyView LPIO1 HSUART#2", 0x10,
152 24 * DEFAULT_RCLK, 2 },
153 { 0x8086, 0x108f, 0xffff, 0, "Intel AMT - SOL", 0x10 },
154 { 0x8086, 0x19d8, 0xffff, 0, "Intel Denverton UART", 0x10 },
155 { 0x8086, 0x1c3d, 0xffff, 0, "Intel AMT - KT Controller", 0x10 },
156 { 0x8086, 0x1d3d, 0xffff, 0, "Intel C600/X79 Series Chipset KT Controller",
157 0x10 },
158 { 0x8086, 0x1e3d, 0xffff, 0, "Intel Panther Point KT Controller", 0x10 },
159 { 0x8086, 0x228a, 0xffff, 0, "Intel Cherryview SIO HSUART#1", 0x10,
160 24 * DEFAULT_RCLK, 2 },
161 { 0x8086, 0x228c, 0xffff, 0, "Intel Cherryview SIO HSUART#2", 0x10,
162 24 * DEFAULT_RCLK, 2 },
163 { 0x8086, 0x2a07, 0xffff, 0, "Intel AMT - PM965/GM965 KT Controller", 0x10 },
164 { 0x8086, 0x2a47, 0xffff, 0, "Mobile 4 Series Chipset KT Controller", 0x10 },
165 { 0x8086, 0x2e17, 0xffff, 0, "4 Series Chipset Serial KT Controller", 0x10 },
166 { 0x8086, 0x31bc, 0xffff, 0, "Intel Gemini Lake SIO/LPSS UART 0", 0x10,
167 24 * DEFAULT_RCLK, 2 },
168 { 0x8086, 0x31be, 0xffff, 0, "Intel Gemini Lake SIO/LPSS UART 1", 0x10,
169 24 * DEFAULT_RCLK, 2 },
170 { 0x8086, 0x31c0, 0xffff, 0, "Intel Gemini Lake SIO/LPSS UART 2", 0x10,
171 24 * DEFAULT_RCLK, 2 },
172 { 0x8086, 0x31ee, 0xffff, 0, "Intel Gemini Lake SIO/LPSS UART 3", 0x10,
173 24 * DEFAULT_RCLK, 2 },
174 { 0x8086, 0x3b67, 0xffff, 0, "5 Series/3400 Series Chipset KT Controller",
175 0x10 },
176 { 0x8086, 0x5abc, 0xffff, 0, "Intel Apollo Lake SIO/LPSS UART 0", 0x10,
177 24 * DEFAULT_RCLK, 2 },
178 { 0x8086, 0x5abe, 0xffff, 0, "Intel Apollo Lake SIO/LPSS UART 1", 0x10,
179 24 * DEFAULT_RCLK, 2 },
180 { 0x8086, 0x5ac0, 0xffff, 0, "Intel Apollo Lake SIO/LPSS UART 2", 0x10,
181 24 * DEFAULT_RCLK, 2 },
182 { 0x8086, 0x5aee, 0xffff, 0, "Intel Apollo Lake SIO/LPSS UART 3", 0x10,
183 24 * DEFAULT_RCLK, 2 },
184 { 0x8086, 0x8811, 0xffff, 0, "Intel EG20T Serial Port 0", 0x10 },
185 { 0x8086, 0x8812, 0xffff, 0, "Intel EG20T Serial Port 1", 0x10 },
186 { 0x8086, 0x8813, 0xffff, 0, "Intel EG20T Serial Port 2", 0x10 },
187 { 0x8086, 0x8814, 0xffff, 0, "Intel EG20T Serial Port 3", 0x10 },
188 { 0x8086, 0x8c3d, 0xffff, 0, "Intel Lynx Point KT Controller", 0x10 },
189 { 0x8086, 0x8cbd, 0xffff, 0, "Intel Wildcat Point KT Controller", 0x10 },
190 { 0x8086, 0x8d3d, 0xffff, 0,
191 "Intel Corporation C610/X99 series chipset KT Controller", 0x10 },
192 { 0x8086, 0x9c3d, 0xffff, 0, "Intel Lynx Point-LP HECI KT", 0x10 },
193 { 0x8086, 0xa13d, 0xffff, 0,
194 "100 Series/C230 Series Chipset Family KT Redirection", 0x10 },
195 { 0x9710, 0x9820, 0x1000, 1, "NetMos NM9820 Serial Port", 0x10 },
196 { 0x9710, 0x9835, 0x1000, 1, "NetMos NM9835 Serial Port", 0x10 },
197 { 0x9710, 0x9865, 0xa000, 0x1000, "NetMos NM9865 Serial Port", 0x10 },
198 { 0x9710, 0x9900, 0xa000, 0x1000,
199 "MosChip MCS9900 PCIe to Peripheral Controller", 0x10 },
200 { 0x9710, 0x9901, 0xa000, 0x1000,
201 "MosChip MCS9901 PCIe to Peripheral Controller", 0x10 },
202 { 0x9710, 0x9904, 0xa000, 0x1000,
203 "MosChip MCS9904 PCIe to Peripheral Controller", 0x10 },
204 { 0x9710, 0x9922, 0xa000, 0x1000,
205 "MosChip MCS9922 PCIe to Peripheral Controller", 0x10 },
206 { 0xdeaf, 0x9051, 0xffff, 0, "Middle Digital PC Weasel Serial Port", 0x10 },
207 { 0xffff, 0, 0xffff, 0, NULL, 0, 0}
208 };
209
210 const static struct pci_id *
uart_pci_match(device_t dev,const struct pci_id * id)211 uart_pci_match(device_t dev, const struct pci_id *id)
212 {
213 uint16_t device, subdev, subven, vendor;
214
215 vendor = pci_get_vendor(dev);
216 device = pci_get_device(dev);
217 while (id->vendor != 0xffff &&
218 (id->vendor != vendor || id->device != device))
219 id++;
220 if (id->vendor == 0xffff)
221 return (NULL);
222 if (id->subven == 0xffff)
223 return (id);
224 subven = pci_get_subvendor(dev);
225 subdev = pci_get_subdevice(dev);
226 while (id->vendor == vendor && id->device == device &&
227 (id->subven != subven || id->subdev != subdev))
228 id++;
229 return ((id->vendor == vendor && id->device == device) ? id : NULL);
230 }
231
232 extern SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs;
233
234 /* PCI vendor/device pairs of devices guaranteed to be unique on a system. */
235 static const struct pci_unique_id pci_unique_devices[] = {
236 { 0x1d0f, 0x8250 } /* Amazon PCI serial device */
237 };
238
239 /* Match a UART to a console if it's a PCI device known to be unique. */
240 static void
uart_pci_unique_console_match(device_t dev)241 uart_pci_unique_console_match(device_t dev)
242 {
243 struct uart_softc *sc;
244 struct uart_devinfo * sysdev;
245 const struct pci_unique_id * id;
246 uint16_t vendor, device;
247
248 sc = device_get_softc(dev);
249 vendor = pci_get_vendor(dev);
250 device = pci_get_device(dev);
251
252 /* Is this a device known to exist only once in a system? */
253 for (id = pci_unique_devices; ; id++) {
254 if (id == &pci_unique_devices[nitems(pci_unique_devices)])
255 return;
256 if (id->vendor == vendor && id->device == device)
257 break;
258 }
259
260 /* If it matches a console, it must be the same device. */
261 SLIST_FOREACH(sysdev, &uart_sysdevs, next) {
262 if (sysdev->pci_info.vendor == vendor &&
263 sysdev->pci_info.device == device) {
264 sc->sc_sysdev = sysdev;
265 sysdev->bas.rclk = sc->sc_bas.rclk;
266 }
267 }
268 }
269
270 static int
uart_pci_probe(device_t dev)271 uart_pci_probe(device_t dev)
272 {
273 struct uart_softc *sc;
274 const struct pci_id *id;
275 int result;
276
277 sc = device_get_softc(dev);
278
279 id = uart_pci_match(dev, pci_ns8250_ids);
280 if (id != NULL) {
281 sc->sc_class = &uart_ns8250_class;
282 goto match;
283 }
284 /* Add checks for non-ns8250 IDs here. */
285 return (ENXIO);
286
287 match:
288 result = uart_bus_probe(dev, id->regshft, 0, id->rclk, id->rid, 0, 0);
289 /* Bail out on error. */
290 if (result > 0)
291 return (result);
292 /*
293 * If we haven't already matched this to a console, check if it's a
294 * PCI device which is known to only exist once in any given system
295 * and we can match it that way.
296 */
297 if (sc->sc_sysdev == NULL)
298 uart_pci_unique_console_match(dev);
299 /* Set/override the device description. */
300 if (id->desc)
301 device_set_desc(dev, id->desc);
302 return (result);
303 }
304
305 static int
uart_pci_attach(device_t dev)306 uart_pci_attach(device_t dev)
307 {
308 struct uart_softc *sc;
309 int count;
310
311 sc = device_get_softc(dev);
312
313 /*
314 * Use MSI in preference to legacy IRQ if available. However, experience
315 * suggests this is only reliable when one MSI vector is advertised.
316 */
317 if (pci_msi_count(dev) == 1) {
318 count = 1;
319 if (pci_alloc_msi(dev, &count) == 0) {
320 sc->sc_irid = 1;
321 device_printf(dev, "Using %d MSI message\n", count);
322 }
323 }
324
325 return (uart_bus_attach(dev));
326 }
327
328 static int
uart_pci_detach(device_t dev)329 uart_pci_detach(device_t dev)
330 {
331 struct uart_softc *sc;
332
333 sc = device_get_softc(dev);
334
335 if (sc->sc_irid != 0)
336 pci_release_msi(dev);
337
338 return (uart_bus_detach(dev));
339 }
340
341 DRIVER_MODULE(uart, pci, uart_pci_driver, uart_devclass, NULL, NULL);
342