1 /* tc-mcore.c -- Assemble code for M*Core
2 Copyright 1999, 2000, 2001, 2002, 2003, 2005
3 Free Software Foundation, Inc.
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
20 02110-1301, USA. */
21
22 #include <stdio.h>
23 #include "as.h"
24 #include "bfd.h"
25 #include "subsegs.h"
26 #define DEFINE_TABLE
27 #include "../opcodes/mcore-opc.h"
28 #include "safe-ctype.h"
29 #include <string.h>
30
31 #ifdef OBJ_ELF
32 #include "elf/mcore.h"
33 #endif
34
35 #ifndef streq
36 #define streq(a,b) (strcmp (a, b) == 0)
37 #endif
38
39 /* Forward declarations for dumb compilers. */
40
41 /* Several places in this file insert raw instructions into the
42 object. They should use MCORE_INST_XXX macros to get the opcodes
43 and then use these two macros to crack the MCORE_INST value into
44 the appropriate byte values. */
45 #define INST_BYTE0(x) (target_big_endian ? (((x) >> 8) & 0xFF) : ((x) & 0xFF))
46 #define INST_BYTE1(x) (target_big_endian ? ((x) & 0xFF) : (((x) >> 8) & 0xFF))
47
48 const char comment_chars[] = "#/";
49 const char line_separator_chars[] = ";";
50 const char line_comment_chars[] = "#/";
51
52 const int md_reloc_size = 8;
53
54 static int do_jsri2bsr = 0; /* Change here from 1 by Cruess 19 August 97. */
55 static int sifilter_mode = 0;
56
57 const char EXP_CHARS[] = "eE";
58
59 /* Chars that mean this number is a floating point constant
60 As in 0f12.456
61 or 0d1.2345e12 */
62 const char FLT_CHARS[] = "rRsSfFdDxXpP";
63
64 #define C(what,length) (((what) << 2) + (length))
65 #define GET_WHAT(x) ((x >> 2))
66
67 /* These are the two types of relaxable instruction. */
68 #define COND_JUMP 1
69 #define UNCD_JUMP 2
70
71 #define UNDEF_DISP 0
72 #define DISP12 1
73 #define DISP32 2
74 #define UNDEF_WORD_DISP 3
75
76 #define C12_LEN 2
77 #define C32_LEN 10 /* Allow for align. */
78 #define U12_LEN 2
79 #define U32_LEN 8 /* Allow for align. */
80
81 typedef enum
82 {
83 M210,
84 M340
85 }
86 cpu_type;
87
88 cpu_type cpu = M340;
89
90 /* Initialize the relax table. */
91 const relax_typeS md_relax_table[] =
92 {
93 { 0, 0, 0, 0 },
94 { 0, 0, 0, 0 },
95 { 0, 0, 0, 0 },
96 { 0, 0, 0, 0 },
97
98 /* COND_JUMP */
99 { 0, 0, 0, 0 }, /* UNDEF_DISP */
100 { 2048, -2046, C12_LEN, C(COND_JUMP, DISP32) }, /* DISP12 */
101 { 0, 0, C32_LEN, 0 }, /* DISP32 */
102 { 0, 0, C32_LEN, 0 }, /* UNDEF_WORD_DISP */
103
104 /* UNCD_JUMP */
105 { 0, 0, 0, 0 }, /* UNDEF_DISP */
106 { 2048, -2046, U12_LEN, C(UNCD_JUMP, DISP32) }, /* DISP12 */
107 { 0, 0, U32_LEN, 0 }, /* DISP32 */
108 { 0, 0, U32_LEN, 0 } /* UNDEF_WORD_DISP */
109
110 };
111
112 /* Literal pool data structures. */
113 struct literal
114 {
115 unsigned short refcnt;
116 unsigned char ispcrel;
117 unsigned char unused;
118 expressionS e;
119 };
120
121 #define MAX_POOL_SIZE (1024/4)
122 static struct literal litpool [MAX_POOL_SIZE];
123 static unsigned poolsize;
124 static unsigned poolnumber;
125 static unsigned long poolspan;
126
127 /* SPANPANIC: the point at which we get too scared and force a dump
128 of the literal pool, and perhaps put a branch in place.
129 Calculated as:
130 1024 span of lrw/jmpi/jsri insn (actually span+1)
131 -2 possible alignment at the insn.
132 -2 possible alignment to get the table aligned.
133 -2 an inserted branch around the table.
134 == 1018
135 at 1018, we might be in trouble.
136 -- so we have to be smaller than 1018 and since we deal with 2-byte
137 instructions, the next good choice is 1016.
138 -- Note we have a test case that fails when we've got 1018 here. */
139 #define SPANPANIC (1016) /* 1024 - 1 entry - 2 byte rounding. */
140 #define SPANCLOSE (900)
141 #define SPANEXIT (600)
142 static symbolS * poolsym; /* Label for current pool. */
143 static char poolname[8];
144 static struct hash_control * opcode_hash_control; /* Opcode mnemonics. */
145
146 #define POOL_END_LABEL ".LE"
147 #define POOL_START_LABEL ".LS"
148
149 static void
make_name(char * s,char * p,int n)150 make_name (char * s, char * p, int n)
151 {
152 static const char hex[] = "0123456789ABCDEF";
153
154 s[0] = p[0];
155 s[1] = p[1];
156 s[2] = p[2];
157 s[3] = hex[(n >> 12) & 0xF];
158 s[4] = hex[(n >> 8) & 0xF];
159 s[5] = hex[(n >> 4) & 0xF];
160 s[6] = hex[(n) & 0xF];
161 s[7] = 0;
162 }
163
164 static void
dump_literals(int isforce)165 dump_literals (int isforce)
166 {
167 unsigned int i;
168 struct literal * p;
169 symbolS * brarsym = NULL;
170
171 if (poolsize == 0)
172 return;
173
174 /* Must we branch around the literal table? */
175 if (isforce)
176 {
177 char * output;
178 char brarname[8];
179
180 make_name (brarname, POOL_END_LABEL, poolnumber);
181
182 brarsym = symbol_make (brarname);
183
184 symbol_table_insert (brarsym);
185
186 output = frag_var (rs_machine_dependent,
187 md_relax_table[C (UNCD_JUMP, DISP32)].rlx_length,
188 md_relax_table[C (UNCD_JUMP, DISP12)].rlx_length,
189 C (UNCD_JUMP, 0), brarsym, 0, 0);
190 output[0] = INST_BYTE0 (MCORE_INST_BR); /* br .+xxx */
191 output[1] = INST_BYTE1 (MCORE_INST_BR);
192 }
193
194 /* Make sure that the section is sufficiently aligned and that
195 the literal table is aligned within it. */
196 record_alignment (now_seg, 2);
197 frag_align (2, 0, 0);
198
199 colon (S_GET_NAME (poolsym));
200
201 for (i = 0, p = litpool; i < poolsize; i++, p++)
202 emit_expr (& p->e, 4);
203
204 if (brarsym != NULL)
205 colon (S_GET_NAME (brarsym));
206
207 poolsize = 0;
208 }
209
210 static void
mcore_s_literals(int ignore ATTRIBUTE_UNUSED)211 mcore_s_literals (int ignore ATTRIBUTE_UNUSED)
212 {
213 dump_literals (0);
214 demand_empty_rest_of_line ();
215 }
216
217 /* Perform FUNC (ARG), and track number of bytes added to frag. */
218
219 static void
mcore_pool_count(void (* func)(int),int arg)220 mcore_pool_count (void (*func) (int), int arg)
221 {
222 const fragS *curr_frag = frag_now;
223 offsetT added = -frag_now_fix_octets ();
224
225 (*func) (arg);
226
227 while (curr_frag != frag_now)
228 {
229 added += curr_frag->fr_fix;
230 curr_frag = curr_frag->fr_next;
231 }
232
233 added += frag_now_fix_octets ();
234 poolspan += added;
235 }
236
237 static void
check_literals(int kind,int offset)238 check_literals (int kind, int offset)
239 {
240 poolspan += offset;
241
242 /* SPANCLOSE and SPANEXIT are smaller numbers than SPANPANIC.
243 SPANPANIC means that we must dump now.
244 kind == 0 is any old instruction.
245 kind > 0 means we just had a control transfer instruction.
246 kind == 1 means within a function
247 kind == 2 means we just left a function
248
249 The dump_literals (1) call inserts a branch around the table, so
250 we first look to see if its a situation where we won't have to
251 insert a branch (e.g., the previous instruction was an unconditional
252 branch).
253
254 SPANPANIC is the point where we must dump a single-entry pool.
255 it accounts for alignments and an inserted branch.
256 the 'poolsize*2' accounts for the scenario where we do:
257 lrw r1,lit1; lrw r2,lit2; lrw r3,lit3
258 Note that the 'lit2' reference is 2 bytes further along
259 but the literal it references will be 4 bytes further along,
260 so we must consider the poolsize into this equation.
261 This is slightly over-cautious, but guarantees that we won't
262 panic because a relocation is too distant. */
263
264 if (poolspan > SPANCLOSE && kind > 0)
265 dump_literals (0);
266 else if (poolspan > SPANEXIT && kind > 1)
267 dump_literals (0);
268 else if (poolspan >= (SPANPANIC - poolsize * 2))
269 dump_literals (1);
270 }
271
272 static void
mcore_cons(int nbytes)273 mcore_cons (int nbytes)
274 {
275 if (now_seg == text_section)
276 mcore_pool_count (cons, nbytes);
277 else
278 cons (nbytes);
279
280 /* In theory we ought to call check_literals (2,0) here in case
281 we need to dump the literal table. We cannot do this however,
282 as the directives that we are intercepting may be being used
283 to build a switch table, and we must not interfere with its
284 contents. Instead we cross our fingers and pray... */
285 }
286
287 static void
mcore_float_cons(int float_type)288 mcore_float_cons (int float_type)
289 {
290 if (now_seg == text_section)
291 mcore_pool_count (float_cons, float_type);
292 else
293 float_cons (float_type);
294
295 /* See the comment in mcore_cons () about calling check_literals.
296 It is unlikely that a switch table will be constructed using
297 floating point values, but it is still likely that an indexed
298 table of floating point constants is being created by these
299 directives, so again we must not interfere with their placement. */
300 }
301
302 static void
mcore_stringer(int append_zero)303 mcore_stringer (int append_zero)
304 {
305 if (now_seg == text_section)
306 mcore_pool_count (stringer, append_zero);
307 else
308 stringer (append_zero);
309
310 /* We call check_literals here in case a large number of strings are
311 being placed into the text section with a sequence of stringer
312 directives. In theory we could be upsetting something if these
313 strings are actually in an indexed table instead of referenced by
314 individual labels. Let us hope that that never happens. */
315 check_literals (2, 0);
316 }
317
318 static void
mcore_fill(int unused)319 mcore_fill (int unused)
320 {
321 if (now_seg == text_section)
322 mcore_pool_count (s_fill, unused);
323 else
324 s_fill (unused);
325
326 check_literals (2, 0);
327 }
328
329 /* Handle the section changing pseudo-ops. These call through to the
330 normal implementations, but they dump the literal pool first. */
331
332 static void
mcore_s_text(int ignore)333 mcore_s_text (int ignore)
334 {
335 dump_literals (0);
336
337 #ifdef OBJ_ELF
338 obj_elf_text (ignore);
339 #else
340 s_text (ignore);
341 #endif
342 }
343
344 static void
mcore_s_data(int ignore)345 mcore_s_data (int ignore)
346 {
347 dump_literals (0);
348
349 #ifdef OBJ_ELF
350 obj_elf_data (ignore);
351 #else
352 s_data (ignore);
353 #endif
354 }
355
356 static void
mcore_s_section(int ignore)357 mcore_s_section (int ignore)
358 {
359 /* Scan forwards to find the name of the section. If the section
360 being switched to is ".line" then this is a DWARF1 debug section
361 which is arbitrarily placed inside generated code. In this case
362 do not dump the literal pool because it is a) inefficient and
363 b) would require the generation of extra code to jump around the
364 pool. */
365 char * ilp = input_line_pointer;
366
367 while (*ilp != 0 && ISSPACE (*ilp))
368 ++ ilp;
369
370 if (strncmp (ilp, ".line", 5) == 0
371 && (ISSPACE (ilp[5]) || *ilp == '\n' || *ilp == '\r'))
372 ;
373 else
374 dump_literals (0);
375
376 #ifdef OBJ_ELF
377 obj_elf_section (ignore);
378 #endif
379 #ifdef OBJ_COFF
380 obj_coff_section (ignore);
381 #endif
382 }
383
384 static void
mcore_s_bss(int needs_align)385 mcore_s_bss (int needs_align)
386 {
387 dump_literals (0);
388
389 s_lcomm_bytes (needs_align);
390 }
391
392 #ifdef OBJ_ELF
393 static void
mcore_s_comm(int needs_align)394 mcore_s_comm (int needs_align)
395 {
396 dump_literals (0);
397
398 obj_elf_common (needs_align);
399 }
400 #endif
401
402 /* This table describes all the machine specific pseudo-ops the assembler
403 has to support. The fields are:
404 Pseudo-op name without dot
405 Function to call to execute this pseudo-op
406 Integer arg to pass to the function. */
407 const pseudo_typeS md_pseudo_table[] =
408 {
409 { "export", s_globl, 0 },
410 { "import", s_ignore, 0 },
411 { "literals", mcore_s_literals, 0 },
412 { "page", listing_eject, 0 },
413
414 /* The following are to intercept the placement of data into the text
415 section (eg addresses for a switch table), so that the space they
416 occupy can be taken into account when deciding whether or not to
417 dump the current literal pool.
418 XXX - currently we do not cope with the .space and .dcb.d directives. */
419 { "ascii", mcore_stringer, 0 },
420 { "asciz", mcore_stringer, 1 },
421 { "byte", mcore_cons, 1 },
422 { "dc", mcore_cons, 2 },
423 { "dc.b", mcore_cons, 1 },
424 { "dc.d", mcore_float_cons, 'd'},
425 { "dc.l", mcore_cons, 4 },
426 { "dc.s", mcore_float_cons, 'f'},
427 { "dc.w", mcore_cons, 2 },
428 { "dc.x", mcore_float_cons, 'x'},
429 { "double", mcore_float_cons, 'd'},
430 { "float", mcore_float_cons, 'f'},
431 { "hword", mcore_cons, 2 },
432 { "int", mcore_cons, 4 },
433 { "long", mcore_cons, 4 },
434 { "octa", mcore_cons, 16 },
435 { "quad", mcore_cons, 8 },
436 { "short", mcore_cons, 2 },
437 { "single", mcore_float_cons, 'f'},
438 { "string", mcore_stringer, 1 },
439 { "word", mcore_cons, 2 },
440 { "fill", mcore_fill, 0 },
441
442 /* Allow for the effect of section changes. */
443 { "text", mcore_s_text, 0 },
444 { "data", mcore_s_data, 0 },
445 { "bss", mcore_s_bss, 1 },
446 #ifdef OBJ_ELF
447 { "comm", mcore_s_comm, 0 },
448 #endif
449 { "section", mcore_s_section, 0 },
450 { "section.s", mcore_s_section, 0 },
451 { "sect", mcore_s_section, 0 },
452 { "sect.s", mcore_s_section, 0 },
453
454 { 0, 0, 0 }
455 };
456
457 /* This function is called once, at assembler startup time. This should
458 set up all the tables, etc that the MD part of the assembler needs. */
459
460 void
md_begin(void)461 md_begin (void)
462 {
463 const mcore_opcode_info * opcode;
464 char * prev_name = "";
465
466 opcode_hash_control = hash_new ();
467
468 /* Insert unique names into hash table. */
469 for (opcode = mcore_table; opcode->name; opcode ++)
470 {
471 if (! streq (prev_name, opcode->name))
472 {
473 prev_name = opcode->name;
474 hash_insert (opcode_hash_control, opcode->name, (char *) opcode);
475 }
476 }
477 }
478
479 /* Get a log2(val). */
480
481 static int
mylog2(unsigned int val)482 mylog2 (unsigned int val)
483 {
484 int log = -1;
485
486 while (val != 0)
487 {
488 log ++;
489 val >>= 1;
490 }
491
492 return log;
493 }
494
495 /* Try to parse a reg name. */
496
497 static char *
parse_reg(char * s,unsigned * reg)498 parse_reg (char * s, unsigned * reg)
499 {
500 /* Strip leading whitespace. */
501 while (ISSPACE (* s))
502 ++ s;
503
504 if (TOLOWER (s[0]) == 'r')
505 {
506 if (s[1] == '1' && s[2] >= '0' && s[2] <= '5')
507 {
508 *reg = 10 + s[2] - '0';
509 return s + 3;
510 }
511
512 if (s[1] >= '0' && s[1] <= '9')
513 {
514 *reg = s[1] - '0';
515 return s + 2;
516 }
517 }
518 else if ( TOLOWER (s[0]) == 's'
519 && TOLOWER (s[1]) == 'p'
520 && ! ISALNUM (s[2]))
521 {
522 * reg = 0;
523 return s + 2;
524 }
525
526 as_bad (_("register expected, but saw '%.6s'"), s);
527 return s;
528 }
529
530 static struct Cregs
531 {
532 char * name;
533 unsigned int crnum;
534 }
535 cregs[] =
536 {
537 { "psr", 0},
538 { "vbr", 1},
539 { "epsr", 2},
540 { "fpsr", 3},
541 { "epc", 4},
542 { "fpc", 5},
543 { "ss0", 6},
544 { "ss1", 7},
545 { "ss2", 8},
546 { "ss3", 9},
547 { "ss4", 10},
548 { "gcr", 11},
549 { "gsr", 12},
550 { "", 0}
551 };
552
553 static char *
parse_creg(char * s,unsigned * reg)554 parse_creg (char * s, unsigned * reg)
555 {
556 int i;
557
558 /* Strip leading whitespace. */
559 while (ISSPACE (* s))
560 ++s;
561
562 if ((TOLOWER (s[0]) == 'c' && TOLOWER (s[1]) == 'r'))
563 {
564 if (s[2] == '3' && s[3] >= '0' && s[3] <= '1')
565 {
566 *reg = 30 + s[3] - '0';
567 return s + 4;
568 }
569
570 if (s[2] == '2' && s[3] >= '0' && s[3] <= '9')
571 {
572 *reg = 20 + s[3] - '0';
573 return s + 4;
574 }
575
576 if (s[2] == '1' && s[3] >= '0' && s[3] <= '9')
577 {
578 *reg = 10 + s[3] - '0';
579 return s + 4;
580 }
581
582 if (s[2] >= '0' && s[2] <= '9')
583 {
584 *reg = s[2] - '0';
585 return s + 3;
586 }
587 }
588
589 /* Look at alternate creg names before giving error. */
590 for (i = 0; cregs[i].name[0] != '\0'; i++)
591 {
592 char buf [10];
593 int length;
594 int j;
595
596 length = strlen (cregs[i].name);
597
598 for (j = 0; j < length; j++)
599 buf[j] = TOLOWER (s[j]);
600
601 if (strncmp (cregs[i].name, buf, length) == 0)
602 {
603 *reg = cregs[i].crnum;
604 return s + length;
605 }
606 }
607
608 as_bad (_("control register expected, but saw '%.6s'"), s);
609
610 return s;
611 }
612
613 static char *
parse_psrmod(char * s,unsigned * reg)614 parse_psrmod (char * s, unsigned * reg)
615 {
616 int i;
617 char buf[10];
618 static struct psrmods
619 {
620 char * name;
621 unsigned int value;
622 }
623 psrmods[] =
624 {
625 { "ie", 1 },
626 { "fe", 2 },
627 { "ee", 4 },
628 { "af", 8 } /* Really 0 and non-combinable. */
629 };
630
631 for (i = 0; i < 2; i++)
632 buf[i] = TOLOWER (s[i]);
633
634 for (i = sizeof (psrmods) / sizeof (psrmods[0]); i--;)
635 {
636 if (! strncmp (psrmods[i].name, buf, 2))
637 {
638 * reg = psrmods[i].value;
639
640 return s + 2;
641 }
642 }
643
644 as_bad (_("bad/missing psr specifier"));
645
646 * reg = 0;
647
648 return s;
649 }
650
651 static char *
parse_exp(char * s,expressionS * e)652 parse_exp (char * s, expressionS * e)
653 {
654 char * save;
655 char * new;
656
657 /* Skip whitespace. */
658 while (ISSPACE (* s))
659 ++ s;
660
661 save = input_line_pointer;
662 input_line_pointer = s;
663
664 expression (e);
665
666 if (e->X_op == O_absent)
667 as_bad (_("missing operand"));
668
669 new = input_line_pointer;
670 input_line_pointer = save;
671
672 return new;
673 }
674
675 static int
enter_literal(expressionS * e,int ispcrel)676 enter_literal (expressionS * e, int ispcrel)
677 {
678 unsigned int i;
679 struct literal * p;
680
681 if (poolsize >= MAX_POOL_SIZE - 2)
682 /* The literal pool is as full as we can handle. We have
683 to be 2 entries shy of the 1024/4=256 entries because we
684 have to allow for the branch (2 bytes) and the alignment
685 (2 bytes before the first insn referencing the pool and
686 2 bytes before the pool itself) == 6 bytes, rounds up
687 to 2 entries. */
688 dump_literals (1);
689
690 if (poolsize == 0)
691 {
692 /* Create new literal pool. */
693 if (++ poolnumber > 0xFFFF)
694 as_fatal (_("more than 65K literal pools"));
695
696 make_name (poolname, POOL_START_LABEL, poolnumber);
697 poolsym = symbol_make (poolname);
698 symbol_table_insert (poolsym);
699 poolspan = 0;
700 }
701
702 /* Search pool for value so we don't have duplicates. */
703 for (p = litpool, i = 0; i < poolsize; i++, p++)
704 {
705 if (e->X_op == p->e.X_op
706 && e->X_add_symbol == p->e.X_add_symbol
707 && e->X_add_number == p->e.X_add_number
708 && ispcrel == p->ispcrel)
709 {
710 p->refcnt ++;
711 return i;
712 }
713 }
714
715 p->refcnt = 1;
716 p->ispcrel = ispcrel;
717 p->e = * e;
718
719 poolsize ++;
720
721 return i;
722 }
723
724 /* Parse a literal specification. -- either new or old syntax.
725 old syntax: the user supplies the label and places the literal.
726 new syntax: we put it into the literal pool. */
727
728 static char *
parse_rt(char * s,char ** outputp,int ispcrel,expressionS * ep)729 parse_rt (char * s,
730 char ** outputp,
731 int ispcrel,
732 expressionS * ep)
733 {
734 expressionS e;
735 int n;
736
737 if (ep)
738 /* Indicate nothing there. */
739 ep->X_op = O_absent;
740
741 if (*s == '[')
742 {
743 s = parse_exp (s + 1, & e);
744
745 if (*s == ']')
746 s++;
747 else
748 as_bad (_("missing ']'"));
749 }
750 else
751 {
752 s = parse_exp (s, & e);
753
754 n = enter_literal (& e, ispcrel);
755
756 if (ep)
757 *ep = e;
758
759 /* Create a reference to pool entry. */
760 e.X_op = O_symbol;
761 e.X_add_symbol = poolsym;
762 e.X_add_number = n << 2;
763 }
764
765 * outputp = frag_more (2);
766
767 fix_new_exp (frag_now, (*outputp) - frag_now->fr_literal, 2, & e, 1,
768 BFD_RELOC_MCORE_PCREL_IMM8BY4);
769
770 return s;
771 }
772
773 static char *
parse_imm(char * s,unsigned * val,unsigned min,unsigned max)774 parse_imm (char * s,
775 unsigned * val,
776 unsigned min,
777 unsigned max)
778 {
779 char * new;
780 expressionS e;
781
782 new = parse_exp (s, & e);
783
784 if (e.X_op == O_absent)
785 ; /* An error message has already been emitted. */
786 else if (e.X_op != O_constant)
787 as_bad (_("operand must be a constant"));
788 else if ((addressT) e.X_add_number < min || (addressT) e.X_add_number > max)
789 as_bad (_("operand must be absolute in range %u..%u, not %ld"),
790 min, max, (long) e.X_add_number);
791
792 * val = e.X_add_number;
793
794 return new;
795 }
796
797 static char *
parse_mem(char * s,unsigned * reg,unsigned * off,unsigned siz)798 parse_mem (char * s,
799 unsigned * reg,
800 unsigned * off,
801 unsigned siz)
802 {
803 * off = 0;
804
805 while (ISSPACE (* s))
806 ++ s;
807
808 if (* s == '(')
809 {
810 s = parse_reg (s + 1, reg);
811
812 while (ISSPACE (* s))
813 ++ s;
814
815 if (* s == ',')
816 {
817 s = parse_imm (s + 1, off, 0, 63);
818
819 if (siz > 1)
820 {
821 if (siz > 2)
822 {
823 if (* off & 0x3)
824 as_bad (_("operand must be a multiple of 4"));
825
826 * off >>= 2;
827 }
828 else
829 {
830 if (* off & 0x1)
831 as_bad (_("operand must be a multiple of 2"));
832
833 * off >>= 1;
834 }
835 }
836 }
837
838 while (ISSPACE (* s))
839 ++ s;
840
841 if (* s == ')')
842 s ++;
843 }
844 else
845 as_bad (_("base register expected"));
846
847 return s;
848 }
849
850 /* This is the guts of the machine-dependent assembler. STR points to a
851 machine dependent instruction. This function is supposed to emit
852 the frags/bytes it assembles to. */
853
854 void
md_assemble(char * str)855 md_assemble (char * str)
856 {
857 char * op_start;
858 char * op_end;
859 mcore_opcode_info * opcode;
860 char * output;
861 int nlen = 0;
862 unsigned short inst;
863 unsigned reg;
864 unsigned off;
865 unsigned isize;
866 expressionS e;
867 char name[20];
868
869 /* Drop leading whitespace. */
870 while (ISSPACE (* str))
871 str ++;
872
873 /* Find the op code end. */
874 for (op_start = op_end = str;
875 nlen < 20 && !is_end_of_line [(unsigned char) *op_end] && *op_end != ' ';
876 op_end++)
877 {
878 name[nlen] = op_start[nlen];
879 nlen++;
880 }
881
882 name [nlen] = 0;
883
884 if (nlen == 0)
885 {
886 as_bad (_("can't find opcode "));
887 return;
888 }
889
890 opcode = (mcore_opcode_info *) hash_find (opcode_hash_control, name);
891 if (opcode == NULL)
892 {
893 as_bad (_("unknown opcode \"%s\""), name);
894 return;
895 }
896
897 inst = opcode->inst;
898 isize = 2;
899
900 switch (opcode->opclass)
901 {
902 case O0:
903 output = frag_more (2);
904 break;
905
906 case OT:
907 op_end = parse_imm (op_end + 1, & reg, 0, 3);
908 inst |= reg;
909 output = frag_more (2);
910 break;
911
912 case O1:
913 op_end = parse_reg (op_end + 1, & reg);
914 inst |= reg;
915 output = frag_more (2);
916 break;
917
918 case JMP:
919 op_end = parse_reg (op_end + 1, & reg);
920 inst |= reg;
921 output = frag_more (2);
922 /* In a sifilter mode, we emit this insn 2 times,
923 fixes problem of an interrupt during a jmp.. */
924 if (sifilter_mode)
925 {
926 output[0] = INST_BYTE0 (inst);
927 output[1] = INST_BYTE1 (inst);
928 output = frag_more (2);
929 }
930 break;
931
932 case JSR:
933 op_end = parse_reg (op_end + 1, & reg);
934
935 if (reg == 15)
936 as_bad (_("invalid register: r15 illegal"));
937
938 inst |= reg;
939 output = frag_more (2);
940
941 if (sifilter_mode)
942 {
943 /* Replace with: bsr .+2 ; addi r15,6; jmp rx ; jmp rx. */
944 inst = MCORE_INST_BSR; /* With 0 displacement. */
945 output[0] = INST_BYTE0 (inst);
946 output[1] = INST_BYTE1 (inst);
947
948 output = frag_more (2);
949 inst = MCORE_INST_ADDI;
950 inst |= 15; /* addi r15,6 */
951 inst |= (6 - 1) << 4; /* Over the jmp's. */
952 output[0] = INST_BYTE0 (inst);
953 output[1] = INST_BYTE1 (inst);
954
955 output = frag_more (2);
956 inst = MCORE_INST_JMP | reg;
957 output[0] = INST_BYTE0 (inst);
958 output[1] = INST_BYTE1 (inst);
959
960 /* 2nd emitted in fallthrough. */
961 output = frag_more (2);
962 }
963 break;
964
965 case OC:
966 op_end = parse_reg (op_end + 1, & reg);
967 inst |= reg;
968
969 /* Skip whitespace. */
970 while (ISSPACE (* op_end))
971 ++ op_end;
972
973 if (*op_end == ',')
974 {
975 op_end = parse_creg (op_end + 1, & reg);
976 inst |= reg << 4;
977 }
978
979 output = frag_more (2);
980 break;
981
982 case MULSH:
983 if (cpu == M210)
984 {
985 as_bad (_("M340 specific opcode used when assembling for M210"));
986 break;
987 }
988 /* drop through... */
989 case O2:
990 op_end = parse_reg (op_end + 1, & reg);
991 inst |= reg;
992
993 /* Skip whitespace. */
994 while (ISSPACE (* op_end))
995 ++ op_end;
996
997 if (* op_end == ',')
998 {
999 op_end = parse_reg (op_end + 1, & reg);
1000 inst |= reg << 4;
1001 }
1002 else
1003 as_bad (_("second operand missing"));
1004
1005 output = frag_more (2);
1006 break;
1007
1008 case X1:
1009 /* Handle both syntax-> xtrb- r1,rx OR xtrb- rx. */
1010 op_end = parse_reg (op_end + 1, & reg);
1011
1012 /* Skip whitespace. */
1013 while (ISSPACE (* op_end))
1014 ++ op_end;
1015
1016 if (* op_end == ',') /* xtrb- r1,rx. */
1017 {
1018 if (reg != 1)
1019 as_bad (_("destination register must be r1"));
1020
1021 op_end = parse_reg (op_end + 1, & reg);
1022 }
1023
1024 inst |= reg;
1025 output = frag_more (2);
1026 break;
1027
1028 case O1R1: /* div- rx,r1. */
1029 op_end = parse_reg (op_end + 1, & reg);
1030 inst |= reg;
1031
1032 /* Skip whitespace. */
1033 while (ISSPACE (* op_end))
1034 ++ op_end;
1035
1036 if (* op_end == ',')
1037 {
1038 op_end = parse_reg (op_end + 1, & reg);
1039 if (reg != 1)
1040 as_bad (_("source register must be r1"));
1041 }
1042 else
1043 as_bad (_("second operand missing"));
1044
1045 output = frag_more (2);
1046 break;
1047
1048 case OI:
1049 op_end = parse_reg (op_end + 1, & reg);
1050 inst |= reg;
1051
1052 /* Skip whitespace. */
1053 while (ISSPACE (* op_end))
1054 ++ op_end;
1055
1056 if (* op_end == ',')
1057 {
1058 op_end = parse_imm (op_end + 1, & reg, 1, 32);
1059 inst |= (reg - 1) << 4;
1060 }
1061 else
1062 as_bad (_("second operand missing"));
1063
1064 output = frag_more (2);
1065 break;
1066
1067 case OB:
1068 op_end = parse_reg (op_end + 1, & reg);
1069 inst |= reg;
1070
1071 /* Skip whitespace. */
1072 while (ISSPACE (* op_end))
1073 ++ op_end;
1074
1075 if (* op_end == ',')
1076 {
1077 op_end = parse_imm (op_end + 1, & reg, 0, 31);
1078 inst |= reg << 4;
1079 }
1080 else
1081 as_bad (_("second operand missing"));
1082
1083 output = frag_more (2);
1084 break;
1085
1086 case OB2:
1087 /* Like OB, but arg is 2^n instead of n. */
1088 op_end = parse_reg (op_end + 1, & reg);
1089 inst |= reg;
1090
1091 /* Skip whitespace. */
1092 while (ISSPACE (* op_end))
1093 ++ op_end;
1094
1095 if (* op_end == ',')
1096 {
1097 op_end = parse_imm (op_end + 1, & reg, 1, 1 << 31);
1098 /* Further restrict the immediate to a power of two. */
1099 if ((reg & (reg - 1)) == 0)
1100 reg = mylog2 (reg);
1101 else
1102 {
1103 reg = 0;
1104 as_bad (_("immediate is not a power of two"));
1105 }
1106 inst |= (reg) << 4;
1107 }
1108 else
1109 as_bad (_("second operand missing"));
1110
1111 output = frag_more (2);
1112 break;
1113
1114 case OBRa: /* Specific for bgeni: imm of 0->6 translate to movi. */
1115 case OBRb:
1116 case OBRc:
1117 op_end = parse_reg (op_end + 1, & reg);
1118 inst |= reg;
1119
1120 /* Skip whitespace. */
1121 while (ISSPACE (* op_end))
1122 ++ op_end;
1123
1124 if (* op_end == ',')
1125 {
1126 op_end = parse_imm (op_end + 1, & reg, 0, 31);
1127 /* Immediate values of 0 -> 6 translate to movi. */
1128 if (reg <= 6)
1129 {
1130 inst = (inst & 0xF) | MCORE_INST_BGENI_ALT;
1131 reg = 0x1 << reg;
1132 as_warn (_("translating bgeni to movi"));
1133 }
1134 inst &= ~ 0x01f0;
1135 inst |= reg << 4;
1136 }
1137 else
1138 as_bad (_("second operand missing"));
1139
1140 output = frag_more (2);
1141 break;
1142
1143 case OBR2: /* Like OBR, but arg is 2^n instead of n. */
1144 op_end = parse_reg (op_end + 1, & reg);
1145 inst |= reg;
1146
1147 /* Skip whitespace. */
1148 while (ISSPACE (* op_end))
1149 ++ op_end;
1150
1151 if (* op_end == ',')
1152 {
1153 op_end = parse_imm (op_end + 1, & reg, 1, 1 << 31);
1154
1155 /* Further restrict the immediate to a power of two. */
1156 if ((reg & (reg - 1)) == 0)
1157 reg = mylog2 (reg);
1158 else
1159 {
1160 reg = 0;
1161 as_bad (_("immediate is not a power of two"));
1162 }
1163
1164 /* Immediate values of 0 -> 6 translate to movi. */
1165 if (reg <= 6)
1166 {
1167 inst = (inst & 0xF) | MCORE_INST_BGENI_ALT;
1168 reg = 0x1 << reg;
1169 as_warn (_("translating mgeni to movi"));
1170 }
1171
1172 inst |= reg << 4;
1173 }
1174 else
1175 as_bad (_("second operand missing"));
1176
1177 output = frag_more (2);
1178 break;
1179
1180 case OMa: /* Specific for bmaski: imm 1->7 translate to movi. */
1181 case OMb:
1182 case OMc:
1183 op_end = parse_reg (op_end + 1, & reg);
1184 inst |= reg;
1185
1186 /* Skip whitespace. */
1187 while (ISSPACE (* op_end))
1188 ++ op_end;
1189
1190 if (* op_end == ',')
1191 {
1192 op_end = parse_imm (op_end + 1, & reg, 1, 32);
1193
1194 /* Immediate values of 1 -> 7 translate to movi. */
1195 if (reg <= 7)
1196 {
1197 inst = (inst & 0xF) | MCORE_INST_BMASKI_ALT;
1198 reg = (0x1 << reg) - 1;
1199 inst |= reg << 4;
1200
1201 as_warn (_("translating bmaski to movi"));
1202 }
1203 else
1204 {
1205 inst &= ~ 0x01F0;
1206 inst |= (reg & 0x1F) << 4;
1207 }
1208 }
1209 else
1210 as_bad (_("second operand missing"));
1211
1212 output = frag_more (2);
1213 break;
1214
1215 case SI:
1216 op_end = parse_reg (op_end + 1, & reg);
1217 inst |= reg;
1218
1219 /* Skip whitespace. */
1220 while (ISSPACE (* op_end))
1221 ++ op_end;
1222
1223 if (* op_end == ',')
1224 {
1225 op_end = parse_imm (op_end + 1, & reg, 1, 31);
1226 inst |= reg << 4;
1227 }
1228 else
1229 as_bad (_("second operand missing"));
1230
1231 output = frag_more (2);
1232 break;
1233
1234 case I7:
1235 op_end = parse_reg (op_end + 1, & reg);
1236 inst |= reg;
1237
1238 /* Skip whitespace. */
1239 while (ISSPACE (* op_end))
1240 ++ op_end;
1241
1242 if (* op_end == ',')
1243 {
1244 op_end = parse_imm (op_end + 1, & reg, 0, 0x7F);
1245 inst |= reg << 4;
1246 }
1247 else
1248 as_bad (_("second operand missing"));
1249
1250 output = frag_more (2);
1251 break;
1252
1253 case LS:
1254 op_end = parse_reg (op_end + 1, & reg);
1255 inst |= reg << 8;
1256
1257 /* Skip whitespace. */
1258 while (ISSPACE (* op_end))
1259 ++ op_end;
1260
1261 if (* op_end == ',')
1262 {
1263 int size;
1264
1265 if ((inst & 0x6000) == 0)
1266 size = 4;
1267 else if ((inst & 0x6000) == 0x4000)
1268 size = 2;
1269 else if ((inst & 0x6000) == 0x2000)
1270 size = 1;
1271 else
1272 abort ();
1273
1274 op_end = parse_mem (op_end + 1, & reg, & off, size);
1275
1276 if (off > 16)
1277 as_bad (_("displacement too large (%d)"), off);
1278 else
1279 inst |= (reg) | (off << 4);
1280 }
1281 else
1282 as_bad (_("second operand missing"));
1283
1284 output = frag_more (2);
1285 break;
1286
1287 case LR:
1288 op_end = parse_reg (op_end + 1, & reg);
1289
1290 if (reg == 0 || reg == 15)
1291 as_bad (_("Invalid register: r0 and r15 illegal"));
1292
1293 inst |= (reg << 8);
1294
1295 /* Skip whitespace. */
1296 while (ISSPACE (* op_end))
1297 ++ op_end;
1298
1299 if (* op_end == ',')
1300 {
1301 /* parse_rt calls frag_more() for us. */
1302 input_line_pointer = parse_rt (op_end + 1, & output, 0, 0);
1303 op_end = input_line_pointer;
1304 }
1305 else
1306 {
1307 as_bad (_("second operand missing"));
1308 output = frag_more (2); /* save its space */
1309 }
1310 break;
1311
1312 case LJ:
1313 input_line_pointer = parse_rt (op_end + 1, & output, 1, 0);
1314 /* parse_rt() calls frag_more() for us. */
1315 op_end = input_line_pointer;
1316 break;
1317
1318 case RM:
1319 op_end = parse_reg (op_end + 1, & reg);
1320
1321 if (reg == 0 || reg == 15)
1322 as_bad (_("bad starting register: r0 and r15 invalid"));
1323
1324 inst |= reg;
1325
1326 /* Skip whitespace. */
1327 while (ISSPACE (* op_end))
1328 ++ op_end;
1329
1330 if (* op_end == '-')
1331 {
1332 op_end = parse_reg (op_end + 1, & reg);
1333
1334 if (reg != 15)
1335 as_bad (_("ending register must be r15"));
1336
1337 /* Skip whitespace. */
1338 while (ISSPACE (* op_end))
1339 ++ op_end;
1340 }
1341
1342 if (* op_end == ',')
1343 {
1344 op_end ++;
1345
1346 /* Skip whitespace. */
1347 while (ISSPACE (* op_end))
1348 ++ op_end;
1349
1350 if (* op_end == '(')
1351 {
1352 op_end = parse_reg (op_end + 1, & reg);
1353
1354 if (reg != 0)
1355 as_bad (_("bad base register: must be r0"));
1356
1357 if (* op_end == ')')
1358 op_end ++;
1359 }
1360 else
1361 as_bad (_("base register expected"));
1362 }
1363 else
1364 as_bad (_("second operand missing"));
1365
1366 output = frag_more (2);
1367 break;
1368
1369 case RQ:
1370 op_end = parse_reg (op_end + 1, & reg);
1371
1372 if (reg != 4)
1373 as_fatal (_("first register must be r4"));
1374
1375 /* Skip whitespace. */
1376 while (ISSPACE (* op_end))
1377 ++ op_end;
1378
1379 if (* op_end == '-')
1380 {
1381 op_end = parse_reg (op_end + 1, & reg);
1382
1383 if (reg != 7)
1384 as_fatal (_("last register must be r7"));
1385
1386 /* Skip whitespace. */
1387 while (ISSPACE (* op_end))
1388 ++ op_end;
1389
1390 if (* op_end == ',')
1391 {
1392 op_end ++;
1393
1394 /* Skip whitespace. */
1395 while (ISSPACE (* op_end))
1396 ++ op_end;
1397
1398 if (* op_end == '(')
1399 {
1400 op_end = parse_reg (op_end + 1, & reg);
1401
1402 if (reg >= 4 && reg <= 7)
1403 as_fatal ("base register cannot be r4, r5, r6, or r7");
1404
1405 inst |= reg;
1406
1407 /* Skip whitespace. */
1408 while (ISSPACE (* op_end))
1409 ++ op_end;
1410
1411 if (* op_end == ')')
1412 op_end ++;
1413 }
1414 else
1415 as_bad (_("base register expected"));
1416 }
1417 else
1418 as_bad (_("second operand missing"));
1419 }
1420 else
1421 as_bad (_("reg-reg expected"));
1422
1423 output = frag_more (2);
1424 break;
1425
1426 case BR:
1427 input_line_pointer = parse_exp (op_end + 1, & e);
1428 op_end = input_line_pointer;
1429
1430 output = frag_more (2);
1431
1432 fix_new_exp (frag_now, output-frag_now->fr_literal,
1433 2, & e, 1, BFD_RELOC_MCORE_PCREL_IMM11BY2);
1434 break;
1435
1436 case BL:
1437 op_end = parse_reg (op_end + 1, & reg);
1438 inst |= reg << 4;
1439
1440 /* Skip whitespace. */
1441 while (ISSPACE (* op_end))
1442 ++ op_end;
1443
1444 if (* op_end == ',')
1445 {
1446 op_end = parse_exp (op_end + 1, & e);
1447 output = frag_more (2);
1448
1449 fix_new_exp (frag_now, output-frag_now->fr_literal,
1450 2, & e, 1, BFD_RELOC_MCORE_PCREL_IMM4BY2);
1451 }
1452 else
1453 {
1454 as_bad (_("second operand missing"));
1455 output = frag_more (2);
1456 }
1457 break;
1458
1459 case JC:
1460 input_line_pointer = parse_exp (op_end + 1, & e);
1461 op_end = input_line_pointer;
1462
1463 output = frag_var (rs_machine_dependent,
1464 md_relax_table[C (COND_JUMP, DISP32)].rlx_length,
1465 md_relax_table[C (COND_JUMP, DISP12)].rlx_length,
1466 C (COND_JUMP, 0), e.X_add_symbol, e.X_add_number, 0);
1467 isize = C32_LEN;
1468 break;
1469
1470 case JU:
1471 input_line_pointer = parse_exp (op_end + 1, & e);
1472 op_end = input_line_pointer;
1473
1474 output = frag_var (rs_machine_dependent,
1475 md_relax_table[C (UNCD_JUMP, DISP32)].rlx_length,
1476 md_relax_table[C (UNCD_JUMP, DISP12)].rlx_length,
1477 C (UNCD_JUMP, 0), e.X_add_symbol, e.X_add_number, 0);
1478 isize = U32_LEN;
1479 break;
1480
1481 case JL:
1482 inst = MCORE_INST_JSRI; /* jsri */
1483 input_line_pointer = parse_rt (op_end + 1, & output, 1, & e);
1484 /* parse_rt() calls frag_more for us. */
1485 op_end = input_line_pointer;
1486
1487 /* Only do this if we know how to do it ... */
1488 if (e.X_op != O_absent && do_jsri2bsr)
1489 {
1490 /* Look at adding the R_PCREL_JSRIMM11BY2. */
1491 fix_new_exp (frag_now, output-frag_now->fr_literal,
1492 2, & e, 1, BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2);
1493 }
1494 break;
1495
1496 case RSI:
1497 /* SI, but imm becomes 32-imm. */
1498 op_end = parse_reg (op_end + 1, & reg);
1499 inst |= reg;
1500
1501 /* Skip whitespace. */
1502 while (ISSPACE (* op_end))
1503 ++ op_end;
1504
1505 if (* op_end == ',')
1506 {
1507 op_end = parse_imm (op_end + 1, & reg, 1, 31);
1508
1509 reg = 32 - reg;
1510 inst |= reg << 4;
1511 }
1512 else
1513 as_bad (_("second operand missing"));
1514
1515 output = frag_more (2);
1516 break;
1517
1518 case DO21: /* O2, dup rd, lit must be 1 */
1519 op_end = parse_reg (op_end + 1, & reg);
1520 inst |= reg;
1521 inst |= reg << 4;
1522
1523 /* Skip whitespace. */
1524 while (ISSPACE (* op_end))
1525 ++ op_end;
1526
1527 if (* op_end == ',')
1528 {
1529 op_end = parse_imm (op_end + 1, & reg, 1, 31);
1530
1531 if (reg != 1)
1532 as_bad (_("second operand must be 1"));
1533 }
1534 else
1535 as_bad (_("second operand missing"));
1536
1537 output = frag_more (2);
1538 break;
1539
1540 case SIa:
1541 op_end = parse_reg (op_end + 1, & reg);
1542 inst |= reg;
1543
1544 /* Skip whitespace. */
1545 while (ISSPACE (* op_end))
1546 ++ op_end;
1547
1548 if (* op_end == ',')
1549 {
1550 op_end = parse_imm (op_end + 1, & reg, 1, 31);
1551
1552 if (reg == 0)
1553 as_bad (_("zero used as immediate value"));
1554
1555 inst |= reg << 4;
1556 }
1557 else
1558 as_bad (_("second operand missing"));
1559
1560 output = frag_more (2);
1561 break;
1562
1563 case OPSR:
1564 if (cpu == M210)
1565 {
1566 as_bad (_("M340 specific opcode used when assembling for M210"));
1567 break;
1568 }
1569
1570 op_end = parse_psrmod (op_end + 1, & reg);
1571
1572 /* Look for further selectors. */
1573 while (* op_end == ',')
1574 {
1575 unsigned value;
1576
1577 op_end = parse_psrmod (op_end + 1, & value);
1578
1579 if (value & reg)
1580 as_bad (_("duplicated psr bit specifier"));
1581
1582 reg |= value;
1583 }
1584
1585 if (reg > 8)
1586 as_bad (_("`af' must appear alone"));
1587
1588 inst |= (reg & 0x7);
1589 output = frag_more (2);
1590 break;
1591
1592 default:
1593 as_bad (_("unimplemented opcode \"%s\""), name);
1594 }
1595
1596 /* Drop whitespace after all the operands have been parsed. */
1597 while (ISSPACE (* op_end))
1598 op_end ++;
1599
1600 /* Give warning message if the insn has more operands than required. */
1601 if (strcmp (op_end, opcode->name) && strcmp (op_end, ""))
1602 as_warn (_("ignoring operands: %s "), op_end);
1603
1604 output[0] = INST_BYTE0 (inst);
1605 output[1] = INST_BYTE1 (inst);
1606
1607 check_literals (opcode->transfer, isize);
1608 }
1609
1610 symbolS *
md_undefined_symbol(char * name ATTRIBUTE_UNUSED)1611 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
1612 {
1613 return 0;
1614 }
1615
1616 void
md_mcore_end(void)1617 md_mcore_end (void)
1618 {
1619 dump_literals (0);
1620 subseg_set (text_section, 0);
1621 }
1622
1623 /* Various routines to kill one day. */
1624 /* Equal to MAX_PRECISION in atof-ieee.c. */
1625 #define MAX_LITTLENUMS 6
1626
1627 /* Turn a string in input_line_pointer into a floating point constant of type
1628 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
1629 emitted is stored in *sizeP. An error message is returned, or NULL on OK. */
1630
1631 char *
md_atof(int type,char * litP,int * sizeP)1632 md_atof (int type, char * litP, int * sizeP)
1633 {
1634 int prec;
1635 LITTLENUM_TYPE words[MAX_LITTLENUMS];
1636 int i;
1637 char * t;
1638
1639 switch (type)
1640 {
1641 case 'f':
1642 case 'F':
1643 case 's':
1644 case 'S':
1645 prec = 2;
1646 break;
1647
1648 case 'd':
1649 case 'D':
1650 case 'r':
1651 case 'R':
1652 prec = 4;
1653 break;
1654
1655 case 'x':
1656 case 'X':
1657 prec = 6;
1658 break;
1659
1660 case 'p':
1661 case 'P':
1662 prec = 6;
1663 break;
1664
1665 default:
1666 *sizeP = 0;
1667 return _("Bad call to MD_NTOF()");
1668 }
1669
1670 t = atof_ieee (input_line_pointer, type, words);
1671
1672 if (t)
1673 input_line_pointer = t;
1674
1675 *sizeP = prec * sizeof (LITTLENUM_TYPE);
1676
1677 if (! target_big_endian)
1678 {
1679 for (i = prec - 1; i >= 0; i--)
1680 {
1681 md_number_to_chars (litP, (valueT) words[i],
1682 sizeof (LITTLENUM_TYPE));
1683 litP += sizeof (LITTLENUM_TYPE);
1684 }
1685 }
1686 else
1687 for (i = 0; i < prec; i++)
1688 {
1689 md_number_to_chars (litP, (valueT) words[i],
1690 sizeof (LITTLENUM_TYPE));
1691 litP += sizeof (LITTLENUM_TYPE);
1692 }
1693
1694 return 0;
1695 }
1696
1697 const char * md_shortopts = "";
1698
1699 enum options
1700 {
1701 OPTION_JSRI2BSR_ON = OPTION_MD_BASE,
1702 OPTION_JSRI2BSR_OFF,
1703 OPTION_SIFILTER_ON,
1704 OPTION_SIFILTER_OFF,
1705 OPTION_CPU,
1706 OPTION_EB,
1707 OPTION_EL,
1708 };
1709
1710 struct option md_longopts[] =
1711 {
1712 { "no-jsri2bsr", no_argument, NULL, OPTION_JSRI2BSR_OFF},
1713 { "jsri2bsr", no_argument, NULL, OPTION_JSRI2BSR_ON},
1714 { "sifilter", no_argument, NULL, OPTION_SIFILTER_ON},
1715 { "no-sifilter", no_argument, NULL, OPTION_SIFILTER_OFF},
1716 { "cpu", required_argument, NULL, OPTION_CPU},
1717 { "EB", no_argument, NULL, OPTION_EB},
1718 { "EL", no_argument, NULL, OPTION_EL},
1719 { NULL, no_argument, NULL, 0}
1720 };
1721
1722 size_t md_longopts_size = sizeof (md_longopts);
1723
1724 int
md_parse_option(int c,char * arg)1725 md_parse_option (int c, char * arg)
1726 {
1727 switch (c)
1728 {
1729 case OPTION_CPU:
1730 if (streq (arg, "210"))
1731 {
1732 cpu = M210;
1733 target_big_endian = 1;
1734 }
1735 else if (streq (arg, "340"))
1736 cpu = M340;
1737 else
1738 as_warn (_("unrecognised cpu type '%s'"), arg);
1739 break;
1740
1741 case OPTION_EB: target_big_endian = 1; break;
1742 case OPTION_EL: target_big_endian = 0; cpu = M340; break;
1743 case OPTION_JSRI2BSR_ON: do_jsri2bsr = 1; break;
1744 case OPTION_JSRI2BSR_OFF: do_jsri2bsr = 0; break;
1745 case OPTION_SIFILTER_ON: sifilter_mode = 1; break;
1746 case OPTION_SIFILTER_OFF: sifilter_mode = 0; break;
1747 default: return 0;
1748 }
1749
1750 return 1;
1751 }
1752
1753 void
md_show_usage(FILE * stream)1754 md_show_usage (FILE * stream)
1755 {
1756 fprintf (stream, _("\
1757 MCORE specific options:\n\
1758 -{no-}jsri2bsr {dis}able jsri to bsr transformation (def: dis)\n\
1759 -{no-}sifilter {dis}able silicon filter behavior (def: dis)\n\
1760 -cpu=[210|340] select CPU type\n\
1761 -EB assemble for a big endian system (default)\n\
1762 -EL assemble for a little endian system\n"));
1763 }
1764
1765 int md_short_jump_size;
1766
1767 void
md_create_short_jump(char * ptr ATTRIBUTE_UNUSED,addressT from_Nddr ATTRIBUTE_UNUSED,addressT to_Nddr ATTRIBUTE_UNUSED,fragS * frag ATTRIBUTE_UNUSED,symbolS * to_symbol ATTRIBUTE_UNUSED)1768 md_create_short_jump (char * ptr ATTRIBUTE_UNUSED,
1769 addressT from_Nddr ATTRIBUTE_UNUSED,
1770 addressT to_Nddr ATTRIBUTE_UNUSED,
1771 fragS * frag ATTRIBUTE_UNUSED,
1772 symbolS * to_symbol ATTRIBUTE_UNUSED)
1773 {
1774 as_fatal (_("failed sanity check: short_jump"));
1775 }
1776
1777 void
md_create_long_jump(char * ptr ATTRIBUTE_UNUSED,addressT from_Nddr ATTRIBUTE_UNUSED,addressT to_Nddr ATTRIBUTE_UNUSED,fragS * frag ATTRIBUTE_UNUSED,symbolS * to_symbol ATTRIBUTE_UNUSED)1778 md_create_long_jump (char * ptr ATTRIBUTE_UNUSED,
1779 addressT from_Nddr ATTRIBUTE_UNUSED,
1780 addressT to_Nddr ATTRIBUTE_UNUSED,
1781 fragS * frag ATTRIBUTE_UNUSED,
1782 symbolS * to_symbol ATTRIBUTE_UNUSED)
1783 {
1784 as_fatal (_("failed sanity check: long_jump"));
1785 }
1786
1787 /* Called after relaxing, change the frags so they know how big they are. */
1788
1789 void
md_convert_frag(bfd * abfd ATTRIBUTE_UNUSED,segT sec ATTRIBUTE_UNUSED,fragS * fragP)1790 md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
1791 segT sec ATTRIBUTE_UNUSED,
1792 fragS * fragP)
1793 {
1794 char *buffer;
1795 int targ_addr = S_GET_VALUE (fragP->fr_symbol) + fragP->fr_offset;
1796
1797 buffer = fragP->fr_fix + fragP->fr_literal;
1798
1799 switch (fragP->fr_subtype)
1800 {
1801 case C (COND_JUMP, DISP12):
1802 case C (UNCD_JUMP, DISP12):
1803 {
1804 /* Get the address of the end of the instruction. */
1805 int next_inst = fragP->fr_fix + fragP->fr_address + 2;
1806 unsigned char t0;
1807 int disp = targ_addr - next_inst;
1808
1809 if (disp & 1)
1810 as_bad (_("odd displacement at %x"), next_inst - 2);
1811
1812 disp >>= 1;
1813
1814 if (! target_big_endian)
1815 {
1816 t0 = buffer[1] & 0xF8;
1817
1818 md_number_to_chars (buffer, disp, 2);
1819
1820 buffer[1] = (buffer[1] & 0x07) | t0;
1821 }
1822 else
1823 {
1824 t0 = buffer[0] & 0xF8;
1825
1826 md_number_to_chars (buffer, disp, 2);
1827
1828 buffer[0] = (buffer[0] & 0x07) | t0;
1829 }
1830
1831 fragP->fr_fix += 2;
1832 }
1833 break;
1834
1835 case C (COND_JUMP, DISP32):
1836 case C (COND_JUMP, UNDEF_WORD_DISP):
1837 {
1838 /* A conditional branch wont fit into 12 bits so:
1839 b!cond 1f
1840 jmpi 0f
1841 .align 2
1842 0: .long disp
1843 1:
1844
1845 If the b!cond is 4 byte aligned, the literal which would
1846 go at x+4 will also be aligned. */
1847 int first_inst = fragP->fr_fix + fragP->fr_address;
1848 int needpad = (first_inst & 3);
1849
1850 if (! target_big_endian)
1851 buffer[1] ^= 0x08;
1852 else
1853 buffer[0] ^= 0x08; /* Toggle T/F bit. */
1854
1855 buffer[2] = INST_BYTE0 (MCORE_INST_JMPI); /* Build jmpi. */
1856 buffer[3] = INST_BYTE1 (MCORE_INST_JMPI);
1857
1858 if (needpad)
1859 {
1860 if (! target_big_endian)
1861 {
1862 buffer[0] = 4; /* Branch over jmpi, pad, and ptr. */
1863 buffer[2] = 1; /* Jmpi offset of 1 gets the pointer. */
1864 }
1865 else
1866 {
1867 buffer[1] = 4; /* Branch over jmpi, pad, and ptr. */
1868 buffer[3] = 1; /* Jmpi offset of 1 gets the pointer. */
1869 }
1870
1871 buffer[4] = 0; /* Alignment/pad. */
1872 buffer[5] = 0;
1873 buffer[6] = 0; /* Space for 32 bit address. */
1874 buffer[7] = 0;
1875 buffer[8] = 0;
1876 buffer[9] = 0;
1877
1878 /* Make reloc for the long disp. */
1879 fix_new (fragP, fragP->fr_fix + 6, 4,
1880 fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32);
1881
1882 fragP->fr_fix += C32_LEN;
1883 }
1884 else
1885 {
1886 /* See comment below about this given gas' limitations for
1887 shrinking the fragment. '3' is the amount of code that
1888 we inserted here, but '4' is right for the space we reserved
1889 for this fragment. */
1890 if (! target_big_endian)
1891 {
1892 buffer[0] = 3; /* Branch over jmpi, and ptr. */
1893 buffer[2] = 0; /* Jmpi offset of 0 gets the pointer. */
1894 }
1895 else
1896 {
1897 buffer[1] = 3; /* Branch over jmpi, and ptr. */
1898 buffer[3] = 0; /* Jmpi offset of 0 gets the pointer. */
1899 }
1900
1901 buffer[4] = 0; /* Space for 32 bit address. */
1902 buffer[5] = 0;
1903 buffer[6] = 0;
1904 buffer[7] = 0;
1905
1906 /* Make reloc for the long disp. */
1907 fix_new (fragP, fragP->fr_fix + 4, 4,
1908 fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32);
1909 fragP->fr_fix += C32_LEN;
1910
1911 /* Frag is actually shorter (see the other side of this ifdef)
1912 but gas isn't prepared for that. We have to re-adjust
1913 the branch displacement so that it goes beyond the
1914 full length of the fragment, not just what we actually
1915 filled in. */
1916 if (! target_big_endian)
1917 buffer[0] = 4; /* Jmpi, ptr, and the 'tail pad'. */
1918 else
1919 buffer[1] = 4; /* Jmpi, ptr, and the 'tail pad'. */
1920 }
1921 }
1922 break;
1923
1924 case C (UNCD_JUMP, DISP32):
1925 case C (UNCD_JUMP, UNDEF_WORD_DISP):
1926 {
1927 /* An unconditional branch will not fit in 12 bits, make code which
1928 looks like:
1929 jmpi 0f
1930 .align 2
1931 0: .long disp
1932 we need a pad if "first_inst" is 4 byte aligned.
1933 [because the natural literal place is x + 2]. */
1934 int first_inst = fragP->fr_fix + fragP->fr_address;
1935 int needpad = !(first_inst & 3);
1936
1937 buffer[0] = INST_BYTE0 (MCORE_INST_JMPI); /* Build jmpi. */
1938 buffer[1] = INST_BYTE1 (MCORE_INST_JMPI);
1939
1940 if (needpad)
1941 {
1942 if (! target_big_endian)
1943 buffer[0] = 1; /* Jmpi offset of 1 since padded. */
1944 else
1945 buffer[1] = 1; /* Jmpi offset of 1 since padded. */
1946 buffer[2] = 0; /* Alignment. */
1947 buffer[3] = 0;
1948 buffer[4] = 0; /* Space for 32 bit address. */
1949 buffer[5] = 0;
1950 buffer[6] = 0;
1951 buffer[7] = 0;
1952
1953 /* Make reloc for the long disp. */
1954 fix_new (fragP, fragP->fr_fix + 4, 4,
1955 fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32);
1956
1957 fragP->fr_fix += U32_LEN;
1958 }
1959 else
1960 {
1961 if (! target_big_endian)
1962 buffer[0] = 0; /* Jmpi offset of 0 if no pad. */
1963 else
1964 buffer[1] = 0; /* Jmpi offset of 0 if no pad. */
1965 buffer[2] = 0; /* Space for 32 bit address. */
1966 buffer[3] = 0;
1967 buffer[4] = 0;
1968 buffer[5] = 0;
1969
1970 /* Make reloc for the long disp. */
1971 fix_new (fragP, fragP->fr_fix + 2, 4,
1972 fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32);
1973 fragP->fr_fix += U32_LEN;
1974 }
1975 }
1976 break;
1977
1978 default:
1979 abort ();
1980 }
1981 }
1982
1983 /* Applies the desired value to the specified location.
1984 Also sets up addends for 'rela' type relocations. */
1985
1986 void
md_apply_fix(fixS * fixP,valueT * valP,segT segment ATTRIBUTE_UNUSED)1987 md_apply_fix (fixS * fixP,
1988 valueT * valP,
1989 segT segment ATTRIBUTE_UNUSED)
1990 {
1991 char * buf = fixP->fx_where + fixP->fx_frag->fr_literal;
1992 char * file = fixP->fx_file ? fixP->fx_file : _("unknown");
1993 const char * symname;
1994 /* Note: use offsetT because it is signed, valueT is unsigned. */
1995 offsetT val = *valP;
1996
1997 symname = fixP->fx_addsy ? S_GET_NAME (fixP->fx_addsy) : _("<unknown>");
1998 /* Save this for the addend in the relocation record. */
1999 fixP->fx_addnumber = val;
2000
2001 if (fixP->fx_addsy != NULL)
2002 {
2003 #ifdef OBJ_ELF
2004 /* For ELF we can just return and let the reloc that will be generated
2005 take care of everything. For COFF we still have to insert 'val'
2006 into the insn since the addend field will be ignored. */
2007 return;
2008 #endif
2009 }
2010 else
2011 fixP->fx_done = 1;
2012
2013 switch (fixP->fx_r_type)
2014 {
2015 /* Second byte of 2 byte opcode. */
2016 case BFD_RELOC_MCORE_PCREL_IMM11BY2:
2017 if ((val & 1) != 0)
2018 as_bad_where (file, fixP->fx_line,
2019 _("odd distance branch (0x%lx bytes)"), (long) val);
2020 val /= 2;
2021 if (((val & ~0x3ff) != 0) && ((val | 0x3ff) != -1))
2022 as_bad_where (file, fixP->fx_line,
2023 _("pcrel for branch to %s too far (0x%lx)"),
2024 symname, (long) val);
2025 if (target_big_endian)
2026 {
2027 buf[0] |= ((val >> 8) & 0x7);
2028 buf[1] |= (val & 0xff);
2029 }
2030 else
2031 {
2032 buf[1] |= ((val >> 8) & 0x7);
2033 buf[0] |= (val & 0xff);
2034 }
2035 break;
2036
2037 /* Lower 8 bits of 2 byte opcode. */
2038 case BFD_RELOC_MCORE_PCREL_IMM8BY4:
2039 val += 3;
2040 val /= 4;
2041 if (val & ~0xff)
2042 as_bad_where (file, fixP->fx_line,
2043 _("pcrel for lrw/jmpi/jsri to %s too far (0x%lx)"),
2044 symname, (long) val);
2045 else if (! target_big_endian)
2046 buf[0] |= (val & 0xff);
2047 else
2048 buf[1] |= (val & 0xff);
2049 break;
2050
2051 /* Loopt instruction. */
2052 case BFD_RELOC_MCORE_PCREL_IMM4BY2:
2053 if ((val < -32) || (val > -2))
2054 as_bad_where (file, fixP->fx_line,
2055 _("pcrel for loopt too far (0x%lx)"), (long) val);
2056 val /= 2;
2057 if (! target_big_endian)
2058 buf[0] |= (val & 0xf);
2059 else
2060 buf[1] |= (val & 0xf);
2061 break;
2062
2063 case BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2:
2064 /* Conditional linker map jsri to bsr. */
2065 /* If its a local target and close enough, fix it.
2066 NB: >= -2k for backwards bsr; < 2k for forwards... */
2067 if (fixP->fx_addsy == 0 && val >= -2048 && val < 2048)
2068 {
2069 long nval = (val / 2) & 0x7ff;
2070 nval |= MCORE_INST_BSR;
2071
2072 /* REPLACE the instruction, don't just modify it. */
2073 buf[0] = INST_BYTE0 (nval);
2074 buf[1] = INST_BYTE1 (nval);
2075 }
2076 else
2077 fixP->fx_done = 0;
2078 break;
2079
2080 case BFD_RELOC_MCORE_PCREL_32:
2081 case BFD_RELOC_VTABLE_INHERIT:
2082 case BFD_RELOC_VTABLE_ENTRY:
2083 fixP->fx_done = 0;
2084 break;
2085
2086 default:
2087 if (fixP->fx_addsy != NULL)
2088 {
2089 /* If the fix is an absolute reloc based on a symbol's
2090 address, then it cannot be resolved until the final link. */
2091 fixP->fx_done = 0;
2092 }
2093 #ifdef OBJ_ELF
2094 else
2095 #endif
2096 {
2097 if (fixP->fx_size == 4)
2098 ;
2099 else if (fixP->fx_size == 2 && val >= -32768 && val <= 32767)
2100 ;
2101 else if (fixP->fx_size == 1 && val >= -256 && val <= 255)
2102 ;
2103 else
2104 abort ();
2105 md_number_to_chars (buf, val, fixP->fx_size);
2106 }
2107 break;
2108 }
2109 }
2110
2111 void
md_operand(expressionS * expressionP)2112 md_operand (expressionS * expressionP)
2113 {
2114 /* Ignore leading hash symbol, if poresent. */
2115 if (* input_line_pointer == '#')
2116 {
2117 input_line_pointer ++;
2118 expression (expressionP);
2119 }
2120 }
2121
2122 int md_long_jump_size;
2123
2124 /* Called just before address relaxation, return the length
2125 by which a fragment must grow to reach it's destination. */
2126 int
md_estimate_size_before_relax(fragS * fragP,segT segment_type)2127 md_estimate_size_before_relax (fragS * fragP, segT segment_type)
2128 {
2129 switch (fragP->fr_subtype)
2130 {
2131 default:
2132 abort ();
2133
2134 case C (UNCD_JUMP, UNDEF_DISP):
2135 /* Used to be a branch to somewhere which was unknown. */
2136 if (!fragP->fr_symbol)
2137 fragP->fr_subtype = C (UNCD_JUMP, DISP12);
2138 else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
2139 fragP->fr_subtype = C (UNCD_JUMP, DISP12);
2140 else
2141 fragP->fr_subtype = C (UNCD_JUMP, UNDEF_WORD_DISP);
2142 break;
2143
2144 case C (COND_JUMP, UNDEF_DISP):
2145 /* Used to be a branch to somewhere which was unknown. */
2146 if (fragP->fr_symbol
2147 && S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
2148 /* Got a symbol and it's defined in this segment, become byte
2149 sized - maybe it will fix up */
2150 fragP->fr_subtype = C (COND_JUMP, DISP12);
2151 else if (fragP->fr_symbol)
2152 /* Its got a segment, but its not ours, so it will always be long. */
2153 fragP->fr_subtype = C (COND_JUMP, UNDEF_WORD_DISP);
2154 else
2155 /* We know the abs value. */
2156 fragP->fr_subtype = C (COND_JUMP, DISP12);
2157 break;
2158
2159 case C (UNCD_JUMP, DISP12):
2160 case C (UNCD_JUMP, DISP32):
2161 case C (UNCD_JUMP, UNDEF_WORD_DISP):
2162 case C (COND_JUMP, DISP12):
2163 case C (COND_JUMP, DISP32):
2164 case C (COND_JUMP, UNDEF_WORD_DISP):
2165 /* When relaxing a section for the second time, we don't need to
2166 do anything besides return the current size. */
2167 break;
2168 }
2169
2170 return md_relax_table[fragP->fr_subtype].rlx_length;
2171 }
2172
2173 /* Put number into target byte order. */
2174
2175 void
md_number_to_chars(char * ptr,valueT use,int nbytes)2176 md_number_to_chars (char * ptr, valueT use, int nbytes)
2177 {
2178 if (! target_big_endian)
2179 switch (nbytes)
2180 {
2181 case 4: ptr[3] = (use >> 24) & 0xff; /* Fall through. */
2182 case 3: ptr[2] = (use >> 16) & 0xff; /* Fall through. */
2183 case 2: ptr[1] = (use >> 8) & 0xff; /* Fall through. */
2184 case 1: ptr[0] = (use >> 0) & 0xff; break;
2185 default: abort ();
2186 }
2187 else
2188 switch (nbytes)
2189 {
2190 case 4: *ptr++ = (use >> 24) & 0xff; /* Fall through. */
2191 case 3: *ptr++ = (use >> 16) & 0xff; /* Fall through. */
2192 case 2: *ptr++ = (use >> 8) & 0xff; /* Fall through. */
2193 case 1: *ptr++ = (use >> 0) & 0xff; break;
2194 default: abort ();
2195 }
2196 }
2197
2198 /* Round up a section size to the appropriate boundary. */
2199
2200 valueT
md_section_align(segT segment ATTRIBUTE_UNUSED,valueT size)2201 md_section_align (segT segment ATTRIBUTE_UNUSED,
2202 valueT size)
2203 {
2204 /* Byte alignment is fine. */
2205 return size;
2206 }
2207
2208 /* The location from which a PC relative jump should be calculated,
2209 given a PC relative reloc. */
2210
2211 long
md_pcrel_from_section(fixS * fixp,segT sec ATTRIBUTE_UNUSED)2212 md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED)
2213 {
2214 #ifdef OBJ_ELF
2215 /* If the symbol is undefined or defined in another section
2216 we leave the add number alone for the linker to fix it later.
2217 Only account for the PC pre-bump (which is 2 bytes on the MCore). */
2218 if (fixp->fx_addsy != (symbolS *) NULL
2219 && (! S_IS_DEFINED (fixp->fx_addsy)
2220 || (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
2221
2222 {
2223 assert (fixp->fx_size == 2); /* must be an insn */
2224 return fixp->fx_size;
2225 }
2226 #endif
2227
2228 /* The case where we are going to resolve things... */
2229 return fixp->fx_size + fixp->fx_where + fixp->fx_frag->fr_address;
2230 }
2231
2232 #define F(SZ,PCREL) (((SZ) << 1) + (PCREL))
2233 #define MAP(SZ,PCREL,TYPE) case F (SZ, PCREL): code = (TYPE); break
2234
2235 arelent *
tc_gen_reloc(asection * section ATTRIBUTE_UNUSED,fixS * fixp)2236 tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
2237 {
2238 arelent * rel;
2239 bfd_reloc_code_real_type code;
2240
2241 switch (fixp->fx_r_type)
2242 {
2243 /* These confuse the size/pcrel macro approach. */
2244 case BFD_RELOC_VTABLE_INHERIT:
2245 case BFD_RELOC_VTABLE_ENTRY:
2246 case BFD_RELOC_MCORE_PCREL_IMM4BY2:
2247 case BFD_RELOC_MCORE_PCREL_IMM8BY4:
2248 case BFD_RELOC_MCORE_PCREL_IMM11BY2:
2249 case BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2:
2250 case BFD_RELOC_RVA:
2251 code = fixp->fx_r_type;
2252 break;
2253
2254 default:
2255 switch (F (fixp->fx_size, fixp->fx_pcrel))
2256 {
2257 MAP (1, 0, BFD_RELOC_8);
2258 MAP (2, 0, BFD_RELOC_16);
2259 MAP (4, 0, BFD_RELOC_32);
2260 MAP (1, 1, BFD_RELOC_8_PCREL);
2261 MAP (2, 1, BFD_RELOC_16_PCREL);
2262 MAP (4, 1, BFD_RELOC_32_PCREL);
2263 default:
2264 code = fixp->fx_r_type;
2265 as_bad (_("Can not do %d byte %srelocation"),
2266 fixp->fx_size,
2267 fixp->fx_pcrel ? _("pc-relative") : "");
2268 }
2269 break;
2270 }
2271
2272 rel = xmalloc (sizeof (arelent));
2273 rel->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
2274 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2275 rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
2276 /* Always pass the addend along! */
2277 rel->addend = fixp->fx_addnumber;
2278
2279 rel->howto = bfd_reloc_type_lookup (stdoutput, code);
2280
2281 if (rel->howto == NULL)
2282 {
2283 as_bad_where (fixp->fx_file, fixp->fx_line,
2284 _("Cannot represent relocation type %s"),
2285 bfd_get_reloc_code_name (code));
2286
2287 /* Set howto to a garbage value so that we can keep going. */
2288 rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32);
2289 assert (rel->howto != NULL);
2290 }
2291
2292 return rel;
2293 }
2294
2295 #ifdef OBJ_ELF
2296 /* See whether we need to force a relocation into the output file.
2297 This is used to force out switch and PC relative relocations when
2298 relaxing. */
2299 int
mcore_force_relocation(fixS * fix)2300 mcore_force_relocation (fixS * fix)
2301 {
2302 if (fix->fx_r_type == BFD_RELOC_RVA)
2303 return 1;
2304
2305 return generic_force_reloc (fix);
2306 }
2307
2308 /* Return true if the fix can be handled by GAS, false if it must
2309 be passed through to the linker. */
2310
2311 bfd_boolean
mcore_fix_adjustable(fixS * fixP)2312 mcore_fix_adjustable (fixS * fixP)
2313 {
2314 /* We need the symbol name for the VTABLE entries. */
2315 if ( fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2316 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2317 return 0;
2318
2319 return 1;
2320 }
2321 #endif /* OBJ_ELF */
2322