1 /* $NetBSD: sram.c,v 1.23 2025/01/27 21:20:25 andvar Exp $ */
2
3 /*
4 * Copyright (c) 1994 Kazuhisa Shimizu.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Kazuhisa Shimizu.
18 * 4. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 #include <sys/cdefs.h>
34 __KERNEL_RCSID(0, "$NetBSD: sram.c,v 1.23 2025/01/27 21:20:25 andvar Exp $");
35
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/proc.h>
39 #include <sys/ioctl.h>
40 #include <sys/file.h>
41 #include <sys/conf.h>
42 #include <sys/bus.h>
43 #include <sys/device.h>
44
45 #include <machine/sram.h>
46 #include <x68k/dev/intiovar.h>
47 #include <x68k/dev/sramvar.h>
48
49 #include "ioconf.h"
50
51 #define SRAM_ADDR (0xed0000)
52
53 #ifdef DEBUG
54 #define SRAM_DEBUG_OPEN 0x01
55 #define SRAM_DEBUG_CLOSE 0x02
56 #define SRAM_DEBUG_IOCTL 0x04
57 #define SRAM_DEBUG_DONTDOIT 0x08
58 int sramdebug = SRAM_DEBUG_IOCTL;
59 #define DPRINTF(flag, msg) do { \
60 if ((sramdebug & (flag))) \
61 printf msg; \
62 } while (0)
63 #else
64 #define DPRINTF(flag, msg) /* nothing */
65 #endif
66
67 int srammatch(device_t, cfdata_t, void *);
68 void sramattach(device_t, device_t, void *);
69
70 dev_type_open(sramopen);
71 dev_type_close(sramclose);
72 dev_type_ioctl(sramioctl);
73
74 CFATTACH_DECL_NEW(sram, sizeof(struct sram_softc),
75 srammatch, sramattach, NULL, NULL);
76
77 const struct cdevsw sram_cdevsw = {
78 .d_open = sramopen,
79 .d_close = sramclose,
80 .d_read = noread,
81 .d_write = nowrite,
82 .d_ioctl = sramioctl,
83 .d_stop = nostop,
84 .d_tty = notty,
85 .d_poll = nopoll,
86 .d_mmap = nommap,
87 .d_kqfilter = nokqfilter,
88 .d_discard = nodiscard,
89 .d_flag = 0
90 };
91
92 static int sram_attached;
93
94 /*
95 * functions for probing.
96 */
97 int
srammatch(device_t parent,cfdata_t cf,void * aux)98 srammatch(device_t parent, cfdata_t cf, void *aux)
99 {
100 struct intio_attach_args *ia = aux;
101
102 if (sram_attached)
103 return 0;
104
105 if (ia->ia_addr == INTIOCF_ADDR_DEFAULT)
106 ia->ia_addr = SRAM_ADDR;
107
108 /* Fixed parameter */
109 if (ia->ia_addr != SRAM_ADDR)
110 return 0;
111
112 return 1;
113 }
114
115 void
sramattach(device_t parent,device_t self,void * aux)116 sramattach(device_t parent, device_t self, void *aux)
117 {
118 struct sram_softc *sc = device_private(self);
119 struct intio_attach_args *ia = aux;
120 bus_space_tag_t iot;
121 bus_space_handle_t ioh;
122
123 /* Map I/O space */
124 iot = ia->ia_bst;
125 if (bus_space_map(iot, ia->ia_addr, SRAM_SIZE, 0, &ioh))
126 goto out;
127
128 /* Initialize sc */
129 sc->sc_iot = iot;
130 sc->sc_ioh = ioh;
131
132 sc->sc_flags = 0;
133 aprint_normal(": 16k bytes accessible\n");
134 sram_attached = 1;
135 return;
136
137 out:
138 aprint_normal(": not accessible\n");
139 }
140
141
142 /*ARGSUSED*/
143 int
sramopen(dev_t dev,int flags,int mode,struct lwp * l)144 sramopen(dev_t dev, int flags, int mode, struct lwp *l)
145 {
146 struct sram_softc *sc;
147
148 DPRINTF(SRAM_DEBUG_OPEN, ("Sram open\n"));
149
150 sc = device_lookup_private(&sram_cd, minor(dev));
151 if (sc == NULL)
152 return ENXIO;
153
154 if (sc->sc_flags & SRF_OPEN)
155 return EBUSY;
156
157 sc->sc_flags |= SRF_OPEN;
158 if (flags & FREAD)
159 sc->sc_flags |= SRF_READ;
160 if (flags & FWRITE)
161 sc->sc_flags |= SRF_WRITE;
162
163 return 0;
164 }
165
166 /*ARGSUSED*/
167 int
sramclose(dev_t dev,int flags,int mode,struct lwp * l)168 sramclose(dev_t dev, int flags, int mode, struct lwp *l)
169 {
170 struct sram_softc *sc;
171
172 DPRINTF(SRAM_DEBUG_CLOSE, ("Sram close\n"));
173
174 sc = device_lookup_private(&sram_cd, minor(dev));
175 if (sc == NULL)
176 return ENXIO;
177
178 if (sc->sc_flags & SRF_OPEN) {
179 sc->sc_flags = 0;
180 }
181 sc->sc_flags &= ~(SRF_READ|SRF_WRITE);
182
183 return 0;
184 }
185
186 /*ARGSUSED*/
187 int
sramioctl(dev_t dev,u_long cmd,void * data,int flag,struct lwp * l)188 sramioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l)
189 {
190 int error = 0;
191 struct sram_io *sram_io;
192 struct sram_softc *sc;
193
194 DPRINTF(SRAM_DEBUG_IOCTL, ("Sram ioctl cmd=%lx\n", cmd));
195
196 sc = device_lookup_private(&sram_cd, minor(dev));
197 if (sc == NULL)
198 return ENXIO;
199
200 sram_io = (struct sram_io *)data;
201 if (sram_io == NULL)
202 return EFAULT;
203
204 switch (cmd) {
205 case SIOGSRAM:
206 if ((sc->sc_flags & SRF_READ) == 0)
207 return EPERM;
208 DPRINTF(SRAM_DEBUG_IOCTL,
209 ("Sram ioctl SIOGSRAM address=%p\n", data));
210 DPRINTF(SRAM_DEBUG_IOCTL,
211 ("Sram ioctl SIOGSRAM offset=%x\n", sram_io->offset));
212 if (sram_io->offset + SRAM_IO_SIZE > SRAM_SIZE)
213 return EFAULT;
214 bus_space_read_region_1(sc->sc_iot, sc->sc_ioh, sram_io->offset,
215 (uint8_t *)&sram_io->sram, SRAM_IO_SIZE);
216 break;
217 case SIOPSRAM:
218 if ((sc->sc_flags & SRF_WRITE) == 0)
219 return EPERM;
220 DPRINTF(SRAM_DEBUG_IOCTL,
221 ("Sram ioctl SIOPSRAM address=%p\n", data));
222 DPRINTF(SRAM_DEBUG_IOCTL,
223 ("Sram ioctl SIOPSRAM offset=%x\n", sram_io->offset));
224 if (sram_io->offset + SRAM_IO_SIZE > SRAM_SIZE)
225 return EFAULT;
226 #ifdef DEBUG
227 if (sramdebug & SRAM_DEBUG_DONTDOIT) {
228 printf("Sram ioctl SIOPSRAM: skipping actual write\n");
229 break;
230 }
231 #endif
232 intio_set_sysport_sramwp(0x31);
233 bus_space_write_region_1(sc->sc_iot, sc->sc_ioh,
234 sram_io->offset, (uint8_t *)&sram_io->sram,
235 SRAM_IO_SIZE);
236 intio_set_sysport_sramwp(0x00);
237 break;
238 default:
239 error = EINVAL;
240 break;
241 }
242 return error;
243 }
244