1/ { 2 #address-cells = <1>; 3 #size-cells = <1>; 4 compatible = "ralink,rt2880-soc"; 5 6 cpus { 7 cpu@0 { 8 compatible = "mips,mips4KEc"; 9 }; 10 }; 11 12 chosen { 13 bootargs = "console=ttyS0,57600"; 14 }; 15 16 aliases { 17 serial0 = &uartlite; 18 }; 19 20 cpuintc: cpuintc@0 { 21 #address-cells = <0>; 22 #interrupt-cells = <1>; 23 interrupt-controller; 24 compatible = "mti,cpu-interrupt-controller"; 25 }; 26 27 palmbus: palmbus@300000 { 28 compatible = "palmbus"; 29 reg = <0x300000 0x200000>; 30 ranges = <0x0 0x300000 0x1FFFFF>; 31 32 #address-cells = <1>; 33 #size-cells = <1>; 34 35 sysc: sysc@0 { 36 compatible = "ralink,rt2880-sysc"; 37 reg = <0x000 0x100>; 38 }; 39 40 timer: timer@100 { 41 compatible = "ralink,rt2880-timer"; 42 reg = <0x100 0x20>; 43 44 interrupt-parent = <&intc>; 45 interrupts = <1>; 46 47 status = "disabled"; 48 }; 49 50 watchdog: watchdog@120 { 51 compatible = "ralink,rt2880-wdt"; 52 reg = <0x120 0x10>; 53 }; 54 55 intc: intc@200 { 56 compatible = "ralink,rt2880-intc"; 57 reg = <0x200 0x100>; 58 59 interrupt-controller; 60 #interrupt-cells = <1>; 61 62 interrupt-parent = <&cpuintc>; 63 interrupts = <2>; 64 }; 65 66 memc: memc@300 { 67 compatible = "ralink,rt2880-memc"; 68 reg = <0x300 0x100>; 69 }; 70 71 gpio0: gpio@600 { 72 compatible = "ralink,rt2880-gpio"; 73 reg = <0x600 0x34>; 74 75 gpio-controller; 76 #gpio-cells = <2>; 77 78 ralink,gpio-base = <0>; 79 ralink,num-gpios = <24>; 80 ralink,register-map = [ 00 04 08 0c 81 20 24 28 2c 82 30 34 ]; 83 84 interrupt-parent = <&intc>; 85 interrupts = <7>; 86 }; 87 88 gpio1: gpio@638 { 89 compatible = "ralink,rt2880-gpio"; 90 reg = <0x638 0x24>; 91 92 gpio-controller; 93 #gpio-cells = <2>; 94 95 ralink,gpio-base = <24>; 96 ralink,num-gpios = <16>; 97 ralink,register-map = [ 00 04 08 0c 98 10 14 18 1c 99 20 24 ]; 100 101 status = "disabled"; 102 }; 103 104 gpio2: gpio@660 { 105 compatible = "ralink,rt2880-gpio"; 106 reg = <0x660 0x24>; 107 108 gpio-controller; 109 #gpio-cells = <2>; 110 111 ralink,gpio-base = <40>; 112 ralink,num-gpios = <32>; 113 ralink,register-map = [ 00 04 08 0c 114 10 14 18 1c 115 20 24 ]; 116 117 status = "disabled"; 118 }; 119 120 uartlite: uartlite@c00 { 121 compatible = "ralink,rt2880-uart", "ns16550a"; 122 reg = <0xc00 0x100>; 123 124 interrupt-parent = <&intc>; 125 interrupts = <8>; 126 127 reg-shift = <2>; 128 }; 129 }; 130 131 pinctrl: pinctrl { 132 compatible = "ralink,rt2880-pinmux"; 133 134 pinctrl-names = "default"; 135 pinctrl-0 = <&state_default>; 136 137 state_default: pinctrl0 { 138 sdram { 139 ralink,group = "sdram"; 140 ralink,function = "sdram"; 141 }; 142 }; 143 144 spi_pins: spi { 145 spi { 146 ralink,group = "spi"; 147 ralink,function = "spi"; 148 }; 149 }; 150 151 uartlite_pins: uartlite { 152 uart { 153 ralink,group = "uartlite"; 154 ralink,function = "uartlite"; 155 }; 156 }; 157 }; 158 159 rstctrl: rstctrl { 160 compatible = "ralink,rt2880-reset"; 161 #reset-cells = <1>; 162 }; 163 164 clkctrl: clkctrl { 165 compatible = "ralink,rt2880-clock"; 166 #clock-cells = <1>; 167 }; 168 169 ethernet: ethernet@400000 { 170 compatible = "ralink,rt2880-eth"; 171 reg = <0x00400000 0x10000>; 172 173 #address-cells = <1>; 174 #size-cells = <0>; 175 176 resets = <&rstctrl 18>; 177 reset-names = "fe"; 178 179 interrupt-parent = <&cpuintc>; 180 interrupts = <5>; 181 182 status = "disabled"; 183 184 port@0 { 185 compatible = "ralink,rt2880-port", "mediatek,eth-port"; 186 reg = <0>; 187 }; 188 }; 189 190 mdio-bus { 191 compatible = "ralink,rt2880-mdio"; 192 reg = <0x00400000 0x10000>; 193 #address-cells = <1>; 194 #size-cells = <0>; 195 }; 196 197 wmac: wmac@480000 { 198 compatible = "ralink,rt2880-wmac"; 199 reg = <0x480000 0x40000>; 200 201 interrupt-parent = <&cpuintc>; 202 interrupts = <6>; 203 204 ralink,eeprom = "soc_wmac.eeprom"; 205 }; 206}; 207