1 /* Target-dependent code for GNU/Linux on MIPS processors.
2
3 Copyright (C) 2001-2024 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20 #include "extract-store-integer.h"
21 #include "gdbcore.h"
22 #include "target.h"
23 #include "solib-svr4.h"
24 #include "osabi.h"
25 #include "mips-tdep.h"
26 #include "frame.h"
27 #include "regcache.h"
28 #include "trad-frame.h"
29 #include "tramp-frame.h"
30 #include "gdbtypes.h"
31 #include "objfiles.h"
32 #include "solib.h"
33 #include "solist.h"
34 #include "symtab.h"
35 #include "target-descriptions.h"
36 #include "regset.h"
37 #include "mips-linux-tdep.h"
38 #include "glibc-tdep.h"
39 #include "linux-tdep.h"
40 #include "xml-syscall.h"
41 #include "gdbsupport/gdb_signals.h"
42 #include "inferior.h"
43
44 #include "features/mips-linux.c"
45 #include "features/mips-dsp-linux.c"
46 #include "features/mips64-linux.c"
47 #include "features/mips64-dsp-linux.c"
48
49 static solib_ops mips_svr4_so_ops;
50
51 /* This enum represents the signals' numbers on the MIPS
52 architecture. It just contains the signal definitions which are
53 different from the generic implementation.
54
55 It is derived from the file <arch/mips/include/uapi/asm/signal.h>,
56 from the Linux kernel tree. */
57
58 enum
59 {
60 MIPS_LINUX_SIGEMT = 7,
61 MIPS_LINUX_SIGBUS = 10,
62 MIPS_LINUX_SIGSYS = 12,
63 MIPS_LINUX_SIGUSR1 = 16,
64 MIPS_LINUX_SIGUSR2 = 17,
65 MIPS_LINUX_SIGCHLD = 18,
66 MIPS_LINUX_SIGCLD = MIPS_LINUX_SIGCHLD,
67 MIPS_LINUX_SIGPWR = 19,
68 MIPS_LINUX_SIGWINCH = 20,
69 MIPS_LINUX_SIGURG = 21,
70 MIPS_LINUX_SIGIO = 22,
71 MIPS_LINUX_SIGPOLL = MIPS_LINUX_SIGIO,
72 MIPS_LINUX_SIGSTOP = 23,
73 MIPS_LINUX_SIGTSTP = 24,
74 MIPS_LINUX_SIGCONT = 25,
75 MIPS_LINUX_SIGTTIN = 26,
76 MIPS_LINUX_SIGTTOU = 27,
77 MIPS_LINUX_SIGVTALRM = 28,
78 MIPS_LINUX_SIGPROF = 29,
79 MIPS_LINUX_SIGXCPU = 30,
80 MIPS_LINUX_SIGXFSZ = 31,
81
82 MIPS_LINUX_SIGRTMIN = 32,
83 MIPS_LINUX_SIGRT64 = 64,
84 MIPS_LINUX_SIGRTMAX = 127,
85 };
86
87 /* Figure out where the longjmp will land.
88 We expect the first arg to be a pointer to the jmp_buf structure
89 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
90 at. The pc is copied into PC. This routine returns 1 on
91 success. */
92
93 #define MIPS_LINUX_JB_ELEMENT_SIZE 4
94 #define MIPS_LINUX_JB_PC 0
95
96 static int
mips_linux_get_longjmp_target(const frame_info_ptr & frame,CORE_ADDR * pc)97 mips_linux_get_longjmp_target (const frame_info_ptr &frame, CORE_ADDR *pc)
98 {
99 CORE_ADDR jb_addr;
100 struct gdbarch *gdbarch = get_frame_arch (frame);
101 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
102 gdb_byte buf[gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT];
103
104 jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
105
106 if (target_read_memory ((jb_addr
107 + MIPS_LINUX_JB_PC * MIPS_LINUX_JB_ELEMENT_SIZE),
108 buf, gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT))
109 return 0;
110
111 *pc = extract_unsigned_integer (buf,
112 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT,
113 byte_order);
114
115 return 1;
116 }
117
118 /* Transform the bits comprising a 32-bit register to the right size
119 for regcache_raw_supply(). This is needed when mips_isa_regsize()
120 is 8. */
121
122 static void
supply_32bit_reg(struct regcache * regcache,int regnum,const void * addr)123 supply_32bit_reg (struct regcache *regcache, int regnum, const void *addr)
124 {
125 regcache->raw_supply_integer (regnum, (const gdb_byte *) addr, 4, true);
126 }
127
128 /* Unpack an elf_gregset_t into GDB's register cache. */
129
130 void
mips_supply_gregset(struct regcache * regcache,const mips_elf_gregset_t * gregsetp)131 mips_supply_gregset (struct regcache *regcache,
132 const mips_elf_gregset_t *gregsetp)
133 {
134 int regi;
135 const mips_elf_greg_t *regp = *gregsetp;
136 struct gdbarch *gdbarch = regcache->arch ();
137
138 for (regi = EF_REG0 + 1; regi <= EF_REG31; regi++)
139 supply_32bit_reg (regcache, regi - EF_REG0, regp + regi);
140
141 if (mips_linux_restart_reg_p (gdbarch))
142 supply_32bit_reg (regcache, MIPS_RESTART_REGNUM, regp + EF_REG0);
143
144 supply_32bit_reg (regcache, mips_regnum (gdbarch)->lo, regp + EF_LO);
145 supply_32bit_reg (regcache, mips_regnum (gdbarch)->hi, regp + EF_HI);
146
147 supply_32bit_reg (regcache, mips_regnum (gdbarch)->pc,
148 regp + EF_CP0_EPC);
149 supply_32bit_reg (regcache, mips_regnum (gdbarch)->badvaddr,
150 regp + EF_CP0_BADVADDR);
151 supply_32bit_reg (regcache, MIPS_PS_REGNUM, regp + EF_CP0_STATUS);
152 supply_32bit_reg (regcache, mips_regnum (gdbarch)->cause,
153 regp + EF_CP0_CAUSE);
154
155 /* Fill the inaccessible zero register with zero. */
156 regcache->raw_supply_zeroed (MIPS_ZERO_REGNUM);
157 }
158
159 static void
mips_supply_gregset_wrapper(const struct regset * regset,struct regcache * regcache,int regnum,const void * gregs,size_t len)160 mips_supply_gregset_wrapper (const struct regset *regset,
161 struct regcache *regcache,
162 int regnum, const void *gregs, size_t len)
163 {
164 gdb_assert (len >= sizeof (mips_elf_gregset_t));
165
166 mips_supply_gregset (regcache, (const mips_elf_gregset_t *)gregs);
167 }
168
169 /* Pack our registers (or one register) into an elf_gregset_t. */
170
171 void
mips_fill_gregset(const struct regcache * regcache,mips_elf_gregset_t * gregsetp,int regno)172 mips_fill_gregset (const struct regcache *regcache,
173 mips_elf_gregset_t *gregsetp, int regno)
174 {
175 struct gdbarch *gdbarch = regcache->arch ();
176 int regaddr, regi;
177 mips_elf_greg_t *regp = *gregsetp;
178 void *dst;
179
180 if (regno == -1)
181 {
182 memset (regp, 0, sizeof (mips_elf_gregset_t));
183 for (regi = 1; regi < 32; regi++)
184 mips_fill_gregset (regcache, gregsetp, regi);
185 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->lo);
186 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->hi);
187 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->pc);
188 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->badvaddr);
189 mips_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM);
190 mips_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->cause);
191 mips_fill_gregset (regcache, gregsetp, MIPS_RESTART_REGNUM);
192 return;
193 }
194
195 if (regno > 0 && regno < 32)
196 {
197 dst = regp + regno + EF_REG0;
198 regcache->raw_collect (regno, dst);
199 return;
200 }
201
202 if (regno == mips_regnum (gdbarch)->lo)
203 regaddr = EF_LO;
204 else if (regno == mips_regnum (gdbarch)->hi)
205 regaddr = EF_HI;
206 else if (regno == mips_regnum (gdbarch)->pc)
207 regaddr = EF_CP0_EPC;
208 else if (regno == mips_regnum (gdbarch)->badvaddr)
209 regaddr = EF_CP0_BADVADDR;
210 else if (regno == MIPS_PS_REGNUM)
211 regaddr = EF_CP0_STATUS;
212 else if (regno == mips_regnum (gdbarch)->cause)
213 regaddr = EF_CP0_CAUSE;
214 else if (mips_linux_restart_reg_p (gdbarch)
215 && regno == MIPS_RESTART_REGNUM)
216 regaddr = EF_REG0;
217 else
218 regaddr = -1;
219
220 if (regaddr != -1)
221 {
222 dst = regp + regaddr;
223 regcache->raw_collect (regno, dst);
224 }
225 }
226
227 static void
mips_fill_gregset_wrapper(const struct regset * regset,const struct regcache * regcache,int regnum,void * gregs,size_t len)228 mips_fill_gregset_wrapper (const struct regset *regset,
229 const struct regcache *regcache,
230 int regnum, void *gregs, size_t len)
231 {
232 gdb_assert (len >= sizeof (mips_elf_gregset_t));
233
234 mips_fill_gregset (regcache, (mips_elf_gregset_t *)gregs, regnum);
235 }
236
237 /* Support for 64-bit ABIs. */
238
239 /* Figure out where the longjmp will land.
240 We expect the first arg to be a pointer to the jmp_buf structure
241 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
242 at. The pc is copied into PC. This routine returns 1 on
243 success. */
244
245 /* Details about jmp_buf. */
246
247 #define MIPS64_LINUX_JB_PC 0
248
249 static int
mips64_linux_get_longjmp_target(const frame_info_ptr & frame,CORE_ADDR * pc)250 mips64_linux_get_longjmp_target (const frame_info_ptr &frame, CORE_ADDR *pc)
251 {
252 CORE_ADDR jb_addr;
253 struct gdbarch *gdbarch = get_frame_arch (frame);
254 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
255 gdb_byte *buf
256 = (gdb_byte *) alloca (gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT);
257 int element_size = gdbarch_ptr_bit (gdbarch) == 32 ? 4 : 8;
258
259 jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
260
261 if (target_read_memory (jb_addr + MIPS64_LINUX_JB_PC * element_size,
262 buf,
263 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT))
264 return 0;
265
266 *pc = extract_unsigned_integer (buf,
267 gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT,
268 byte_order);
269
270 return 1;
271 }
272
273 /* Register set support functions. These operate on standard 64-bit
274 regsets, but work whether the target is 32-bit or 64-bit. A 32-bit
275 target will still use the 64-bit format for PTRACE_GETREGS. */
276
277 /* Supply a 64-bit register. */
278
279 static void
supply_64bit_reg(struct regcache * regcache,int regnum,const gdb_byte * buf)280 supply_64bit_reg (struct regcache *regcache, int regnum,
281 const gdb_byte *buf)
282 {
283 struct gdbarch *gdbarch = regcache->arch ();
284 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG
285 && register_size (gdbarch, regnum) == 4)
286 regcache->raw_supply (regnum, buf + 4);
287 else
288 regcache->raw_supply (regnum, buf);
289 }
290
291 /* Unpack a 64-bit elf_gregset_t into GDB's register cache. */
292
293 void
mips64_supply_gregset(struct regcache * regcache,const mips64_elf_gregset_t * gregsetp)294 mips64_supply_gregset (struct regcache *regcache,
295 const mips64_elf_gregset_t *gregsetp)
296 {
297 int regi;
298 const mips64_elf_greg_t *regp = *gregsetp;
299 struct gdbarch *gdbarch = regcache->arch ();
300
301 for (regi = MIPS64_EF_REG0 + 1; regi <= MIPS64_EF_REG31; regi++)
302 supply_64bit_reg (regcache, regi - MIPS64_EF_REG0,
303 (const gdb_byte *) (regp + regi));
304
305 if (mips_linux_restart_reg_p (gdbarch))
306 supply_64bit_reg (regcache, MIPS_RESTART_REGNUM,
307 (const gdb_byte *) (regp + MIPS64_EF_REG0));
308
309 supply_64bit_reg (regcache, mips_regnum (gdbarch)->lo,
310 (const gdb_byte *) (regp + MIPS64_EF_LO));
311 supply_64bit_reg (regcache, mips_regnum (gdbarch)->hi,
312 (const gdb_byte *) (regp + MIPS64_EF_HI));
313
314 supply_64bit_reg (regcache, mips_regnum (gdbarch)->pc,
315 (const gdb_byte *) (regp + MIPS64_EF_CP0_EPC));
316 supply_64bit_reg (regcache, mips_regnum (gdbarch)->badvaddr,
317 (const gdb_byte *) (regp + MIPS64_EF_CP0_BADVADDR));
318 supply_64bit_reg (regcache, MIPS_PS_REGNUM,
319 (const gdb_byte *) (regp + MIPS64_EF_CP0_STATUS));
320 supply_64bit_reg (regcache, mips_regnum (gdbarch)->cause,
321 (const gdb_byte *) (regp + MIPS64_EF_CP0_CAUSE));
322
323 /* Fill the inaccessible zero register with zero. */
324 regcache->raw_supply_zeroed (MIPS_ZERO_REGNUM);
325 }
326
327 static void
mips64_supply_gregset_wrapper(const struct regset * regset,struct regcache * regcache,int regnum,const void * gregs,size_t len)328 mips64_supply_gregset_wrapper (const struct regset *regset,
329 struct regcache *regcache,
330 int regnum, const void *gregs, size_t len)
331 {
332 gdb_assert (len >= sizeof (mips64_elf_gregset_t));
333
334 mips64_supply_gregset (regcache, (const mips64_elf_gregset_t *)gregs);
335 }
336
337 /* Pack our registers (or one register) into a 64-bit elf_gregset_t. */
338
339 void
mips64_fill_gregset(const struct regcache * regcache,mips64_elf_gregset_t * gregsetp,int regno)340 mips64_fill_gregset (const struct regcache *regcache,
341 mips64_elf_gregset_t *gregsetp, int regno)
342 {
343 struct gdbarch *gdbarch = regcache->arch ();
344 int regaddr, regi;
345 mips64_elf_greg_t *regp = *gregsetp;
346 void *dst;
347
348 if (regno == -1)
349 {
350 memset (regp, 0, sizeof (mips64_elf_gregset_t));
351 for (regi = 1; regi < 32; regi++)
352 mips64_fill_gregset (regcache, gregsetp, regi);
353 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->lo);
354 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->hi);
355 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->pc);
356 mips64_fill_gregset (regcache, gregsetp,
357 mips_regnum (gdbarch)->badvaddr);
358 mips64_fill_gregset (regcache, gregsetp, MIPS_PS_REGNUM);
359 mips64_fill_gregset (regcache, gregsetp, mips_regnum (gdbarch)->cause);
360 mips64_fill_gregset (regcache, gregsetp, MIPS_RESTART_REGNUM);
361 return;
362 }
363
364 if (regno > 0 && regno < 32)
365 regaddr = regno + MIPS64_EF_REG0;
366 else if (regno == mips_regnum (gdbarch)->lo)
367 regaddr = MIPS64_EF_LO;
368 else if (regno == mips_regnum (gdbarch)->hi)
369 regaddr = MIPS64_EF_HI;
370 else if (regno == mips_regnum (gdbarch)->pc)
371 regaddr = MIPS64_EF_CP0_EPC;
372 else if (regno == mips_regnum (gdbarch)->badvaddr)
373 regaddr = MIPS64_EF_CP0_BADVADDR;
374 else if (regno == MIPS_PS_REGNUM)
375 regaddr = MIPS64_EF_CP0_STATUS;
376 else if (regno == mips_regnum (gdbarch)->cause)
377 regaddr = MIPS64_EF_CP0_CAUSE;
378 else if (mips_linux_restart_reg_p (gdbarch)
379 && regno == MIPS_RESTART_REGNUM)
380 regaddr = MIPS64_EF_REG0;
381 else
382 regaddr = -1;
383
384 if (regaddr != -1)
385 {
386 dst = regp + regaddr;
387 regcache->raw_collect_integer (regno, (gdb_byte *) dst, 8, true);
388 }
389 }
390
391 static void
mips64_fill_gregset_wrapper(const struct regset * regset,const struct regcache * regcache,int regnum,void * gregs,size_t len)392 mips64_fill_gregset_wrapper (const struct regset *regset,
393 const struct regcache *regcache,
394 int regnum, void *gregs, size_t len)
395 {
396 gdb_assert (len >= sizeof (mips64_elf_gregset_t));
397
398 mips64_fill_gregset (regcache, (mips64_elf_gregset_t *)gregs, regnum);
399 }
400
401 /* Likewise, unpack an elf_fpregset_t. Linux only uses even-numbered
402 FPR slots in the Status.FR=0 mode, storing even-odd FPR pairs as the
403 SDC1 instruction would. When run on MIPS I architecture processors
404 all FPR slots used to be used, unusually, holding the respective FPRs
405 in the first 4 bytes, but that was corrected for consistency, with
406 `linux-mips.org' (LMO) commit 42533948caac ("Major pile of FP emulator
407 changes."), the fix corrected with LMO commit 849fa7a50dff ("R3k FPU
408 ptrace() handling fixes."), and then broken and fixed over and over
409 again, until last time fixed with commit 80cbfad79096 ("MIPS: Correct
410 MIPS I FP context layout"). */
411
412 void
mips64_supply_fpregset(struct regcache * regcache,const mips64_elf_fpregset_t * fpregsetp)413 mips64_supply_fpregset (struct regcache *regcache,
414 const mips64_elf_fpregset_t *fpregsetp)
415 {
416 struct gdbarch *gdbarch = regcache->arch ();
417 int regi;
418
419 if (register_size (gdbarch, gdbarch_fp0_regnum (gdbarch)) == 4)
420 for (regi = 0; regi < 32; regi++)
421 {
422 const gdb_byte *reg_ptr
423 = (const gdb_byte *) (*fpregsetp + (regi & ~1));
424 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (regi & 1))
425 reg_ptr += 4;
426 regcache->raw_supply (gdbarch_fp0_regnum (gdbarch) + regi, reg_ptr);
427 }
428 else
429 for (regi = 0; regi < 32; regi++)
430 regcache->raw_supply (gdbarch_fp0_regnum (gdbarch) + regi,
431 (const char *) (*fpregsetp + regi));
432
433 supply_32bit_reg (regcache, mips_regnum (gdbarch)->fp_control_status,
434 (const gdb_byte *) (*fpregsetp + 32));
435
436 /* The ABI doesn't tell us how to supply FCRIR, and core dumps don't
437 include it - but the result of PTRACE_GETFPREGS does. The best we
438 can do is to assume that its value is present. */
439 supply_32bit_reg (regcache,
440 mips_regnum (gdbarch)->fp_implementation_revision,
441 (const gdb_byte *) (*fpregsetp + 32) + 4);
442 }
443
444 static void
mips64_supply_fpregset_wrapper(const struct regset * regset,struct regcache * regcache,int regnum,const void * gregs,size_t len)445 mips64_supply_fpregset_wrapper (const struct regset *regset,
446 struct regcache *regcache,
447 int regnum, const void *gregs, size_t len)
448 {
449 gdb_assert (len >= sizeof (mips64_elf_fpregset_t));
450
451 mips64_supply_fpregset (regcache, (const mips64_elf_fpregset_t *)gregs);
452 }
453
454 /* Likewise, pack one or all floating point registers into an
455 elf_fpregset_t. See `mips_supply_fpregset' for an explanation
456 of the layout. */
457
458 void
mips64_fill_fpregset(const struct regcache * regcache,mips64_elf_fpregset_t * fpregsetp,int regno)459 mips64_fill_fpregset (const struct regcache *regcache,
460 mips64_elf_fpregset_t *fpregsetp, int regno)
461 {
462 struct gdbarch *gdbarch = regcache->arch ();
463 gdb_byte *to;
464
465 if ((regno >= gdbarch_fp0_regnum (gdbarch))
466 && (regno < gdbarch_fp0_regnum (gdbarch) + 32))
467 {
468 if (register_size (gdbarch, regno) == 4)
469 {
470 int regi = regno - gdbarch_fp0_regnum (gdbarch);
471
472 to = (gdb_byte *) (*fpregsetp + (regi & ~1));
473 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (regi & 1))
474 to += 4;
475 regcache->raw_collect (regno, to);
476 }
477 else
478 {
479 to = (gdb_byte *) (*fpregsetp + regno
480 - gdbarch_fp0_regnum (gdbarch));
481 regcache->raw_collect (regno, to);
482 }
483 }
484 else if (regno == mips_regnum (gdbarch)->fp_control_status)
485 {
486 to = (gdb_byte *) (*fpregsetp + 32);
487 regcache->raw_collect_integer (regno, to, 4, true);
488 }
489 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
490 {
491 to = (gdb_byte *) (*fpregsetp + 32) + 4;
492 regcache->raw_collect_integer (regno, to, 4, true);
493 }
494 else if (regno == -1)
495 {
496 int regi;
497
498 for (regi = 0; regi < 32; regi++)
499 mips64_fill_fpregset (regcache, fpregsetp,
500 gdbarch_fp0_regnum (gdbarch) + regi);
501 mips64_fill_fpregset (regcache, fpregsetp,
502 mips_regnum (gdbarch)->fp_control_status);
503 mips64_fill_fpregset (regcache, fpregsetp,
504 mips_regnum (gdbarch)->fp_implementation_revision);
505 }
506 }
507
508 static void
mips64_fill_fpregset_wrapper(const struct regset * regset,const struct regcache * regcache,int regnum,void * gregs,size_t len)509 mips64_fill_fpregset_wrapper (const struct regset *regset,
510 const struct regcache *regcache,
511 int regnum, void *gregs, size_t len)
512 {
513 gdb_assert (len >= sizeof (mips64_elf_fpregset_t));
514
515 mips64_fill_fpregset (regcache, (mips64_elf_fpregset_t *)gregs, regnum);
516 }
517
518 static const struct regset mips_linux_gregset =
519 {
520 NULL, mips_supply_gregset_wrapper, mips_fill_gregset_wrapper
521 };
522
523 static const struct regset mips64_linux_gregset =
524 {
525 NULL, mips64_supply_gregset_wrapper, mips64_fill_gregset_wrapper
526 };
527
528 static const struct regset mips64_linux_fpregset =
529 {
530 NULL, mips64_supply_fpregset_wrapper, mips64_fill_fpregset_wrapper
531 };
532
533 static void
mips_linux_iterate_over_regset_sections(struct gdbarch * gdbarch,iterate_over_regset_sections_cb * cb,void * cb_data,const struct regcache * regcache)534 mips_linux_iterate_over_regset_sections (struct gdbarch *gdbarch,
535 iterate_over_regset_sections_cb *cb,
536 void *cb_data,
537 const struct regcache *regcache)
538 {
539 if (register_size (gdbarch, MIPS_ZERO_REGNUM) == 4)
540 {
541 cb (".reg", sizeof (mips_elf_gregset_t), sizeof (mips_elf_gregset_t),
542 &mips_linux_gregset, NULL, cb_data);
543 cb (".reg2", sizeof (mips64_elf_fpregset_t),
544 sizeof (mips64_elf_fpregset_t), &mips64_linux_fpregset,
545 NULL, cb_data);
546 }
547 else
548 {
549 cb (".reg", sizeof (mips64_elf_gregset_t), sizeof (mips64_elf_gregset_t),
550 &mips64_linux_gregset, NULL, cb_data);
551 cb (".reg2", sizeof (mips64_elf_fpregset_t),
552 sizeof (mips64_elf_fpregset_t), &mips64_linux_fpregset,
553 NULL, cb_data);
554 }
555 }
556
557 static const struct target_desc *
mips_linux_core_read_description(struct gdbarch * gdbarch,struct target_ops * target,bfd * abfd)558 mips_linux_core_read_description (struct gdbarch *gdbarch,
559 struct target_ops *target,
560 bfd *abfd)
561 {
562 asection *section = bfd_get_section_by_name (abfd, ".reg");
563 if (! section)
564 return NULL;
565
566 switch (bfd_section_size (section))
567 {
568 case sizeof (mips_elf_gregset_t):
569 return mips_tdesc_gp32;
570
571 case sizeof (mips64_elf_gregset_t):
572 return mips_tdesc_gp64;
573
574 default:
575 return NULL;
576 }
577 }
578
579
580 /* Check the code at PC for a dynamic linker lazy resolution stub.
581 GNU ld for MIPS has put lazy resolution stubs into a ".MIPS.stubs"
582 section uniformly since version 2.15. If the pc is in that section,
583 then we are in such a stub. Before that ".stub" was used in 32-bit
584 ELF binaries, however we do not bother checking for that since we
585 have never had and that case should be extremely rare these days.
586 Instead we pattern-match on the code generated by GNU ld. They look
587 like this:
588
589 lw t9,0x8010(gp)
590 addu t7,ra
591 jalr t9,ra
592 addiu t8,zero,INDEX
593
594 (with the appropriate doubleword instructions for N64). As any lazy
595 resolution stubs in microMIPS binaries will always be in a
596 ".MIPS.stubs" section we only ever verify standard MIPS patterns. */
597
598 static int
mips_linux_in_dynsym_stub(CORE_ADDR pc)599 mips_linux_in_dynsym_stub (CORE_ADDR pc)
600 {
601 gdb_byte buf[28], *p;
602 ULONGEST insn, insn1;
603 int n64 = (mips_abi (current_inferior ()->arch ()) == MIPS_ABI_N64);
604 bfd_endian byte_order = gdbarch_byte_order (current_inferior ()->arch ());
605
606 if (in_mips_stubs_section (pc))
607 return 1;
608
609 read_memory (pc - 12, buf, 28);
610
611 if (n64)
612 {
613 /* ld t9,0x8010(gp) */
614 insn1 = 0xdf998010;
615 }
616 else
617 {
618 /* lw t9,0x8010(gp) */
619 insn1 = 0x8f998010;
620 }
621
622 p = buf + 12;
623 while (p >= buf)
624 {
625 insn = extract_unsigned_integer (p, 4, byte_order);
626 if (insn == insn1)
627 break;
628 p -= 4;
629 }
630 if (p < buf)
631 return 0;
632
633 insn = extract_unsigned_integer (p + 4, 4, byte_order);
634 if (n64)
635 {
636 /* 'daddu t7,ra' or 'or t7, ra, zero'*/
637 if (insn != 0x03e0782d && insn != 0x03e07825)
638 return 0;
639 }
640 else
641 {
642 /* 'addu t7,ra' or 'or t7, ra, zero'*/
643 if (insn != 0x03e07821 && insn != 0x03e07825)
644 return 0;
645 }
646
647 insn = extract_unsigned_integer (p + 8, 4, byte_order);
648 /* jalr t9,ra */
649 if (insn != 0x0320f809)
650 return 0;
651
652 insn = extract_unsigned_integer (p + 12, 4, byte_order);
653 if (n64)
654 {
655 /* daddiu t8,zero,0 */
656 if ((insn & 0xffff0000) != 0x64180000)
657 return 0;
658 }
659 else
660 {
661 /* addiu t8,zero,0 */
662 if ((insn & 0xffff0000) != 0x24180000)
663 return 0;
664 }
665
666 return 1;
667 }
668
669 /* Return non-zero iff PC belongs to the dynamic linker resolution
670 code, a PLT entry, or a lazy binding stub. */
671
672 static int
mips_linux_in_dynsym_resolve_code(CORE_ADDR pc)673 mips_linux_in_dynsym_resolve_code (CORE_ADDR pc)
674 {
675 /* Check whether PC is in the dynamic linker. This also checks
676 whether it is in the .plt section, used by non-PIC executables. */
677 if (svr4_in_dynsym_resolve_code (pc))
678 return 1;
679
680 /* Likewise for the stubs. They live in the .MIPS.stubs section these
681 days, so we check if the PC is within, than fall back to a pattern
682 match. */
683 if (mips_linux_in_dynsym_stub (pc))
684 return 1;
685
686 return 0;
687 }
688
689 /* See the comments for SKIP_SOLIB_RESOLVER at the top of infrun.c,
690 and glibc_skip_solib_resolver in glibc-tdep.c. The normal glibc
691 implementation of this triggers at "fixup" from the same objfile as
692 "_dl_runtime_resolve"; MIPS GNU/Linux can trigger at
693 "__dl_runtime_resolve" directly. An unresolved lazy binding
694 stub will point to _dl_runtime_resolve, which will first call
695 __dl_runtime_resolve, and then pass control to the resolved
696 function. */
697
698 static CORE_ADDR
mips_linux_skip_resolver(struct gdbarch * gdbarch,CORE_ADDR pc)699 mips_linux_skip_resolver (struct gdbarch *gdbarch, CORE_ADDR pc)
700 {
701 struct bound_minimal_symbol resolver;
702
703 resolver = lookup_minimal_symbol ("__dl_runtime_resolve", NULL, NULL);
704
705 if (resolver.minsym && resolver.value_address () == pc)
706 return frame_unwind_caller_pc (get_current_frame ());
707
708 return glibc_skip_solib_resolver (gdbarch, pc);
709 }
710
711 /* Signal trampoline support. There are four supported layouts for a
712 signal frame: o32 sigframe, o32 rt_sigframe, n32 rt_sigframe, and
713 n64 rt_sigframe. We handle them all independently; not the most
714 efficient way, but simplest. First, declare all the unwinders. */
715
716 static void mips_linux_o32_sigframe_init (const struct tramp_frame *self,
717 const frame_info_ptr &this_frame,
718 struct trad_frame_cache *this_cache,
719 CORE_ADDR func);
720
721 static void mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
722 const frame_info_ptr &this_frame,
723 struct trad_frame_cache *this_cache,
724 CORE_ADDR func);
725
726 static int mips_linux_sigframe_validate (const struct tramp_frame *self,
727 const frame_info_ptr &this_frame,
728 CORE_ADDR *pc);
729
730 static int micromips_linux_sigframe_validate (const struct tramp_frame *self,
731 const frame_info_ptr &this_frame,
732 CORE_ADDR *pc);
733
734 #define MIPS_NR_LINUX 4000
735 #define MIPS_NR_N64_LINUX 5000
736 #define MIPS_NR_N32_LINUX 6000
737
738 #define MIPS_NR_sigreturn MIPS_NR_LINUX + 119
739 #define MIPS_NR_rt_sigreturn MIPS_NR_LINUX + 193
740 #define MIPS_NR_N64_rt_sigreturn MIPS_NR_N64_LINUX + 211
741 #define MIPS_NR_N32_rt_sigreturn MIPS_NR_N32_LINUX + 211
742
743 #define MIPS_INST_LI_V0_SIGRETURN 0x24020000 + MIPS_NR_sigreturn
744 #define MIPS_INST_LI_V0_RT_SIGRETURN 0x24020000 + MIPS_NR_rt_sigreturn
745 #define MIPS_INST_LI_V0_N64_RT_SIGRETURN 0x24020000 + MIPS_NR_N64_rt_sigreturn
746 #define MIPS_INST_LI_V0_N32_RT_SIGRETURN 0x24020000 + MIPS_NR_N32_rt_sigreturn
747 #define MIPS_INST_SYSCALL 0x0000000c
748
749 #define MICROMIPS_INST_LI_V0 0x3040
750 #define MICROMIPS_INST_POOL32A 0x0000
751 #define MICROMIPS_INST_SYSCALL 0x8b7c
752
753 static const struct tramp_frame mips_linux_o32_sigframe = {
754 SIGTRAMP_FRAME,
755 4,
756 {
757 { MIPS_INST_LI_V0_SIGRETURN, ULONGEST_MAX },
758 { MIPS_INST_SYSCALL, ULONGEST_MAX },
759 { TRAMP_SENTINEL_INSN, ULONGEST_MAX }
760 },
761 mips_linux_o32_sigframe_init,
762 mips_linux_sigframe_validate
763 };
764
765 static const struct tramp_frame mips_linux_o32_rt_sigframe = {
766 SIGTRAMP_FRAME,
767 4,
768 {
769 { MIPS_INST_LI_V0_RT_SIGRETURN, ULONGEST_MAX },
770 { MIPS_INST_SYSCALL, ULONGEST_MAX },
771 { TRAMP_SENTINEL_INSN, ULONGEST_MAX } },
772 mips_linux_o32_sigframe_init,
773 mips_linux_sigframe_validate
774 };
775
776 static const struct tramp_frame mips_linux_n32_rt_sigframe = {
777 SIGTRAMP_FRAME,
778 4,
779 {
780 { MIPS_INST_LI_V0_N32_RT_SIGRETURN, ULONGEST_MAX },
781 { MIPS_INST_SYSCALL, ULONGEST_MAX },
782 { TRAMP_SENTINEL_INSN, ULONGEST_MAX }
783 },
784 mips_linux_n32n64_sigframe_init,
785 mips_linux_sigframe_validate
786 };
787
788 static const struct tramp_frame mips_linux_n64_rt_sigframe = {
789 SIGTRAMP_FRAME,
790 4,
791 {
792 { MIPS_INST_LI_V0_N64_RT_SIGRETURN, ULONGEST_MAX },
793 { MIPS_INST_SYSCALL, ULONGEST_MAX },
794 { TRAMP_SENTINEL_INSN, ULONGEST_MAX }
795 },
796 mips_linux_n32n64_sigframe_init,
797 mips_linux_sigframe_validate
798 };
799
800 static const struct tramp_frame micromips_linux_o32_sigframe = {
801 SIGTRAMP_FRAME,
802 2,
803 {
804 { MICROMIPS_INST_LI_V0, ULONGEST_MAX },
805 { MIPS_NR_sigreturn, ULONGEST_MAX },
806 { MICROMIPS_INST_POOL32A, ULONGEST_MAX },
807 { MICROMIPS_INST_SYSCALL, ULONGEST_MAX },
808 { TRAMP_SENTINEL_INSN, ULONGEST_MAX }
809 },
810 mips_linux_o32_sigframe_init,
811 micromips_linux_sigframe_validate
812 };
813
814 static const struct tramp_frame micromips_linux_o32_rt_sigframe = {
815 SIGTRAMP_FRAME,
816 2,
817 {
818 { MICROMIPS_INST_LI_V0, ULONGEST_MAX },
819 { MIPS_NR_rt_sigreturn, ULONGEST_MAX },
820 { MICROMIPS_INST_POOL32A, ULONGEST_MAX },
821 { MICROMIPS_INST_SYSCALL, ULONGEST_MAX },
822 { TRAMP_SENTINEL_INSN, ULONGEST_MAX }
823 },
824 mips_linux_o32_sigframe_init,
825 micromips_linux_sigframe_validate
826 };
827
828 static const struct tramp_frame micromips_linux_n32_rt_sigframe = {
829 SIGTRAMP_FRAME,
830 2,
831 {
832 { MICROMIPS_INST_LI_V0, ULONGEST_MAX },
833 { MIPS_NR_N32_rt_sigreturn, ULONGEST_MAX },
834 { MICROMIPS_INST_POOL32A, ULONGEST_MAX },
835 { MICROMIPS_INST_SYSCALL, ULONGEST_MAX },
836 { TRAMP_SENTINEL_INSN, ULONGEST_MAX }
837 },
838 mips_linux_n32n64_sigframe_init,
839 micromips_linux_sigframe_validate
840 };
841
842 static const struct tramp_frame micromips_linux_n64_rt_sigframe = {
843 SIGTRAMP_FRAME,
844 2,
845 {
846 { MICROMIPS_INST_LI_V0, ULONGEST_MAX },
847 { MIPS_NR_N64_rt_sigreturn, ULONGEST_MAX },
848 { MICROMIPS_INST_POOL32A, ULONGEST_MAX },
849 { MICROMIPS_INST_SYSCALL, ULONGEST_MAX },
850 { TRAMP_SENTINEL_INSN, ULONGEST_MAX }
851 },
852 mips_linux_n32n64_sigframe_init,
853 micromips_linux_sigframe_validate
854 };
855
856 /* The unwinder for o32 signal frames. The legacy structures look
857 like this:
858
859 struct sigframe {
860 u32 sf_ass[4]; [argument save space for o32]
861 u32 sf_code[2]; [signal trampoline or fill]
862 struct sigcontext sf_sc;
863 sigset_t sf_mask;
864 };
865
866 Pre-2.6.12 sigcontext:
867
868 struct sigcontext {
869 unsigned int sc_regmask; [Unused]
870 unsigned int sc_status;
871 unsigned long long sc_pc;
872 unsigned long long sc_regs[32];
873 unsigned long long sc_fpregs[32];
874 unsigned int sc_ownedfp;
875 unsigned int sc_fpc_csr;
876 unsigned int sc_fpc_eir; [Unused]
877 unsigned int sc_used_math;
878 unsigned int sc_ssflags; [Unused]
879 [Alignment hole of four bytes]
880 unsigned long long sc_mdhi;
881 unsigned long long sc_mdlo;
882
883 unsigned int sc_cause; [Unused]
884 unsigned int sc_badvaddr; [Unused]
885
886 unsigned long sc_sigset[4]; [kernel's sigset_t]
887 };
888
889 Post-2.6.12 sigcontext (SmartMIPS/DSP support added):
890
891 struct sigcontext {
892 unsigned int sc_regmask; [Unused]
893 unsigned int sc_status; [Unused]
894 unsigned long long sc_pc;
895 unsigned long long sc_regs[32];
896 unsigned long long sc_fpregs[32];
897 unsigned int sc_acx;
898 unsigned int sc_fpc_csr;
899 unsigned int sc_fpc_eir; [Unused]
900 unsigned int sc_used_math;
901 unsigned int sc_dsp;
902 [Alignment hole of four bytes]
903 unsigned long long sc_mdhi;
904 unsigned long long sc_mdlo;
905 unsigned long sc_hi1;
906 unsigned long sc_lo1;
907 unsigned long sc_hi2;
908 unsigned long sc_lo2;
909 unsigned long sc_hi3;
910 unsigned long sc_lo3;
911 };
912
913 The RT signal frames look like this:
914
915 struct rt_sigframe {
916 u32 rs_ass[4]; [argument save space for o32]
917 u32 rs_code[2] [signal trampoline or fill]
918 struct siginfo rs_info;
919 struct ucontext rs_uc;
920 };
921
922 struct ucontext {
923 unsigned long uc_flags;
924 struct ucontext *uc_link;
925 stack_t uc_stack;
926 [Alignment hole of four bytes]
927 struct sigcontext uc_mcontext;
928 sigset_t uc_sigmask;
929 }; */
930
931 #define SIGFRAME_SIGCONTEXT_OFFSET (6 * 4)
932
933 #define RTSIGFRAME_SIGINFO_SIZE 128
934 #define STACK_T_SIZE (3 * 4)
935 #define UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + STACK_T_SIZE + 4)
936 #define RTSIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
937 + RTSIGFRAME_SIGINFO_SIZE \
938 + UCONTEXT_SIGCONTEXT_OFFSET)
939
940 #define SIGCONTEXT_PC (1 * 8)
941 #define SIGCONTEXT_REGS (2 * 8)
942 #define SIGCONTEXT_FPREGS (34 * 8)
943 #define SIGCONTEXT_FPCSR (66 * 8 + 4)
944 #define SIGCONTEXT_DSPCTL (68 * 8 + 0)
945 #define SIGCONTEXT_HI (69 * 8)
946 #define SIGCONTEXT_LO (70 * 8)
947 #define SIGCONTEXT_CAUSE (71 * 8 + 0)
948 #define SIGCONTEXT_BADVADDR (71 * 8 + 4)
949 #define SIGCONTEXT_HI1 (71 * 8 + 0)
950 #define SIGCONTEXT_LO1 (71 * 8 + 4)
951 #define SIGCONTEXT_HI2 (72 * 8 + 0)
952 #define SIGCONTEXT_LO2 (72 * 8 + 4)
953 #define SIGCONTEXT_HI3 (73 * 8 + 0)
954 #define SIGCONTEXT_LO3 (73 * 8 + 4)
955
956 #define SIGCONTEXT_REG_SIZE 8
957
958 static void
mips_linux_o32_sigframe_init(const struct tramp_frame * self,const frame_info_ptr & this_frame,struct trad_frame_cache * this_cache,CORE_ADDR func)959 mips_linux_o32_sigframe_init (const struct tramp_frame *self,
960 const frame_info_ptr &this_frame,
961 struct trad_frame_cache *this_cache,
962 CORE_ADDR func)
963 {
964 struct gdbarch *gdbarch = get_frame_arch (this_frame);
965 int ireg;
966 CORE_ADDR frame_sp = get_frame_sp (this_frame);
967 CORE_ADDR sigcontext_base;
968 const struct mips_regnum *regs = mips_regnum (gdbarch);
969 CORE_ADDR regs_base;
970
971 if (self == &mips_linux_o32_sigframe
972 || self == µmips_linux_o32_sigframe)
973 sigcontext_base = frame_sp + SIGFRAME_SIGCONTEXT_OFFSET;
974 else
975 sigcontext_base = frame_sp + RTSIGFRAME_SIGCONTEXT_OFFSET;
976
977 /* I'm not proud of this hack. Eventually we will have the
978 infrastructure to indicate the size of saved registers on a
979 per-frame basis, but right now we don't; the kernel saves eight
980 bytes but we only want four. Use regs_base to access any
981 64-bit fields. */
982 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
983 regs_base = sigcontext_base + 4;
984 else
985 regs_base = sigcontext_base;
986
987 if (mips_linux_restart_reg_p (gdbarch))
988 trad_frame_set_reg_addr (this_cache,
989 (MIPS_RESTART_REGNUM
990 + gdbarch_num_regs (gdbarch)),
991 regs_base + SIGCONTEXT_REGS);
992
993 for (ireg = 1; ireg < 32; ireg++)
994 trad_frame_set_reg_addr (this_cache,
995 (ireg + MIPS_ZERO_REGNUM
996 + gdbarch_num_regs (gdbarch)),
997 (regs_base + SIGCONTEXT_REGS
998 + ireg * SIGCONTEXT_REG_SIZE));
999
1000 for (ireg = 0; ireg < 32; ireg++)
1001 if ((gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) != (ireg & 1))
1002 trad_frame_set_reg_addr (this_cache,
1003 ireg + regs->fp0 + gdbarch_num_regs (gdbarch),
1004 (sigcontext_base + SIGCONTEXT_FPREGS + 4
1005 + (ireg & ~1) * SIGCONTEXT_REG_SIZE));
1006 else
1007 trad_frame_set_reg_addr (this_cache,
1008 ireg + regs->fp0 + gdbarch_num_regs (gdbarch),
1009 (sigcontext_base + SIGCONTEXT_FPREGS
1010 + (ireg & ~1) * SIGCONTEXT_REG_SIZE));
1011
1012 trad_frame_set_reg_addr (this_cache,
1013 regs->pc + gdbarch_num_regs (gdbarch),
1014 regs_base + SIGCONTEXT_PC);
1015
1016 trad_frame_set_reg_addr (this_cache,
1017 (regs->fp_control_status
1018 + gdbarch_num_regs (gdbarch)),
1019 sigcontext_base + SIGCONTEXT_FPCSR);
1020
1021 if (regs->dspctl != -1)
1022 trad_frame_set_reg_addr (this_cache,
1023 regs->dspctl + gdbarch_num_regs (gdbarch),
1024 sigcontext_base + SIGCONTEXT_DSPCTL);
1025
1026 trad_frame_set_reg_addr (this_cache,
1027 regs->hi + gdbarch_num_regs (gdbarch),
1028 regs_base + SIGCONTEXT_HI);
1029 trad_frame_set_reg_addr (this_cache,
1030 regs->lo + gdbarch_num_regs (gdbarch),
1031 regs_base + SIGCONTEXT_LO);
1032
1033 if (regs->dspacc != -1)
1034 {
1035 trad_frame_set_reg_addr (this_cache,
1036 regs->dspacc + 0 + gdbarch_num_regs (gdbarch),
1037 sigcontext_base + SIGCONTEXT_HI1);
1038 trad_frame_set_reg_addr (this_cache,
1039 regs->dspacc + 1 + gdbarch_num_regs (gdbarch),
1040 sigcontext_base + SIGCONTEXT_LO1);
1041 trad_frame_set_reg_addr (this_cache,
1042 regs->dspacc + 2 + gdbarch_num_regs (gdbarch),
1043 sigcontext_base + SIGCONTEXT_HI2);
1044 trad_frame_set_reg_addr (this_cache,
1045 regs->dspacc + 3 + gdbarch_num_regs (gdbarch),
1046 sigcontext_base + SIGCONTEXT_LO2);
1047 trad_frame_set_reg_addr (this_cache,
1048 regs->dspacc + 4 + gdbarch_num_regs (gdbarch),
1049 sigcontext_base + SIGCONTEXT_HI3);
1050 trad_frame_set_reg_addr (this_cache,
1051 regs->dspacc + 5 + gdbarch_num_regs (gdbarch),
1052 sigcontext_base + SIGCONTEXT_LO3);
1053 }
1054 else
1055 {
1056 trad_frame_set_reg_addr (this_cache,
1057 regs->cause + gdbarch_num_regs (gdbarch),
1058 sigcontext_base + SIGCONTEXT_CAUSE);
1059 trad_frame_set_reg_addr (this_cache,
1060 regs->badvaddr + gdbarch_num_regs (gdbarch),
1061 sigcontext_base + SIGCONTEXT_BADVADDR);
1062 }
1063
1064 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
1065 trad_frame_set_id (this_cache, frame_id_build (frame_sp, func));
1066 }
1067
1068 /* For N32/N64 things look different. There is no non-rt signal frame.
1069
1070 struct rt_sigframe_n32 {
1071 u32 rs_ass[4]; [ argument save space for o32 ]
1072 u32 rs_code[2]; [ signal trampoline or fill ]
1073 struct siginfo rs_info;
1074 struct ucontextn32 rs_uc;
1075 };
1076
1077 struct ucontextn32 {
1078 u32 uc_flags;
1079 s32 uc_link;
1080 stack32_t uc_stack;
1081 struct sigcontext uc_mcontext;
1082 sigset_t uc_sigmask; [ mask last for extensibility ]
1083 };
1084
1085 struct rt_sigframe {
1086 u32 rs_ass[4]; [ argument save space for o32 ]
1087 u32 rs_code[2]; [ signal trampoline ]
1088 struct siginfo rs_info;
1089 struct ucontext rs_uc;
1090 };
1091
1092 struct ucontext {
1093 unsigned long uc_flags;
1094 struct ucontext *uc_link;
1095 stack_t uc_stack;
1096 struct sigcontext uc_mcontext;
1097 sigset_t uc_sigmask; [ mask last for extensibility ]
1098 };
1099
1100 And the sigcontext is different (this is for both n32 and n64):
1101
1102 struct sigcontext {
1103 unsigned long long sc_regs[32];
1104 unsigned long long sc_fpregs[32];
1105 unsigned long long sc_mdhi;
1106 unsigned long long sc_hi1;
1107 unsigned long long sc_hi2;
1108 unsigned long long sc_hi3;
1109 unsigned long long sc_mdlo;
1110 unsigned long long sc_lo1;
1111 unsigned long long sc_lo2;
1112 unsigned long long sc_lo3;
1113 unsigned long long sc_pc;
1114 unsigned int sc_fpc_csr;
1115 unsigned int sc_used_math;
1116 unsigned int sc_dsp;
1117 unsigned int sc_reserved;
1118 };
1119
1120 That is the post-2.6.12 definition of the 64-bit sigcontext; before
1121 then, there were no hi1-hi3 or lo1-lo3. Cause and badvaddr were
1122 included too. */
1123
1124 #define N32_STACK_T_SIZE STACK_T_SIZE
1125 #define N64_STACK_T_SIZE (2 * 8 + 4)
1126 #define N32_UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + N32_STACK_T_SIZE + 4)
1127 #define N64_UCONTEXT_SIGCONTEXT_OFFSET (2 * 8 + N64_STACK_T_SIZE + 4)
1128 #define N32_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1129 + RTSIGFRAME_SIGINFO_SIZE \
1130 + N32_UCONTEXT_SIGCONTEXT_OFFSET)
1131 #define N64_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
1132 + RTSIGFRAME_SIGINFO_SIZE \
1133 + N64_UCONTEXT_SIGCONTEXT_OFFSET)
1134
1135 #define N64_SIGCONTEXT_REGS (0 * 8)
1136 #define N64_SIGCONTEXT_FPREGS (32 * 8)
1137 #define N64_SIGCONTEXT_HI (64 * 8)
1138 #define N64_SIGCONTEXT_HI1 (65 * 8)
1139 #define N64_SIGCONTEXT_HI2 (66 * 8)
1140 #define N64_SIGCONTEXT_HI3 (67 * 8)
1141 #define N64_SIGCONTEXT_LO (68 * 8)
1142 #define N64_SIGCONTEXT_LO1 (69 * 8)
1143 #define N64_SIGCONTEXT_LO2 (70 * 8)
1144 #define N64_SIGCONTEXT_LO3 (71 * 8)
1145 #define N64_SIGCONTEXT_PC (72 * 8)
1146 #define N64_SIGCONTEXT_FPCSR (73 * 8 + 0)
1147 #define N64_SIGCONTEXT_DSPCTL (74 * 8 + 0)
1148
1149 #define N64_SIGCONTEXT_REG_SIZE 8
1150
1151 static void
mips_linux_n32n64_sigframe_init(const struct tramp_frame * self,const frame_info_ptr & this_frame,struct trad_frame_cache * this_cache,CORE_ADDR func)1152 mips_linux_n32n64_sigframe_init (const struct tramp_frame *self,
1153 const frame_info_ptr &this_frame,
1154 struct trad_frame_cache *this_cache,
1155 CORE_ADDR func)
1156 {
1157 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1158 int ireg;
1159 CORE_ADDR frame_sp = get_frame_sp (this_frame);
1160 CORE_ADDR sigcontext_base;
1161 const struct mips_regnum *regs = mips_regnum (gdbarch);
1162
1163 if (self == &mips_linux_n32_rt_sigframe
1164 || self == µmips_linux_n32_rt_sigframe)
1165 sigcontext_base = frame_sp + N32_SIGFRAME_SIGCONTEXT_OFFSET;
1166 else
1167 sigcontext_base = frame_sp + N64_SIGFRAME_SIGCONTEXT_OFFSET;
1168
1169 if (mips_linux_restart_reg_p (gdbarch))
1170 trad_frame_set_reg_addr (this_cache,
1171 (MIPS_RESTART_REGNUM
1172 + gdbarch_num_regs (gdbarch)),
1173 sigcontext_base + N64_SIGCONTEXT_REGS);
1174
1175 for (ireg = 1; ireg < 32; ireg++)
1176 trad_frame_set_reg_addr (this_cache,
1177 (ireg + MIPS_ZERO_REGNUM
1178 + gdbarch_num_regs (gdbarch)),
1179 (sigcontext_base + N64_SIGCONTEXT_REGS
1180 + ireg * N64_SIGCONTEXT_REG_SIZE));
1181
1182 for (ireg = 0; ireg < 32; ireg++)
1183 trad_frame_set_reg_addr (this_cache,
1184 ireg + regs->fp0 + gdbarch_num_regs (gdbarch),
1185 (sigcontext_base + N64_SIGCONTEXT_FPREGS
1186 + ireg * N64_SIGCONTEXT_REG_SIZE));
1187
1188 trad_frame_set_reg_addr (this_cache,
1189 regs->pc + gdbarch_num_regs (gdbarch),
1190 sigcontext_base + N64_SIGCONTEXT_PC);
1191
1192 trad_frame_set_reg_addr (this_cache,
1193 (regs->fp_control_status
1194 + gdbarch_num_regs (gdbarch)),
1195 sigcontext_base + N64_SIGCONTEXT_FPCSR);
1196
1197 trad_frame_set_reg_addr (this_cache,
1198 regs->hi + gdbarch_num_regs (gdbarch),
1199 sigcontext_base + N64_SIGCONTEXT_HI);
1200 trad_frame_set_reg_addr (this_cache,
1201 regs->lo + gdbarch_num_regs (gdbarch),
1202 sigcontext_base + N64_SIGCONTEXT_LO);
1203
1204 if (regs->dspacc != -1)
1205 {
1206 trad_frame_set_reg_addr (this_cache,
1207 regs->dspacc + 0 + gdbarch_num_regs (gdbarch),
1208 sigcontext_base + N64_SIGCONTEXT_HI1);
1209 trad_frame_set_reg_addr (this_cache,
1210 regs->dspacc + 1 + gdbarch_num_regs (gdbarch),
1211 sigcontext_base + N64_SIGCONTEXT_LO1);
1212 trad_frame_set_reg_addr (this_cache,
1213 regs->dspacc + 2 + gdbarch_num_regs (gdbarch),
1214 sigcontext_base + N64_SIGCONTEXT_HI2);
1215 trad_frame_set_reg_addr (this_cache,
1216 regs->dspacc + 3 + gdbarch_num_regs (gdbarch),
1217 sigcontext_base + N64_SIGCONTEXT_LO2);
1218 trad_frame_set_reg_addr (this_cache,
1219 regs->dspacc + 4 + gdbarch_num_regs (gdbarch),
1220 sigcontext_base + N64_SIGCONTEXT_HI3);
1221 trad_frame_set_reg_addr (this_cache,
1222 regs->dspacc + 5 + gdbarch_num_regs (gdbarch),
1223 sigcontext_base + N64_SIGCONTEXT_LO3);
1224 }
1225 if (regs->dspctl != -1)
1226 trad_frame_set_reg_addr (this_cache,
1227 regs->dspctl + gdbarch_num_regs (gdbarch),
1228 sigcontext_base + N64_SIGCONTEXT_DSPCTL);
1229
1230 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
1231 trad_frame_set_id (this_cache, frame_id_build (frame_sp, func));
1232 }
1233
1234 /* Implement struct tramp_frame's "validate" method for standard MIPS code. */
1235
1236 static int
mips_linux_sigframe_validate(const struct tramp_frame * self,const frame_info_ptr & this_frame,CORE_ADDR * pc)1237 mips_linux_sigframe_validate (const struct tramp_frame *self,
1238 const frame_info_ptr &this_frame,
1239 CORE_ADDR *pc)
1240 {
1241 return mips_pc_is_mips (*pc);
1242 }
1243
1244 /* Implement struct tramp_frame's "validate" method for microMIPS code. */
1245
1246 static int
micromips_linux_sigframe_validate(const struct tramp_frame * self,const frame_info_ptr & this_frame,CORE_ADDR * pc)1247 micromips_linux_sigframe_validate (const struct tramp_frame *self,
1248 const frame_info_ptr &this_frame,
1249 CORE_ADDR *pc)
1250 {
1251 if (mips_pc_is_micromips (get_frame_arch (this_frame), *pc))
1252 {
1253 *pc = mips_unmake_compact_addr (*pc);
1254 return 1;
1255 }
1256 else
1257 return 0;
1258 }
1259
1260 /* Implement the "write_pc" gdbarch method. */
1261
1262 static void
mips_linux_write_pc(struct regcache * regcache,CORE_ADDR pc)1263 mips_linux_write_pc (struct regcache *regcache, CORE_ADDR pc)
1264 {
1265 struct gdbarch *gdbarch = regcache->arch ();
1266
1267 mips_write_pc (regcache, pc);
1268
1269 /* Clear the syscall restart flag. */
1270 if (mips_linux_restart_reg_p (gdbarch))
1271 regcache_cooked_write_unsigned (regcache, MIPS_RESTART_REGNUM, 0);
1272 }
1273
1274 /* Return 1 if MIPS_RESTART_REGNUM is usable. */
1275
1276 int
mips_linux_restart_reg_p(struct gdbarch * gdbarch)1277 mips_linux_restart_reg_p (struct gdbarch *gdbarch)
1278 {
1279 /* If we do not have a target description with registers, then
1280 MIPS_RESTART_REGNUM will not be included in the register set. */
1281 if (!tdesc_has_registers (gdbarch_target_desc (gdbarch)))
1282 return 0;
1283
1284 /* If we do, then MIPS_RESTART_REGNUM is safe to check; it will
1285 either be GPR-sized or missing. */
1286 return register_size (gdbarch, MIPS_RESTART_REGNUM) > 0;
1287 }
1288
1289 /* When FRAME is at a syscall instruction, return the PC of the next
1290 instruction to be executed. */
1291
1292 static CORE_ADDR
mips_linux_syscall_next_pc(const frame_info_ptr & frame)1293 mips_linux_syscall_next_pc (const frame_info_ptr &frame)
1294 {
1295 CORE_ADDR pc = get_frame_pc (frame);
1296 ULONGEST v0 = get_frame_register_unsigned (frame, MIPS_V0_REGNUM);
1297
1298 /* If we are about to make a sigreturn syscall, use the unwinder to
1299 decode the signal frame. */
1300 if (v0 == MIPS_NR_sigreturn
1301 || v0 == MIPS_NR_rt_sigreturn
1302 || v0 == MIPS_NR_N64_rt_sigreturn
1303 || v0 == MIPS_NR_N32_rt_sigreturn)
1304 return frame_unwind_caller_pc (get_current_frame ());
1305
1306 return pc + 4;
1307 }
1308
1309 /* Return the current system call's number present in the
1310 v0 register. When the function fails, it returns -1. */
1311
1312 static LONGEST
mips_linux_get_syscall_number(struct gdbarch * gdbarch,thread_info * thread)1313 mips_linux_get_syscall_number (struct gdbarch *gdbarch,
1314 thread_info *thread)
1315 {
1316 struct regcache *regcache = get_thread_regcache (thread);
1317 mips_gdbarch_tdep *tdep = gdbarch_tdep<mips_gdbarch_tdep> (gdbarch);
1318 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1319 int regsize = register_size (gdbarch, MIPS_V0_REGNUM);
1320 /* The content of a register */
1321 gdb_byte buf[8];
1322 /* The result */
1323 LONGEST ret;
1324
1325 /* Make sure we're in a known ABI */
1326 gdb_assert (tdep->mips_abi == MIPS_ABI_O32
1327 || tdep->mips_abi == MIPS_ABI_N32
1328 || tdep->mips_abi == MIPS_ABI_N64);
1329
1330 gdb_assert (regsize <= sizeof (buf));
1331
1332 /* Getting the system call number from the register.
1333 syscall number is in v0 or $2. */
1334 regcache->cooked_read (MIPS_V0_REGNUM, buf);
1335
1336 ret = extract_signed_integer (buf, regsize, byte_order);
1337
1338 return ret;
1339 }
1340
1341 /* Implementation of `gdbarch_gdb_signal_to_target', as defined in
1342 gdbarch.h. */
1343
1344 static int
mips_gdb_signal_to_target(struct gdbarch * gdbarch,enum gdb_signal signal)1345 mips_gdb_signal_to_target (struct gdbarch *gdbarch,
1346 enum gdb_signal signal)
1347 {
1348 switch (signal)
1349 {
1350 case GDB_SIGNAL_EMT:
1351 return MIPS_LINUX_SIGEMT;
1352
1353 case GDB_SIGNAL_BUS:
1354 return MIPS_LINUX_SIGBUS;
1355
1356 case GDB_SIGNAL_SYS:
1357 return MIPS_LINUX_SIGSYS;
1358
1359 case GDB_SIGNAL_USR1:
1360 return MIPS_LINUX_SIGUSR1;
1361
1362 case GDB_SIGNAL_USR2:
1363 return MIPS_LINUX_SIGUSR2;
1364
1365 case GDB_SIGNAL_CHLD:
1366 return MIPS_LINUX_SIGCHLD;
1367
1368 case GDB_SIGNAL_PWR:
1369 return MIPS_LINUX_SIGPWR;
1370
1371 case GDB_SIGNAL_WINCH:
1372 return MIPS_LINUX_SIGWINCH;
1373
1374 case GDB_SIGNAL_URG:
1375 return MIPS_LINUX_SIGURG;
1376
1377 case GDB_SIGNAL_IO:
1378 return MIPS_LINUX_SIGIO;
1379
1380 case GDB_SIGNAL_POLL:
1381 return MIPS_LINUX_SIGPOLL;
1382
1383 case GDB_SIGNAL_STOP:
1384 return MIPS_LINUX_SIGSTOP;
1385
1386 case GDB_SIGNAL_TSTP:
1387 return MIPS_LINUX_SIGTSTP;
1388
1389 case GDB_SIGNAL_CONT:
1390 return MIPS_LINUX_SIGCONT;
1391
1392 case GDB_SIGNAL_TTIN:
1393 return MIPS_LINUX_SIGTTIN;
1394
1395 case GDB_SIGNAL_TTOU:
1396 return MIPS_LINUX_SIGTTOU;
1397
1398 case GDB_SIGNAL_VTALRM:
1399 return MIPS_LINUX_SIGVTALRM;
1400
1401 case GDB_SIGNAL_PROF:
1402 return MIPS_LINUX_SIGPROF;
1403
1404 case GDB_SIGNAL_XCPU:
1405 return MIPS_LINUX_SIGXCPU;
1406
1407 case GDB_SIGNAL_XFSZ:
1408 return MIPS_LINUX_SIGXFSZ;
1409
1410 /* GDB_SIGNAL_REALTIME_32 is not continuous in <gdb/signals.def>,
1411 therefore we have to handle it here. */
1412 case GDB_SIGNAL_REALTIME_32:
1413 return MIPS_LINUX_SIGRTMIN;
1414 }
1415
1416 if (signal >= GDB_SIGNAL_REALTIME_33
1417 && signal <= GDB_SIGNAL_REALTIME_63)
1418 {
1419 int offset = signal - GDB_SIGNAL_REALTIME_33;
1420
1421 return MIPS_LINUX_SIGRTMIN + 1 + offset;
1422 }
1423 else if (signal >= GDB_SIGNAL_REALTIME_64
1424 && signal <= GDB_SIGNAL_REALTIME_127)
1425 {
1426 int offset = signal - GDB_SIGNAL_REALTIME_64;
1427
1428 return MIPS_LINUX_SIGRT64 + offset;
1429 }
1430
1431 return linux_gdb_signal_to_target (gdbarch, signal);
1432 }
1433
1434 /* Translate signals based on MIPS signal values.
1435 Adapted from gdb/gdbsupport/signals.c. */
1436
1437 static enum gdb_signal
mips_gdb_signal_from_target(struct gdbarch * gdbarch,int signal)1438 mips_gdb_signal_from_target (struct gdbarch *gdbarch, int signal)
1439 {
1440 switch (signal)
1441 {
1442 case MIPS_LINUX_SIGEMT:
1443 return GDB_SIGNAL_EMT;
1444
1445 case MIPS_LINUX_SIGBUS:
1446 return GDB_SIGNAL_BUS;
1447
1448 case MIPS_LINUX_SIGSYS:
1449 return GDB_SIGNAL_SYS;
1450
1451 case MIPS_LINUX_SIGUSR1:
1452 return GDB_SIGNAL_USR1;
1453
1454 case MIPS_LINUX_SIGUSR2:
1455 return GDB_SIGNAL_USR2;
1456
1457 case MIPS_LINUX_SIGCHLD:
1458 return GDB_SIGNAL_CHLD;
1459
1460 case MIPS_LINUX_SIGPWR:
1461 return GDB_SIGNAL_PWR;
1462
1463 case MIPS_LINUX_SIGWINCH:
1464 return GDB_SIGNAL_WINCH;
1465
1466 case MIPS_LINUX_SIGURG:
1467 return GDB_SIGNAL_URG;
1468
1469 /* No way to differentiate between SIGIO and SIGPOLL.
1470 Therefore, we just handle the first one. */
1471 case MIPS_LINUX_SIGIO:
1472 return GDB_SIGNAL_IO;
1473
1474 case MIPS_LINUX_SIGSTOP:
1475 return GDB_SIGNAL_STOP;
1476
1477 case MIPS_LINUX_SIGTSTP:
1478 return GDB_SIGNAL_TSTP;
1479
1480 case MIPS_LINUX_SIGCONT:
1481 return GDB_SIGNAL_CONT;
1482
1483 case MIPS_LINUX_SIGTTIN:
1484 return GDB_SIGNAL_TTIN;
1485
1486 case MIPS_LINUX_SIGTTOU:
1487 return GDB_SIGNAL_TTOU;
1488
1489 case MIPS_LINUX_SIGVTALRM:
1490 return GDB_SIGNAL_VTALRM;
1491
1492 case MIPS_LINUX_SIGPROF:
1493 return GDB_SIGNAL_PROF;
1494
1495 case MIPS_LINUX_SIGXCPU:
1496 return GDB_SIGNAL_XCPU;
1497
1498 case MIPS_LINUX_SIGXFSZ:
1499 return GDB_SIGNAL_XFSZ;
1500 }
1501
1502 if (signal >= MIPS_LINUX_SIGRTMIN && signal <= MIPS_LINUX_SIGRTMAX)
1503 {
1504 /* GDB_SIGNAL_REALTIME values are not contiguous, map parts of
1505 the MIPS block to the respective GDB_SIGNAL_REALTIME blocks. */
1506 int offset = signal - MIPS_LINUX_SIGRTMIN;
1507
1508 if (offset == 0)
1509 return GDB_SIGNAL_REALTIME_32;
1510 else if (offset < 32)
1511 return (enum gdb_signal) (offset - 1
1512 + (int) GDB_SIGNAL_REALTIME_33);
1513 else
1514 return (enum gdb_signal) (offset - 32
1515 + (int) GDB_SIGNAL_REALTIME_64);
1516 }
1517
1518 return linux_gdb_signal_from_target (gdbarch, signal);
1519 }
1520
1521 /* Initialize one of the GNU/Linux OS ABIs. */
1522
1523 static void
mips_linux_init_abi(struct gdbarch_info info,struct gdbarch * gdbarch)1524 mips_linux_init_abi (struct gdbarch_info info,
1525 struct gdbarch *gdbarch)
1526 {
1527 mips_gdbarch_tdep *tdep = gdbarch_tdep<mips_gdbarch_tdep> (gdbarch);
1528 enum mips_abi abi = mips_abi (gdbarch);
1529 struct tdesc_arch_data *tdesc_data = info.tdesc_data;
1530
1531 linux_init_abi (info, gdbarch, 0);
1532
1533 /* Get the syscall number from the arch's register. */
1534 set_gdbarch_get_syscall_number (gdbarch, mips_linux_get_syscall_number);
1535
1536 switch (abi)
1537 {
1538 case MIPS_ABI_O32:
1539 set_gdbarch_get_longjmp_target (gdbarch,
1540 mips_linux_get_longjmp_target);
1541 set_solib_svr4_fetch_link_map_offsets
1542 (gdbarch, linux_ilp32_fetch_link_map_offsets);
1543 tramp_frame_prepend_unwinder (gdbarch, µmips_linux_o32_sigframe);
1544 tramp_frame_prepend_unwinder (gdbarch,
1545 µmips_linux_o32_rt_sigframe);
1546 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_sigframe);
1547 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_o32_rt_sigframe);
1548 set_xml_syscall_file_name (gdbarch, "syscalls/mips-o32-linux.xml");
1549 break;
1550 case MIPS_ABI_N32:
1551 set_gdbarch_get_longjmp_target (gdbarch,
1552 mips_linux_get_longjmp_target);
1553 set_solib_svr4_fetch_link_map_offsets
1554 (gdbarch, linux_ilp32_fetch_link_map_offsets);
1555 set_gdbarch_long_double_bit (gdbarch, 128);
1556 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_quad);
1557 tramp_frame_prepend_unwinder (gdbarch,
1558 µmips_linux_n32_rt_sigframe);
1559 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n32_rt_sigframe);
1560 set_xml_syscall_file_name (gdbarch, "syscalls/mips-n32-linux.xml");
1561 break;
1562 case MIPS_ABI_N64:
1563 set_gdbarch_get_longjmp_target (gdbarch,
1564 mips64_linux_get_longjmp_target);
1565 set_solib_svr4_fetch_link_map_offsets
1566 (gdbarch, linux_lp64_fetch_link_map_offsets);
1567 set_gdbarch_long_double_bit (gdbarch, 128);
1568 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_quad);
1569 tramp_frame_prepend_unwinder (gdbarch,
1570 µmips_linux_n64_rt_sigframe);
1571 tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n64_rt_sigframe);
1572 set_xml_syscall_file_name (gdbarch, "syscalls/mips-n64-linux.xml");
1573 break;
1574 default:
1575 break;
1576 }
1577
1578 set_gdbarch_skip_solib_resolver (gdbarch, mips_linux_skip_resolver);
1579
1580 set_gdbarch_software_single_step (gdbarch, mips_software_single_step);
1581
1582 /* Enable TLS support. */
1583 set_gdbarch_fetch_tls_load_module_address (gdbarch,
1584 svr4_fetch_objfile_link_map);
1585
1586 /* Initialize this lazily, to avoid an initialization order
1587 dependency on solib-svr4.c's _initialize routine. */
1588 if (mips_svr4_so_ops.in_dynsym_resolve_code == NULL)
1589 {
1590 mips_svr4_so_ops = svr4_so_ops;
1591 mips_svr4_so_ops.in_dynsym_resolve_code
1592 = mips_linux_in_dynsym_resolve_code;
1593 }
1594 set_gdbarch_so_ops (gdbarch, &mips_svr4_so_ops);
1595
1596 set_gdbarch_write_pc (gdbarch, mips_linux_write_pc);
1597
1598 set_gdbarch_core_read_description (gdbarch,
1599 mips_linux_core_read_description);
1600
1601 set_gdbarch_iterate_over_regset_sections
1602 (gdbarch, mips_linux_iterate_over_regset_sections);
1603
1604 set_gdbarch_gdb_signal_from_target (gdbarch,
1605 mips_gdb_signal_from_target);
1606
1607 set_gdbarch_gdb_signal_to_target (gdbarch,
1608 mips_gdb_signal_to_target);
1609
1610 tdep->syscall_next_pc = mips_linux_syscall_next_pc;
1611
1612 if (tdesc_data)
1613 {
1614 const struct tdesc_feature *feature;
1615
1616 /* If we have target-described registers, then we can safely
1617 reserve a number for MIPS_RESTART_REGNUM (whether it is
1618 described or not). */
1619 gdb_assert (gdbarch_num_regs (gdbarch) <= MIPS_RESTART_REGNUM);
1620 set_gdbarch_num_regs (gdbarch, MIPS_RESTART_REGNUM + 1);
1621 set_gdbarch_num_pseudo_regs (gdbarch, MIPS_RESTART_REGNUM + 1);
1622
1623 /* If it's present, then assign it to the reserved number. */
1624 feature = tdesc_find_feature (info.target_desc,
1625 "org.gnu.gdb.mips.linux");
1626 if (feature != NULL)
1627 tdesc_numbered_register (feature, tdesc_data, MIPS_RESTART_REGNUM,
1628 "restart");
1629 }
1630 }
1631
1632 void _initialize_mips_linux_tdep ();
1633 void
_initialize_mips_linux_tdep()1634 _initialize_mips_linux_tdep ()
1635 {
1636 const struct bfd_arch_info *arch_info;
1637
1638 for (arch_info = bfd_lookup_arch (bfd_arch_mips, 0);
1639 arch_info != NULL;
1640 arch_info = arch_info->next)
1641 {
1642 gdbarch_register_osabi (bfd_arch_mips, arch_info->mach,
1643 GDB_OSABI_LINUX,
1644 mips_linux_init_abi);
1645 }
1646
1647 /* Initialize the standard target descriptions. */
1648 initialize_tdesc_mips_linux ();
1649 initialize_tdesc_mips_dsp_linux ();
1650 initialize_tdesc_mips64_linux ();
1651 initialize_tdesc_mips64_dsp_linux ();
1652 }
1653