1 /*-
2 * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
3 * reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in
13 * the documentation and/or other materials provided with the
14 * distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
26 * THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * NETLOGIC_BSD
29 * $FreeBSD$
30 */
31
32 #ifndef __NLM_XLP_H__
33 #define __NLM_XLP_H__
34 #include <mips/nlm/hal/mips-extns.h>
35 #include <mips/nlm/hal/iomap.h>
36
37 #define PIC_UART_0_IRQ 9
38
39 #define PIC_PCIE_0_IRQ 11
40 #define PIC_PCIE_1_IRQ 12
41 #define PIC_PCIE_2_IRQ 13
42 #define PIC_PCIE_3_IRQ 14
43
44 #define PIC_EHCI_0_IRQ 16
45 #define PIC_MMC_IRQ 21
46 /* 41 used by IRQ_SMP */
47
48
49 /* XLP 8xx/4xx A0, A1, A2 CPU COP0 PRIDs */
50 #define CHIP_PROCESSOR_ID_XLP_8XX 0x10
51 #define CHIP_PROCESSOR_ID_XLP_3XX 0x11
52 #define CHIP_PROCESSOR_ID_XLP_416 0x94
53 #define CHIP_PROCESSOR_ID_XLP_432 0x14
54
55 /* Revision id's */
56 #define XLP_REVISION_A0 0x00
57 #define XLP_REVISION_A1 0x01
58 #define XLP_REVISION_A2 0x02
59 #define XLP_REVISION_B0 0x03
60 #define XLP_REVISION_B1 0x04
61
62 #ifndef LOCORE
63 /*
64 * FreeBSD can be started with few threads and cores turned off,
65 * so have a hardware thread id to FreeBSD cpuid mapping.
66 */
67 extern int xlp_ncores;
68 extern int xlp_threads_per_core;
69 extern uint32_t xlp_hw_thread_mask;
70 extern int xlp_cpuid_to_hwtid[];
71 extern int xlp_hwtid_to_cpuid[];
72 #ifdef SMP
73 extern void xlp_enable_threads(int code);
74 #endif
75 uint32_t xlp_get_cpu_frequency(int node, int core);
76 int nlm_set_device_frequency(int node, int devtype, int frequency);
77 int xlp_irt_to_irq(int irt);
78 int xlp_irq_to_irt(int irq);
79
nlm_processor_id(void)80 static __inline int nlm_processor_id(void)
81 {
82 return ((mips_rd_prid() >> 8) & 0xff);
83 }
84
nlm_is_xlp3xx(void)85 static __inline int nlm_is_xlp3xx(void)
86 {
87
88 return (nlm_processor_id() == CHIP_PROCESSOR_ID_XLP_3XX);
89 }
90
nlm_is_xlp3xx_ax(void)91 static __inline int nlm_is_xlp3xx_ax(void)
92 {
93 uint32_t procid = mips_rd_prid();
94 int prid = (procid >> 8) & 0xff;
95 int rev = procid & 0xff;
96
97 return (prid == CHIP_PROCESSOR_ID_XLP_3XX &&
98 rev < XLP_REVISION_B0);
99 }
100
nlm_is_xlp4xx(void)101 static __inline int nlm_is_xlp4xx(void)
102 {
103 int prid = nlm_processor_id();
104
105 return (prid == CHIP_PROCESSOR_ID_XLP_432 ||
106 prid == CHIP_PROCESSOR_ID_XLP_416);
107 }
108
nlm_is_xlp8xx(void)109 static __inline int nlm_is_xlp8xx(void)
110 {
111 int prid = nlm_processor_id();
112
113 return (prid == CHIP_PROCESSOR_ID_XLP_8XX ||
114 prid == CHIP_PROCESSOR_ID_XLP_432 ||
115 prid == CHIP_PROCESSOR_ID_XLP_416);
116 }
117
nlm_is_xlp8xx_ax(void)118 static __inline int nlm_is_xlp8xx_ax(void)
119 {
120 uint32_t procid = mips_rd_prid();
121 int prid = (procid >> 8) & 0xff;
122 int rev = procid & 0xff;
123
124 return ((prid == CHIP_PROCESSOR_ID_XLP_8XX ||
125 prid == CHIP_PROCESSOR_ID_XLP_432 ||
126 prid == CHIP_PROCESSOR_ID_XLP_416) &&
127 (rev < XLP_REVISION_B0));
128 }
129
nlm_is_xlp8xx_b0(void)130 static __inline int nlm_is_xlp8xx_b0(void)
131 {
132 uint32_t procid = mips_rd_prid();
133 int prid = (procid >> 8) & 0xff;
134 int rev = procid & 0xff;
135
136 return ((prid == CHIP_PROCESSOR_ID_XLP_8XX ||
137 prid == CHIP_PROCESSOR_ID_XLP_432 ||
138 prid == CHIP_PROCESSOR_ID_XLP_416) &&
139 rev == XLP_REVISION_B0);
140 }
141
142 #endif /* LOCORE */
143 #endif /* __NLM_XLP_H__ */
144