1 /*-
2 * Copyright (c) 2010 Isilon Systems, Inc.
3 * Copyright (c) 2010 iX Systems, Inc.
4 * Copyright (c) 2010 Panasas, Inc.
5 * Copyright (c) 2013-2015 Mellanox Technologies, Ltd.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice unmodified, this list of conditions, and the following
13 * disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * $FreeBSD$
30 */
31 #ifndef _LINUX_IO_H_
32 #define _LINUX_IO_H_
33
34 #include <machine/vm.h>
35 #include <sys/endian.h>
36 #include <sys/types.h>
37
38 static inline uint32_t
__raw_readl(const volatile void * addr)39 __raw_readl(const volatile void *addr)
40 {
41 return *(const volatile uint32_t *)addr;
42 }
43
44 static inline void
__raw_writel(uint32_t b,volatile void * addr)45 __raw_writel(uint32_t b, volatile void *addr)
46 {
47 *(volatile uint32_t *)addr = b;
48 }
49
50 static inline uint64_t
__raw_readq(const volatile void * addr)51 __raw_readq(const volatile void *addr)
52 {
53 return *(const volatile uint64_t *)addr;
54 }
55
56 static inline void
__raw_writeq(uint64_t b,volatile void * addr)57 __raw_writeq(uint64_t b, volatile void *addr)
58 {
59 *(volatile uint64_t *)addr = b;
60 }
61
62 /*
63 * XXX This is all x86 specific. It should be bus space access.
64 */
65 #define mmiowb()
66
67 #undef writel
68 static inline void
writel(uint32_t b,void * addr)69 writel(uint32_t b, void *addr)
70 {
71 *(volatile uint32_t *)addr = b;
72 }
73
74 #undef writeq
75 static inline void
writeq(uint64_t b,void * addr)76 writeq(uint64_t b, void *addr)
77 {
78 *(volatile uint64_t *)addr = b;
79 }
80
81 #undef writeb
82 static inline void
writeb(uint8_t b,void * addr)83 writeb(uint8_t b, void *addr)
84 {
85 *(volatile uint8_t *)addr = b;
86 }
87
88 #undef writew
89 static inline void
writew(uint16_t b,void * addr)90 writew(uint16_t b, void *addr)
91 {
92 *(volatile uint16_t *)addr = b;
93 }
94
95 #undef ioread32be
96 static inline uint32_t
ioread32be(const volatile void * addr)97 ioread32be(const volatile void *addr)
98 {
99 return be32toh(*(const volatile uint32_t *)addr);
100 }
101
102 #undef iowrite32be
103 static inline void
iowrite32be(uint32_t v,volatile void * addr)104 iowrite32be(uint32_t v, volatile void *addr)
105 {
106 *(volatile uint32_t *)addr = htobe32(v);
107 }
108
109 #undef readb
110 static inline uint8_t
readb(const volatile void * addr)111 readb(const volatile void *addr)
112 {
113 return *(const volatile uint8_t *)addr;
114 }
115
116 #undef readw
117 static inline uint16_t
readw(const volatile void * addr)118 readw(const volatile void *addr)
119 {
120 return *(const volatile uint16_t *)addr;
121 }
122
123 #undef readl
124 static inline uint32_t
readl(const volatile void * addr)125 readl(const volatile void *addr)
126 {
127 return *(const volatile uint32_t *)addr;
128 }
129
130 #if defined(__i386__) || defined(__amd64__)
131 void *_ioremap_attr(vm_paddr_t phys_addr, unsigned long size, int attr);
132 #else
133 #define _ioremap_attr(...) NULL
134 #endif
135
136 #define ioremap_nocache(addr, size) \
137 _ioremap_attr((addr), (size), VM_MEMATTR_UNCACHEABLE)
138 #define ioremap_wc(addr, size) \
139 _ioremap_attr((addr), (size), VM_MEMATTR_WRITE_COMBINING)
140 #define ioremap(addr, size) \
141 _ioremap_attr((addr), (size), VM_MEMATTR_UNCACHEABLE)
142 void iounmap(void *addr);
143
144 #define memset_io(a, b, c) memset((a), (b), (c))
145 #define memcpy_fromio(a, b, c) memcpy((a), (b), (c))
146 #define memcpy_toio(a, b, c) memcpy((a), (b), (c))
147
148 static inline void
__iowrite64_copy(void * to,void * from,size_t count)149 __iowrite64_copy(void *to, void *from, size_t count)
150 {
151 #ifdef __LP64__
152 uint64_t *src;
153 uint64_t *dst;
154 int i;
155
156 for (i = 0, src = from, dst = to; i < count; i++, src++, dst++)
157 __raw_writeq(*src, dst);
158 #else
159 uint32_t *src;
160 uint32_t *dst;
161 int i;
162
163 count *= 2;
164 for (i = 0, src = from, dst = to; i < count; i++, src++, dst++)
165 __raw_writel(*src, dst);
166 #endif
167 }
168
169
170 #endif /* _LINUX_IO_H_ */
171