1 /* $NetBSD: if_ural.c,v 1.67 2024/07/05 04:31:52 rin Exp $ */
2 /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/usb/if_ural.c,v 1.40 2006/06/02 23:14:40 sam Exp $ */
3
4 /*-
5 * Copyright (c) 2005, 2006
6 * Damien Bergamini <damien.bergamini@free.fr>
7 *
8 * Permission to use, copy, modify, and distribute this software for any
9 * purpose with or without fee is hereby granted, provided that the above
10 * copyright notice and this permission notice appear in all copies.
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 */
20
21 /*-
22 * Ralink Technology RT2500USB chipset driver
23 * http://www.ralinktech.com/
24 */
25
26 #include <sys/cdefs.h>
27 __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.67 2024/07/05 04:31:52 rin Exp $");
28
29 #ifdef _KERNEL_OPT
30 #include "opt_usb.h"
31 #endif
32
33 #include <sys/param.h>
34 #include <sys/sockio.h>
35 #include <sys/sysctl.h>
36 #include <sys/mbuf.h>
37 #include <sys/kernel.h>
38 #include <sys/socket.h>
39 #include <sys/systm.h>
40 #include <sys/conf.h>
41 #include <sys/device.h>
42
43 #include <sys/bus.h>
44 #include <machine/endian.h>
45 #include <sys/intr.h>
46
47 #include <net/bpf.h>
48 #include <net/if.h>
49 #include <net/if_arp.h>
50 #include <net/if_dl.h>
51 #include <net/if_ether.h>
52 #include <net/if_media.h>
53 #include <net/if_types.h>
54
55 #include <netinet/in.h>
56 #include <netinet/in_systm.h>
57 #include <netinet/in_var.h>
58 #include <netinet/ip.h>
59
60 #include <net80211/ieee80211_netbsd.h>
61 #include <net80211/ieee80211_var.h>
62 #include <net80211/ieee80211_amrr.h>
63 #include <net80211/ieee80211_radiotap.h>
64
65 #include <dev/usb/usb.h>
66 #include <dev/usb/usbdi.h>
67 #include <dev/usb/usbdi_util.h>
68 #include <dev/usb/usbdevs.h>
69
70 #include <dev/usb/if_uralreg.h>
71 #include <dev/usb/if_uralvar.h>
72
73 #ifdef URAL_DEBUG
74 #define DPRINTF(x) do { if (ural_debug) printf x; } while (0)
75 #define DPRINTFN(n, x) do { if (ural_debug >= (n)) printf x; } while (0)
76 int ural_debug = 0;
77 #else
78 #define DPRINTF(x)
79 #define DPRINTFN(n, x)
80 #endif
81
82 /* various supported device vendors/products */
83 static const struct usb_devno ural_devs[] = {
84 { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G },
85 { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 },
86 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 },
87 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G },
88 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP },
89 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_HU200TS },
90 { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU },
91 { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 },
92 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG },
93 { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 },
94 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 },
95 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI },
96 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB },
97 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_NINWIFI },
98 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6861 },
99 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6865 },
100 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6869 },
101 { USB_VENDOR_NOVATECH, USB_PRODUCT_NOVATECH_NV902W },
102 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 },
103 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 },
104 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 },
105 { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG },
106 { USB_VENDOR_SPHAIRON, USB_PRODUCT_SPHAIRON_UB801R },
107 { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_EP9001G },
108 { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 },
109 { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_ZWXG261 },
110 };
111
112 Static int ural_alloc_tx_list(struct ural_softc *);
113 Static void ural_free_tx_list(struct ural_softc *);
114 Static int ural_alloc_rx_list(struct ural_softc *);
115 Static void ural_free_rx_list(struct ural_softc *);
116 Static int ural_media_change(struct ifnet *);
117 Static void ural_next_scan(void *);
118 Static void ural_task(void *);
119 Static int ural_newstate(struct ieee80211com *,
120 enum ieee80211_state, int);
121 Static int ural_rxrate(struct ural_rx_desc *);
122 Static void ural_txeof(struct usbd_xfer *, void *,
123 usbd_status);
124 Static void ural_rxeof(struct usbd_xfer *, void *,
125 usbd_status);
126 Static int ural_ack_rate(struct ieee80211com *, int);
127 Static uint16_t ural_txtime(int, int, uint32_t);
128 Static uint8_t ural_plcp_signal(int);
129 Static void ural_setup_tx_desc(struct ural_softc *,
130 struct ural_tx_desc *, uint32_t, int, int);
131 Static int ural_tx_bcn(struct ural_softc *, struct mbuf *,
132 struct ieee80211_node *);
133 Static int ural_tx_mgt(struct ural_softc *, struct mbuf *,
134 struct ieee80211_node *);
135 Static int ural_tx_data(struct ural_softc *, struct mbuf *,
136 struct ieee80211_node *);
137 Static void ural_start(struct ifnet *);
138 Static void ural_watchdog(struct ifnet *);
139 Static int ural_reset(struct ifnet *);
140 Static int ural_ioctl(struct ifnet *, u_long, void *);
141 Static void ural_set_testmode(struct ural_softc *);
142 Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *,
143 int);
144 Static uint16_t ural_read(struct ural_softc *, uint16_t);
145 Static void ural_read_multi(struct ural_softc *, uint16_t, void *,
146 int);
147 Static void ural_write(struct ural_softc *, uint16_t, uint16_t);
148 Static void ural_write_multi(struct ural_softc *, uint16_t, void *,
149 int);
150 Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t);
151 Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t);
152 Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t);
153 Static void ural_set_chan(struct ural_softc *,
154 struct ieee80211_channel *);
155 Static void ural_disable_rf_tune(struct ural_softc *);
156 Static void ural_enable_tsf_sync(struct ural_softc *);
157 Static void ural_update_slot(struct ifnet *);
158 Static void ural_set_txpreamble(struct ural_softc *);
159 Static void ural_set_basicrates(struct ural_softc *);
160 Static void ural_set_bssid(struct ural_softc *, uint8_t *);
161 Static void ural_set_macaddr(struct ural_softc *, uint8_t *);
162 Static void ural_update_promisc(struct ural_softc *);
163 Static const char *ural_get_rf(int);
164 Static void ural_read_eeprom(struct ural_softc *);
165 Static int ural_bbp_init(struct ural_softc *);
166 Static void ural_set_txantenna(struct ural_softc *, int);
167 Static void ural_set_rxantenna(struct ural_softc *, int);
168 Static int ural_init(struct ifnet *);
169 Static void ural_stop(struct ifnet *, int);
170 Static void ural_amrr_start(struct ural_softc *,
171 struct ieee80211_node *);
172 Static void ural_amrr_timeout(void *);
173 Static void ural_amrr_update(struct usbd_xfer *, void *,
174 usbd_status status);
175
176 /*
177 * Default values for MAC registers; values taken from the reference driver.
178 */
179 static const struct {
180 uint16_t reg;
181 uint16_t val;
182 } ural_def_mac[] = {
183 { RAL_TXRX_CSR5, 0x8c8d },
184 { RAL_TXRX_CSR6, 0x8b8a },
185 { RAL_TXRX_CSR7, 0x8687 },
186 { RAL_TXRX_CSR8, 0x0085 },
187 { RAL_MAC_CSR13, 0x1111 },
188 { RAL_MAC_CSR14, 0x1e11 },
189 { RAL_TXRX_CSR21, 0xe78f },
190 { RAL_MAC_CSR9, 0xff1d },
191 { RAL_MAC_CSR11, 0x0002 },
192 { RAL_MAC_CSR22, 0x0053 },
193 { RAL_MAC_CSR15, 0x0000 },
194 { RAL_MAC_CSR8, 0x0780 },
195 { RAL_TXRX_CSR19, 0x0000 },
196 { RAL_TXRX_CSR18, 0x005a },
197 { RAL_PHY_CSR2, 0x0000 },
198 { RAL_TXRX_CSR0, 0x1ec0 },
199 { RAL_PHY_CSR4, 0x000f }
200 };
201
202 /*
203 * Default values for BBP registers; values taken from the reference driver.
204 */
205 static const struct {
206 uint8_t reg;
207 uint8_t val;
208 } ural_def_bbp[] = {
209 { 3, 0x02 },
210 { 4, 0x19 },
211 { 14, 0x1c },
212 { 15, 0x30 },
213 { 16, 0xac },
214 { 17, 0x48 },
215 { 18, 0x18 },
216 { 19, 0xff },
217 { 20, 0x1e },
218 { 21, 0x08 },
219 { 22, 0x08 },
220 { 23, 0x08 },
221 { 24, 0x80 },
222 { 25, 0x50 },
223 { 26, 0x08 },
224 { 27, 0x23 },
225 { 30, 0x10 },
226 { 31, 0x2b },
227 { 32, 0xb9 },
228 { 34, 0x12 },
229 { 35, 0x50 },
230 { 39, 0xc4 },
231 { 40, 0x02 },
232 { 41, 0x60 },
233 { 53, 0x10 },
234 { 54, 0x18 },
235 { 56, 0x08 },
236 { 57, 0x10 },
237 { 58, 0x08 },
238 { 61, 0x60 },
239 { 62, 0x10 },
240 { 75, 0xff }
241 };
242
243 /*
244 * Default values for RF register R2 indexed by channel numbers.
245 */
246 static const uint32_t ural_rf2522_r2[] = {
247 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814,
248 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e
249 };
250
251 static const uint32_t ural_rf2523_r2[] = {
252 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
253 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
254 };
255
256 static const uint32_t ural_rf2524_r2[] = {
257 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
258 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
259 };
260
261 static const uint32_t ural_rf2525_r2[] = {
262 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d,
263 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346
264 };
265
266 static const uint32_t ural_rf2525_hi_r2[] = {
267 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345,
268 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e
269 };
270
271 static const uint32_t ural_rf2525e_r2[] = {
272 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463,
273 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b
274 };
275
276 static const uint32_t ural_rf2526_hi_r2[] = {
277 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d,
278 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241
279 };
280
281 static const uint32_t ural_rf2526_r2[] = {
282 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229,
283 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d
284 };
285
286 /*
287 * For dual-band RF, RF registers R1 and R4 also depend on channel number;
288 * values taken from the reference driver.
289 */
290 static const struct {
291 uint8_t chan;
292 uint32_t r1;
293 uint32_t r2;
294 uint32_t r4;
295 } ural_rf5222[] = {
296 { 1, 0x08808, 0x0044d, 0x00282 },
297 { 2, 0x08808, 0x0044e, 0x00282 },
298 { 3, 0x08808, 0x0044f, 0x00282 },
299 { 4, 0x08808, 0x00460, 0x00282 },
300 { 5, 0x08808, 0x00461, 0x00282 },
301 { 6, 0x08808, 0x00462, 0x00282 },
302 { 7, 0x08808, 0x00463, 0x00282 },
303 { 8, 0x08808, 0x00464, 0x00282 },
304 { 9, 0x08808, 0x00465, 0x00282 },
305 { 10, 0x08808, 0x00466, 0x00282 },
306 { 11, 0x08808, 0x00467, 0x00282 },
307 { 12, 0x08808, 0x00468, 0x00282 },
308 { 13, 0x08808, 0x00469, 0x00282 },
309 { 14, 0x08808, 0x0046b, 0x00286 },
310
311 { 36, 0x08804, 0x06225, 0x00287 },
312 { 40, 0x08804, 0x06226, 0x00287 },
313 { 44, 0x08804, 0x06227, 0x00287 },
314 { 48, 0x08804, 0x06228, 0x00287 },
315 { 52, 0x08804, 0x06229, 0x00287 },
316 { 56, 0x08804, 0x0622a, 0x00287 },
317 { 60, 0x08804, 0x0622b, 0x00287 },
318 { 64, 0x08804, 0x0622c, 0x00287 },
319
320 { 100, 0x08804, 0x02200, 0x00283 },
321 { 104, 0x08804, 0x02201, 0x00283 },
322 { 108, 0x08804, 0x02202, 0x00283 },
323 { 112, 0x08804, 0x02203, 0x00283 },
324 { 116, 0x08804, 0x02204, 0x00283 },
325 { 120, 0x08804, 0x02205, 0x00283 },
326 { 124, 0x08804, 0x02206, 0x00283 },
327 { 128, 0x08804, 0x02207, 0x00283 },
328 { 132, 0x08804, 0x02208, 0x00283 },
329 { 136, 0x08804, 0x02209, 0x00283 },
330 { 140, 0x08804, 0x0220a, 0x00283 },
331
332 { 149, 0x08808, 0x02429, 0x00281 },
333 { 153, 0x08808, 0x0242b, 0x00281 },
334 { 157, 0x08808, 0x0242d, 0x00281 },
335 { 161, 0x08808, 0x0242f, 0x00281 }
336 };
337
338 static int ural_match(device_t, cfdata_t, void *);
339 static void ural_attach(device_t, device_t, void *);
340 static int ural_detach(device_t, int);
341 static int ural_activate(device_t, enum devact);
342
343 CFATTACH_DECL_NEW(ural, sizeof(struct ural_softc), ural_match, ural_attach,
344 ural_detach, ural_activate);
345
346 static int
ural_match(device_t parent,cfdata_t match,void * aux)347 ural_match(device_t parent, cfdata_t match, void *aux)
348 {
349 struct usb_attach_arg *uaa = aux;
350
351 return (usb_lookup(ural_devs, uaa->uaa_vendor, uaa->uaa_product) != NULL) ?
352 UMATCH_VENDOR_PRODUCT : UMATCH_NONE;
353 }
354
355 static void
ural_attach(device_t parent,device_t self,void * aux)356 ural_attach(device_t parent, device_t self, void *aux)
357 {
358 struct ural_softc *sc = device_private(self);
359 struct usb_attach_arg *uaa = aux;
360 struct ieee80211com *ic = &sc->sc_ic;
361 struct ifnet *ifp = &sc->sc_if;
362 usb_interface_descriptor_t *id;
363 usb_endpoint_descriptor_t *ed;
364 usbd_status error;
365 char *devinfop;
366 int i;
367
368 sc->sc_dev = self;
369 sc->sc_udev = uaa->uaa_device;
370 sc->sc_init_state = URAL_INIT_NONE;
371
372 aprint_naive("\n");
373 aprint_normal("\n");
374
375 devinfop = usbd_devinfo_alloc(sc->sc_udev, 0);
376 aprint_normal_dev(self, "%s\n", devinfop);
377 usbd_devinfo_free(devinfop);
378
379 error = usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0);
380 if (error != 0) {
381 aprint_error_dev(self, "failed to set configuration"
382 ", err=%s\n", usbd_errstr(error));
383 return;
384 }
385
386 /* get the first interface handle */
387 error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX,
388 &sc->sc_iface);
389 if (error != 0) {
390 aprint_error_dev(self, "could not get interface handle\n");
391 return;
392 }
393
394 /*
395 * Find endpoints.
396 */
397 id = usbd_get_interface_descriptor(sc->sc_iface);
398
399 sc->sc_rx_no = sc->sc_tx_no = -1;
400 for (i = 0; i < id->bNumEndpoints; i++) {
401 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i);
402 if (ed == NULL) {
403 aprint_error_dev(self,
404 "no endpoint descriptor for %d\n", i);
405 return;
406 }
407
408 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
409 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK)
410 sc->sc_rx_no = ed->bEndpointAddress;
411 else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT &&
412 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK)
413 sc->sc_tx_no = ed->bEndpointAddress;
414 }
415 if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) {
416 aprint_error_dev(self, "missing endpoint\n");
417 return;
418 }
419
420 usb_init_task(&sc->sc_task, ural_task, sc, 0);
421 callout_init(&sc->sc_scan_ch, 0);
422 sc->amrr.amrr_min_success_threshold = 1;
423 sc->amrr.amrr_max_success_threshold = 15;
424 callout_init(&sc->sc_amrr_ch, 0);
425
426 /* retrieve RT2570 rev. no */
427 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0);
428
429 /* retrieve MAC address and various other things from EEPROM */
430 ural_read_eeprom(sc);
431
432 aprint_normal_dev(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n",
433 sc->asic_rev, ural_get_rf(sc->rf_rev));
434
435 ifp->if_softc = sc;
436 memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ);
437 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
438 ifp->if_init = ural_init;
439 ifp->if_ioctl = ural_ioctl;
440 ifp->if_start = ural_start;
441 ifp->if_watchdog = ural_watchdog;
442 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN);
443 IFQ_SET_READY(&ifp->if_snd);
444
445 ic->ic_ifp = ifp;
446 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
447 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
448 ic->ic_state = IEEE80211_S_INIT;
449
450 /* set device capabilities */
451 ic->ic_caps =
452 IEEE80211_C_IBSS | /* IBSS mode supported */
453 IEEE80211_C_MONITOR | /* monitor mode supported */
454 IEEE80211_C_HOSTAP | /* HostAp mode supported */
455 IEEE80211_C_TXPMGT | /* tx power management */
456 IEEE80211_C_SHPREAMBLE | /* short preamble supported */
457 IEEE80211_C_SHSLOT | /* short slot time supported */
458 IEEE80211_C_WPA; /* 802.11i */
459
460 if (sc->rf_rev == RAL_RF_5222) {
461 /* set supported .11a rates */
462 ic->ic_sup_rates[IEEE80211_MODE_11A] = ieee80211_std_rateset_11a;
463
464 /* set supported .11a channels */
465 for (i = 36; i <= 64; i += 4) {
466 ic->ic_channels[i].ic_freq =
467 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
468 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
469 }
470 for (i = 100; i <= 140; i += 4) {
471 ic->ic_channels[i].ic_freq =
472 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
473 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
474 }
475 for (i = 149; i <= 161; i += 4) {
476 ic->ic_channels[i].ic_freq =
477 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
478 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
479 }
480 }
481
482 /* set supported .11b and .11g rates */
483 ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b;
484 ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g;
485
486 /* set supported .11b and .11g channels (1 through 14) */
487 for (i = 1; i <= 14; i++) {
488 ic->ic_channels[i].ic_freq =
489 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ);
490 ic->ic_channels[i].ic_flags =
491 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM |
492 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ;
493 }
494
495 if_attach(ifp);
496 ieee80211_ifattach(ic);
497 ic->ic_reset = ural_reset;
498
499 /* override state transition machine */
500 sc->sc_newstate = ic->ic_newstate;
501 ic->ic_newstate = ural_newstate;
502
503 /* XXX media locking needs revisiting */
504 mutex_init(&sc->sc_media_mtx, MUTEX_DEFAULT, IPL_SOFTUSB);
505 ieee80211_media_init_with_lock(ic,
506 ural_media_change, ieee80211_media_status, &sc->sc_media_mtx);
507
508 bpf_attach2(ifp, DLT_IEEE802_11_RADIO,
509 sizeof(struct ieee80211_frame) + 64, &sc->sc_drvbpf);
510
511 sc->sc_rxtap_len = sizeof(sc->sc_rxtapu);
512 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
513 sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT);
514
515 sc->sc_txtap_len = sizeof(sc->sc_txtapu);
516 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
517 sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT);
518
519 ieee80211_announce(ic);
520
521 sc->sc_init_state = URAL_INIT_INITED;
522
523 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, sc->sc_dev);
524
525 if (!pmf_device_register(self, NULL, NULL))
526 aprint_error_dev(self, "couldn't establish power handler\n");
527
528 return;
529 }
530
531 static int
ural_detach(device_t self,int flags)532 ural_detach(device_t self, int flags)
533 {
534 struct ural_softc *sc = device_private(self);
535 struct ieee80211com *ic = &sc->sc_ic;
536 struct ifnet *ifp = &sc->sc_if;
537 int s;
538
539 if (sc->sc_init_state < URAL_INIT_INITED)
540 return 0;
541
542 pmf_device_deregister(self);
543
544 s = splusb();
545
546 ural_stop(ifp, 1);
547 callout_halt(&sc->sc_scan_ch, NULL);
548 callout_halt(&sc->sc_amrr_ch, NULL);
549 usb_rem_task_wait(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER, NULL);
550
551 bpf_detach(ifp);
552 ieee80211_ifdetach(ic);
553 if_detach(ifp);
554
555 splx(s);
556
557 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, sc->sc_dev);
558
559 return 0;
560 }
561
562 Static int
ural_alloc_tx_list(struct ural_softc * sc)563 ural_alloc_tx_list(struct ural_softc *sc)
564 {
565 struct ural_tx_data *data;
566 int i, error;
567
568 sc->tx_queued = 0;
569
570 for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
571 data = &sc->tx_data[i];
572
573 data->sc = sc;
574 error = usbd_create_xfer(sc->sc_tx_pipeh,
575 RAL_TX_DESC_SIZE + MCLBYTES, USBD_FORCE_SHORT_XFER, 0,
576 &data->xfer);
577 if (error) {
578 printf("%s: could not allocate tx xfer\n",
579 device_xname(sc->sc_dev));
580 goto fail;
581 }
582
583 data->buf = usbd_get_buffer(data->xfer);
584 }
585
586 return 0;
587
588 fail: ural_free_tx_list(sc);
589 return error;
590 }
591
592 Static void
ural_free_tx_list(struct ural_softc * sc)593 ural_free_tx_list(struct ural_softc *sc)
594 {
595 struct ural_tx_data *data;
596 int i;
597
598 for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
599 data = &sc->tx_data[i];
600
601 if (data->xfer != NULL) {
602 usbd_destroy_xfer(data->xfer);
603 data->xfer = NULL;
604 }
605
606 if (data->ni != NULL) {
607 ieee80211_free_node(data->ni);
608 data->ni = NULL;
609 }
610 }
611 }
612
613 Static int
ural_alloc_rx_list(struct ural_softc * sc)614 ural_alloc_rx_list(struct ural_softc *sc)
615 {
616 struct ural_rx_data *data;
617 int i, error;
618
619 for (i = 0; i < RAL_RX_LIST_COUNT; i++) {
620 data = &sc->rx_data[i];
621
622 data->sc = sc;
623
624 error = usbd_create_xfer(sc->sc_rx_pipeh, MCLBYTES,
625 0, 0, &data->xfer);
626 if (error) {
627 printf("%s: could not allocate rx xfer\n",
628 device_xname(sc->sc_dev));
629 goto fail;
630 }
631
632 MGETHDR(data->m, M_DONTWAIT, MT_DATA);
633 if (data->m == NULL) {
634 printf("%s: could not allocate rx mbuf\n",
635 device_xname(sc->sc_dev));
636 error = ENOMEM;
637 goto fail;
638 }
639
640 MCLGET(data->m, M_DONTWAIT);
641 if (!(data->m->m_flags & M_EXT)) {
642 printf("%s: could not allocate rx mbuf cluster\n",
643 device_xname(sc->sc_dev));
644 error = ENOMEM;
645 goto fail;
646 }
647
648 data->buf = mtod(data->m, uint8_t *);
649 }
650
651 return 0;
652
653 fail: ural_free_rx_list(sc);
654 return error;
655 }
656
657 Static void
ural_free_rx_list(struct ural_softc * sc)658 ural_free_rx_list(struct ural_softc *sc)
659 {
660 struct ural_rx_data *data;
661 int i;
662
663 for (i = 0; i < RAL_RX_LIST_COUNT; i++) {
664 data = &sc->rx_data[i];
665
666 if (data->xfer != NULL) {
667 usbd_destroy_xfer(data->xfer);
668 data->xfer = NULL;
669 }
670
671 m_freem(data->m);
672 data->m = NULL;
673 }
674 }
675
676 Static int
ural_media_change(struct ifnet * ifp)677 ural_media_change(struct ifnet *ifp)
678 {
679 int error;
680
681 error = ieee80211_media_change(ifp);
682 if (error != ENETRESET)
683 return error;
684
685 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
686 ural_init(ifp);
687
688 return 0;
689 }
690
691 /*
692 * This function is called periodically (every 200ms) during scanning to
693 * switch from one channel to another.
694 */
695 Static void
ural_next_scan(void * arg)696 ural_next_scan(void *arg)
697 {
698 struct ural_softc *sc = arg;
699 struct ieee80211com *ic = &sc->sc_ic;
700
701 if (ic->ic_state == IEEE80211_S_SCAN)
702 ieee80211_next_scan(ic);
703 }
704
705 Static void
ural_task(void * arg)706 ural_task(void *arg)
707 {
708 struct ural_softc *sc = arg;
709 struct ieee80211com *ic = &sc->sc_ic;
710 enum ieee80211_state ostate;
711 struct ieee80211_node *ni;
712 struct mbuf *m;
713
714 ostate = ic->ic_state;
715
716 switch (sc->sc_state) {
717 case IEEE80211_S_INIT:
718 if (ostate == IEEE80211_S_RUN) {
719 /* abort TSF synchronization */
720 ural_write(sc, RAL_TXRX_CSR19, 0);
721
722 /* force tx led to stop blinking */
723 ural_write(sc, RAL_MAC_CSR20, 0);
724 }
725 break;
726
727 case IEEE80211_S_SCAN:
728 ural_set_chan(sc, ic->ic_curchan);
729 callout_reset(&sc->sc_scan_ch, hz / 5, ural_next_scan, sc);
730 break;
731
732 case IEEE80211_S_AUTH:
733 ural_set_chan(sc, ic->ic_curchan);
734 break;
735
736 case IEEE80211_S_ASSOC:
737 ural_set_chan(sc, ic->ic_curchan);
738 break;
739
740 case IEEE80211_S_RUN:
741 ural_set_chan(sc, ic->ic_curchan);
742
743 ni = ic->ic_bss;
744
745 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
746 ural_update_slot(ic->ic_ifp);
747 ural_set_txpreamble(sc);
748 ural_set_basicrates(sc);
749 ural_set_bssid(sc, ni->ni_bssid);
750 }
751
752 if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
753 ic->ic_opmode == IEEE80211_M_IBSS) {
754 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo);
755 if (m == NULL) {
756 printf("%s: could not allocate beacon\n",
757 device_xname(sc->sc_dev));
758 return;
759 }
760
761 if (ural_tx_bcn(sc, m, ni) != 0) {
762 m_freem(m);
763 printf("%s: could not send beacon\n",
764 device_xname(sc->sc_dev));
765 return;
766 }
767
768 /* beacon is no longer needed */
769 m_freem(m);
770 }
771
772 /* make tx led blink on tx (controlled by ASIC) */
773 ural_write(sc, RAL_MAC_CSR20, 1);
774
775 if (ic->ic_opmode != IEEE80211_M_MONITOR)
776 ural_enable_tsf_sync(sc);
777
778 /* enable automatic rate adaptation in STA mode */
779 if (ic->ic_opmode == IEEE80211_M_STA &&
780 ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE)
781 ural_amrr_start(sc, ni);
782
783 break;
784 }
785
786 sc->sc_newstate(ic, sc->sc_state, -1);
787 }
788
789 Static int
ural_newstate(struct ieee80211com * ic,enum ieee80211_state nstate,int arg)790 ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate,
791 int arg)
792 {
793 struct ural_softc *sc = ic->ic_ifp->if_softc;
794
795 /*
796 * XXXSMP: This does not wait for the task, if it is in flight,
797 * to complete. If this code works at all, it must rely on the
798 * kernel lock to serialize with the USB task thread.
799 */
800 usb_rem_task(sc->sc_udev, &sc->sc_task);
801 callout_stop(&sc->sc_scan_ch);
802 callout_stop(&sc->sc_amrr_ch);
803
804 /* do it in a process context */
805 sc->sc_state = nstate;
806 usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER);
807
808 return 0;
809 }
810
811 /* quickly determine if a given rate is CCK or OFDM */
812 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22)
813
814 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */
815 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */
816
817 #define RAL_SIFS 10 /* us */
818
819 #define RAL_RXTX_TURNAROUND 5 /* us */
820
821 /*
822 * This function is only used by the Rx radiotap code.
823 */
824 Static int
ural_rxrate(struct ural_rx_desc * desc)825 ural_rxrate(struct ural_rx_desc *desc)
826 {
827 if (le32toh(desc->flags) & RAL_RX_OFDM) {
828 /* reverse function of ural_plcp_signal */
829 switch (desc->rate) {
830 case 0xb: return 12;
831 case 0xf: return 18;
832 case 0xa: return 24;
833 case 0xe: return 36;
834 case 0x9: return 48;
835 case 0xd: return 72;
836 case 0x8: return 96;
837 case 0xc: return 108;
838 }
839 } else {
840 if (desc->rate == 10)
841 return 2;
842 if (desc->rate == 20)
843 return 4;
844 if (desc->rate == 55)
845 return 11;
846 if (desc->rate == 110)
847 return 22;
848 }
849 return 2; /* should not get there */
850 }
851
852 Static void
ural_txeof(struct usbd_xfer * xfer,void * priv,usbd_status status)853 ural_txeof(struct usbd_xfer *xfer, void * priv,
854 usbd_status status)
855 {
856 struct ural_tx_data *data = priv;
857 struct ural_softc *sc = data->sc;
858 struct ifnet *ifp = &sc->sc_if;
859 int s;
860
861 if (status != USBD_NORMAL_COMPLETION) {
862 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED)
863 return;
864
865 printf("%s: could not transmit buffer: %s\n",
866 device_xname(sc->sc_dev), usbd_errstr(status));
867
868 if (status == USBD_STALLED)
869 usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh);
870
871 if_statinc(ifp, if_oerrors);
872 return;
873 }
874
875 s = splnet();
876
877 m_freem(data->m);
878 data->m = NULL;
879 ieee80211_free_node(data->ni);
880 data->ni = NULL;
881
882 sc->tx_queued--;
883 if_statinc(ifp, if_opackets);
884
885 DPRINTFN(10, ("tx done\n"));
886
887 sc->sc_tx_timer = 0;
888 ifp->if_flags &= ~IFF_OACTIVE;
889 ural_start(ifp);
890
891 splx(s);
892 }
893
894 Static void
ural_rxeof(struct usbd_xfer * xfer,void * priv,usbd_status status)895 ural_rxeof(struct usbd_xfer *xfer, void * priv, usbd_status status)
896 {
897 struct ural_rx_data *data = priv;
898 struct ural_softc *sc = data->sc;
899 struct ieee80211com *ic = &sc->sc_ic;
900 struct ifnet *ifp = &sc->sc_if;
901 struct ural_rx_desc *desc;
902 struct ieee80211_frame *wh;
903 struct ieee80211_node *ni;
904 struct mbuf *mnew, *m;
905 int s, len;
906
907 if (status != USBD_NORMAL_COMPLETION) {
908 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED)
909 return;
910
911 if (status == USBD_STALLED)
912 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh);
913 goto skip;
914 }
915
916 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL);
917
918 if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) {
919 DPRINTF(("%s: xfer too short %d\n", device_xname(sc->sc_dev),
920 len));
921 if_statinc(ifp, if_ierrors);
922 goto skip;
923 }
924
925 /* rx descriptor is located at the end */
926 desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE);
927
928 if ((le32toh(desc->flags) & RAL_RX_PHY_ERROR) ||
929 (le32toh(desc->flags) & RAL_RX_CRC_ERROR)) {
930 /*
931 * This should not happen since we did not request to receive
932 * those frames when we filled RAL_TXRX_CSR2.
933 */
934 DPRINTFN(5, ("PHY or CRC error\n"));
935 if_statinc(ifp, if_ierrors);
936 goto skip;
937 }
938
939 MGETHDR(mnew, M_DONTWAIT, MT_DATA);
940 if (mnew == NULL) {
941 if_statinc(ifp, if_ierrors);
942 goto skip;
943 }
944
945 MCLGET(mnew, M_DONTWAIT);
946 if (!(mnew->m_flags & M_EXT)) {
947 if_statinc(ifp, if_ierrors);
948 m_freem(mnew);
949 goto skip;
950 }
951
952 m = data->m;
953 data->m = mnew;
954 data->buf = mtod(data->m, uint8_t *);
955
956 /* finalize mbuf */
957 m_set_rcvif(m, ifp);
958 m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff;
959 m->m_flags |= M_HASFCS; /* h/w leaves FCS */
960
961 s = splnet();
962
963 if (sc->sc_drvbpf != NULL) {
964 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap;
965
966 tap->wr_flags = IEEE80211_RADIOTAP_F_FCS;
967 tap->wr_rate = ural_rxrate(desc);
968 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq);
969 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags);
970 tap->wr_antenna = sc->rx_ant;
971 tap->wr_antsignal = desc->rssi;
972
973 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m, BPF_D_IN);
974 }
975
976 wh = mtod(m, struct ieee80211_frame *);
977 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh);
978
979 /* send the frame to the 802.11 layer */
980 ieee80211_input(ic, m, ni, desc->rssi, 0);
981
982 /* node is no longer needed */
983 ieee80211_free_node(ni);
984
985 splx(s);
986
987 DPRINTFN(15, ("rx done\n"));
988
989 skip: /* setup a new transfer */
990 usbd_setup_xfer(xfer, data, data->buf, MCLBYTES,
991 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof);
992 usbd_transfer(xfer);
993 }
994
995 /*
996 * Return the expected ack rate for a frame transmitted at rate `rate'.
997 * XXX: this should depend on the destination node basic rate set.
998 */
999 Static int
ural_ack_rate(struct ieee80211com * ic,int rate)1000 ural_ack_rate(struct ieee80211com *ic, int rate)
1001 {
1002 switch (rate) {
1003 /* CCK rates */
1004 case 2:
1005 return 2;
1006 case 4:
1007 case 11:
1008 case 22:
1009 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate;
1010
1011 /* OFDM rates */
1012 case 12:
1013 case 18:
1014 return 12;
1015 case 24:
1016 case 36:
1017 return 24;
1018 case 48:
1019 case 72:
1020 case 96:
1021 case 108:
1022 return 48;
1023 }
1024
1025 /* default to 1Mbps */
1026 return 2;
1027 }
1028
1029 /*
1030 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'.
1031 * The function automatically determines the operating mode depending on the
1032 * given rate. `flags' indicates whether short preamble is in use or not.
1033 */
1034 Static uint16_t
ural_txtime(int len,int rate,uint32_t flags)1035 ural_txtime(int len, int rate, uint32_t flags)
1036 {
1037 uint16_t txtime;
1038
1039 if (RAL_RATE_IS_OFDM(rate)) {
1040 /* IEEE Std 802.11g-2003, pp. 37 */
1041 txtime = (8 + 4 * len + 3 + rate - 1) / rate;
1042 txtime = 16 + 4 + 4 * txtime + 6;
1043 } else {
1044 /* IEEE Std 802.11b-1999, pp. 28 */
1045 txtime = (16 * len + rate - 1) / rate;
1046 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE))
1047 txtime += 72 + 24;
1048 else
1049 txtime += 144 + 48;
1050 }
1051 return txtime;
1052 }
1053
1054 Static uint8_t
ural_plcp_signal(int rate)1055 ural_plcp_signal(int rate)
1056 {
1057 switch (rate) {
1058 /* CCK rates (returned values are device-dependent) */
1059 case 2: return 0x0;
1060 case 4: return 0x1;
1061 case 11: return 0x2;
1062 case 22: return 0x3;
1063
1064 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
1065 case 12: return 0xb;
1066 case 18: return 0xf;
1067 case 24: return 0xa;
1068 case 36: return 0xe;
1069 case 48: return 0x9;
1070 case 72: return 0xd;
1071 case 96: return 0x8;
1072 case 108: return 0xc;
1073
1074 /* unsupported rates (should not get there) */
1075 default: return 0xff;
1076 }
1077 }
1078
1079 Static void
ural_setup_tx_desc(struct ural_softc * sc,struct ural_tx_desc * desc,uint32_t flags,int len,int rate)1080 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc,
1081 uint32_t flags, int len, int rate)
1082 {
1083 struct ieee80211com *ic = &sc->sc_ic;
1084 uint16_t plcp_length;
1085 int remainder;
1086
1087 desc->flags = htole32(flags);
1088 desc->flags |= htole32(RAL_TX_NEWSEQ);
1089 desc->flags |= htole32(len << 16);
1090
1091 desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5));
1092 desc->wme |= htole16(RAL_IVOFFSET(sizeof(struct ieee80211_frame)));
1093
1094 /* setup PLCP fields */
1095 desc->plcp_signal = ural_plcp_signal(rate);
1096 desc->plcp_service = 4;
1097
1098 len += IEEE80211_CRC_LEN;
1099 if (RAL_RATE_IS_OFDM(rate)) {
1100 desc->flags |= htole32(RAL_TX_OFDM);
1101
1102 plcp_length = len & 0xfff;
1103 desc->plcp_length_hi = plcp_length >> 6;
1104 desc->plcp_length_lo = plcp_length & 0x3f;
1105 } else {
1106 plcp_length = (16 * len + rate - 1) / rate;
1107 if (rate == 22) {
1108 remainder = (16 * len) % 22;
1109 if (remainder != 0 && remainder < 7)
1110 desc->plcp_service |= RAL_PLCP_LENGEXT;
1111 }
1112 desc->plcp_length_hi = plcp_length >> 8;
1113 desc->plcp_length_lo = plcp_length & 0xff;
1114
1115 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1116 desc->plcp_signal |= 0x08;
1117 }
1118
1119 desc->iv = 0;
1120 desc->eiv = 0;
1121 }
1122
1123 #define RAL_TX_TIMEOUT 5000
1124
1125 Static int
ural_tx_bcn(struct ural_softc * sc,struct mbuf * m0,struct ieee80211_node * ni)1126 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1127 {
1128 struct ural_tx_desc *desc;
1129 struct usbd_xfer *xfer;
1130 uint8_t cmd = 0;
1131 usbd_status error;
1132 uint8_t *buf;
1133 int xferlen, rate;
1134
1135 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2;
1136
1137 /* xfer length needs to be a multiple of two! */
1138 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1;
1139
1140 error = usbd_create_xfer(sc->sc_tx_pipeh, xferlen,
1141 USBD_FORCE_SHORT_XFER, 0, &xfer);
1142 if (error)
1143 return error;
1144
1145 buf = usbd_get_buffer(xfer);
1146
1147 usbd_setup_xfer(xfer, NULL, &cmd, sizeof(cmd), USBD_FORCE_SHORT_XFER,
1148 RAL_TX_TIMEOUT, NULL);
1149
1150 error = usbd_sync_transfer(xfer);
1151 if (error != 0) {
1152 usbd_destroy_xfer(xfer);
1153 return error;
1154 }
1155
1156 desc = (struct ural_tx_desc *)buf;
1157
1158 m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE);
1159 ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP,
1160 m0->m_pkthdr.len, rate);
1161
1162 DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n",
1163 m0->m_pkthdr.len, rate, xferlen));
1164
1165 usbd_setup_xfer(xfer, NULL, buf, xferlen, USBD_FORCE_SHORT_XFER,
1166 RAL_TX_TIMEOUT, NULL);
1167
1168 error = usbd_sync_transfer(xfer);
1169 usbd_destroy_xfer(xfer);
1170
1171 return error;
1172 }
1173
1174 Static int
ural_tx_mgt(struct ural_softc * sc,struct mbuf * m0,struct ieee80211_node * ni)1175 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1176 {
1177 struct ieee80211com *ic = &sc->sc_ic;
1178 struct ural_tx_desc *desc;
1179 struct ural_tx_data *data;
1180 struct ieee80211_frame *wh;
1181 struct ieee80211_key *k;
1182 uint32_t flags = 0;
1183 uint16_t dur;
1184 usbd_status error;
1185 int xferlen, rate;
1186
1187 data = &sc->tx_data[0];
1188 desc = (struct ural_tx_desc *)data->buf;
1189
1190 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2;
1191
1192 wh = mtod(m0, struct ieee80211_frame *);
1193
1194 if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1195 k = ieee80211_crypto_encap(ic, ni, m0);
1196 if (k == NULL) {
1197 m_freem(m0);
1198 return ENOBUFS;
1199 }
1200 }
1201
1202 data->m = m0;
1203 data->ni = ni;
1204
1205 wh = mtod(m0, struct ieee80211_frame *);
1206
1207 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1208 flags |= RAL_TX_ACK;
1209
1210 dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS;
1211 *(uint16_t *)wh->i_dur = htole16(dur);
1212
1213 /* tell hardware to add timestamp for probe responses */
1214 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
1215 IEEE80211_FC0_TYPE_MGT &&
1216 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
1217 IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1218 flags |= RAL_TX_TIMESTAMP;
1219 }
1220
1221 if (sc->sc_drvbpf != NULL) {
1222 struct ural_tx_radiotap_header *tap = &sc->sc_txtap;
1223
1224 tap->wt_flags = 0;
1225 tap->wt_rate = rate;
1226 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1227 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1228 tap->wt_antenna = sc->tx_ant;
1229
1230 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0, BPF_D_OUT);
1231 }
1232
1233 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE);
1234 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate);
1235
1236 /* align end on a 2-bytes boundary */
1237 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1;
1238
1239 /*
1240 * No space left in the last URB to store the extra 2 bytes, force
1241 * sending of another URB.
1242 */
1243 if ((xferlen % 64) == 0)
1244 xferlen += 2;
1245
1246 DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n",
1247 m0->m_pkthdr.len, rate, xferlen));
1248
1249 usbd_setup_xfer(data->xfer, data, data->buf, xferlen,
1250 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, ural_txeof);
1251
1252 error = usbd_transfer(data->xfer);
1253 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) {
1254 m_freem(m0);
1255 return error;
1256 }
1257
1258 sc->tx_queued++;
1259
1260 return 0;
1261 }
1262
1263 Static int
ural_tx_data(struct ural_softc * sc,struct mbuf * m0,struct ieee80211_node * ni)1264 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1265 {
1266 struct ieee80211com *ic = &sc->sc_ic;
1267 struct ural_tx_desc *desc;
1268 struct ural_tx_data *data;
1269 struct ieee80211_frame *wh;
1270 struct ieee80211_key *k;
1271 uint32_t flags = 0;
1272 uint16_t dur;
1273 usbd_status error;
1274 int xferlen, rate;
1275
1276 wh = mtod(m0, struct ieee80211_frame *);
1277
1278 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE)
1279 rate = ic->ic_bss->ni_rates.rs_rates[ic->ic_fixed_rate];
1280 else
1281 rate = ni->ni_rates.rs_rates[ni->ni_txrate];
1282
1283 rate &= IEEE80211_RATE_VAL;
1284
1285 if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1286 k = ieee80211_crypto_encap(ic, ni, m0);
1287 if (k == NULL) {
1288 m_freem(m0);
1289 return ENOBUFS;
1290 }
1291
1292 /* packet header may have moved, reset our local pointer */
1293 wh = mtod(m0, struct ieee80211_frame *);
1294 }
1295
1296 data = &sc->tx_data[0];
1297 desc = (struct ural_tx_desc *)data->buf;
1298
1299 data->m = m0;
1300 data->ni = ni;
1301
1302 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1303 flags |= RAL_TX_ACK;
1304 flags |= RAL_TX_RETRY(7);
1305
1306 dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate),
1307 ic->ic_flags) + RAL_SIFS;
1308 *(uint16_t *)wh->i_dur = htole16(dur);
1309 }
1310
1311 if (sc->sc_drvbpf != NULL) {
1312 struct ural_tx_radiotap_header *tap = &sc->sc_txtap;
1313
1314 tap->wt_flags = 0;
1315 tap->wt_rate = rate;
1316 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1317 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1318 tap->wt_antenna = sc->tx_ant;
1319
1320 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0, BPF_D_OUT);
1321 }
1322
1323 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE);
1324 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate);
1325
1326 /* align end on a 2-bytes boundary */
1327 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1;
1328
1329 /*
1330 * No space left in the last URB to store the extra 2 bytes, force
1331 * sending of another URB.
1332 */
1333 if ((xferlen % 64) == 0)
1334 xferlen += 2;
1335
1336 DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n",
1337 m0->m_pkthdr.len, rate, xferlen));
1338 usbd_setup_xfer(data->xfer, data, data->buf, xferlen,
1339 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, ural_txeof);
1340
1341 error = usbd_transfer(data->xfer);
1342 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS)
1343 return error;
1344
1345 sc->tx_queued++;
1346
1347 return 0;
1348 }
1349
1350 Static void
ural_start(struct ifnet * ifp)1351 ural_start(struct ifnet *ifp)
1352 {
1353 struct ural_softc *sc = ifp->if_softc;
1354 struct ieee80211com *ic = &sc->sc_ic;
1355 struct mbuf *m0;
1356 struct ether_header *eh;
1357 struct ieee80211_node *ni;
1358
1359 for (;;) {
1360 IF_POLL(&ic->ic_mgtq, m0);
1361 if (m0 != NULL) {
1362 if (sc->tx_queued >= RAL_TX_LIST_COUNT) {
1363 ifp->if_flags |= IFF_OACTIVE;
1364 break;
1365 }
1366 IF_DEQUEUE(&ic->ic_mgtq, m0);
1367
1368 ni = M_GETCTX(m0, struct ieee80211_node *);
1369 M_CLEARCTX(m0);
1370 bpf_mtap3(ic->ic_rawbpf, m0, BPF_D_OUT);
1371 if (ural_tx_mgt(sc, m0, ni) != 0)
1372 break;
1373
1374 } else {
1375 if (ic->ic_state != IEEE80211_S_RUN)
1376 break;
1377 IFQ_POLL(&ifp->if_snd, m0);
1378 if (m0 == NULL)
1379 break;
1380 if (sc->tx_queued >= RAL_TX_LIST_COUNT) {
1381 ifp->if_flags |= IFF_OACTIVE;
1382 break;
1383 }
1384 IFQ_DEQUEUE(&ifp->if_snd, m0);
1385
1386 if (m0->m_len < sizeof(struct ether_header) &&
1387 !(m0 = m_pullup(m0, sizeof(struct ether_header))))
1388 continue;
1389
1390 eh = mtod(m0, struct ether_header *);
1391 ni = ieee80211_find_txnode(ic, eh->ether_dhost);
1392 if (ni == NULL) {
1393 m_freem(m0);
1394 continue;
1395 }
1396 bpf_mtap(ifp, m0, BPF_D_OUT);
1397 m0 = ieee80211_encap(ic, m0, ni);
1398 if (m0 == NULL) {
1399 ieee80211_free_node(ni);
1400 continue;
1401 }
1402 bpf_mtap3(ic->ic_rawbpf, m0, BPF_D_OUT);
1403 if (ural_tx_data(sc, m0, ni) != 0) {
1404 ieee80211_free_node(ni);
1405 if_statinc(ifp, if_oerrors);
1406 break;
1407 }
1408 }
1409
1410 sc->sc_tx_timer = 5;
1411 ifp->if_timer = 1;
1412 }
1413 }
1414
1415 Static void
ural_watchdog(struct ifnet * ifp)1416 ural_watchdog(struct ifnet *ifp)
1417 {
1418 struct ural_softc *sc = ifp->if_softc;
1419 struct ieee80211com *ic = &sc->sc_ic;
1420
1421 ifp->if_timer = 0;
1422
1423 if (sc->sc_tx_timer > 0) {
1424 if (--sc->sc_tx_timer == 0) {
1425 printf("%s: device timeout\n", device_xname(sc->sc_dev));
1426 /*ural_init(sc); XXX needs a process context! */
1427 if_statinc(ifp, if_oerrors);
1428 return;
1429 }
1430 ifp->if_timer = 1;
1431 }
1432
1433 ieee80211_watchdog(ic);
1434 }
1435
1436 /*
1437 * This function allows for fast channel switching in monitor mode (used by
1438 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to
1439 * generate a new beacon frame.
1440 */
1441 Static int
ural_reset(struct ifnet * ifp)1442 ural_reset(struct ifnet *ifp)
1443 {
1444 struct ural_softc *sc = ifp->if_softc;
1445 struct ieee80211com *ic = &sc->sc_ic;
1446
1447 if (ic->ic_opmode != IEEE80211_M_MONITOR)
1448 return ENETRESET;
1449
1450 ural_set_chan(sc, ic->ic_curchan);
1451
1452 return 0;
1453 }
1454
1455 Static int
ural_ioctl(struct ifnet * ifp,u_long cmd,void * data)1456 ural_ioctl(struct ifnet *ifp, u_long cmd, void *data)
1457 {
1458 #define IS_RUNNING(ifp) \
1459 (((ifp)->if_flags & IFF_UP) && ((ifp)->if_flags & IFF_RUNNING))
1460
1461 struct ural_softc *sc = ifp->if_softc;
1462 struct ieee80211com *ic = &sc->sc_ic;
1463 int s, error = 0;
1464
1465 s = splnet();
1466
1467 switch (cmd) {
1468 case SIOCSIFFLAGS:
1469 if ((error = ifioctl_common(ifp, cmd, data)) != 0)
1470 break;
1471 /* XXX re-use ether_ioctl() */
1472 switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) {
1473 case IFF_UP|IFF_RUNNING:
1474 ural_update_promisc(sc);
1475 break;
1476 case IFF_UP:
1477 ural_init(ifp);
1478 break;
1479 case IFF_RUNNING:
1480 ural_stop(ifp, 1);
1481 break;
1482 case 0:
1483 break;
1484 }
1485 break;
1486
1487 case SIOCADDMULTI:
1488 case SIOCDELMULTI:
1489 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) {
1490 error = 0;
1491 }
1492 break;
1493
1494 default:
1495 error = ieee80211_ioctl(ic, cmd, data);
1496 }
1497
1498 if (error == ENETRESET) {
1499 if (IS_RUNNING(ifp) &&
1500 (ic->ic_roaming != IEEE80211_ROAMING_MANUAL))
1501 ural_init(ifp);
1502 error = 0;
1503 }
1504
1505 splx(s);
1506
1507 return error;
1508 #undef IS_RUNNING
1509 }
1510
1511 Static void
ural_set_testmode(struct ural_softc * sc)1512 ural_set_testmode(struct ural_softc *sc)
1513 {
1514 usb_device_request_t req;
1515 usbd_status error;
1516
1517 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1518 req.bRequest = RAL_VENDOR_REQUEST;
1519 USETW(req.wValue, 4);
1520 USETW(req.wIndex, 1);
1521 USETW(req.wLength, 0);
1522
1523 error = usbd_do_request(sc->sc_udev, &req, NULL);
1524 if (error != 0) {
1525 printf("%s: could not set test mode: %s\n",
1526 device_xname(sc->sc_dev), usbd_errstr(error));
1527 }
1528 }
1529
1530 Static void
ural_eeprom_read(struct ural_softc * sc,uint16_t addr,void * buf,int len)1531 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len)
1532 {
1533 usb_device_request_t req;
1534 usbd_status error;
1535
1536 req.bmRequestType = UT_READ_VENDOR_DEVICE;
1537 req.bRequest = RAL_READ_EEPROM;
1538 USETW(req.wValue, 0);
1539 USETW(req.wIndex, addr);
1540 USETW(req.wLength, len);
1541
1542 error = usbd_do_request(sc->sc_udev, &req, buf);
1543 if (error != 0) {
1544 printf("%s: could not read EEPROM: %s\n",
1545 device_xname(sc->sc_dev), usbd_errstr(error));
1546 }
1547 }
1548
1549 Static uint16_t
ural_read(struct ural_softc * sc,uint16_t reg)1550 ural_read(struct ural_softc *sc, uint16_t reg)
1551 {
1552 usb_device_request_t req;
1553 usbd_status error;
1554 uint16_t val;
1555
1556 req.bmRequestType = UT_READ_VENDOR_DEVICE;
1557 req.bRequest = RAL_READ_MAC;
1558 USETW(req.wValue, 0);
1559 USETW(req.wIndex, reg);
1560 USETW(req.wLength, sizeof(uint16_t));
1561
1562 error = usbd_do_request(sc->sc_udev, &req, &val);
1563 if (error != 0) {
1564 printf("%s: could not read MAC register: %s\n",
1565 device_xname(sc->sc_dev), usbd_errstr(error));
1566 return 0;
1567 }
1568
1569 return le16toh(val);
1570 }
1571
1572 Static void
ural_read_multi(struct ural_softc * sc,uint16_t reg,void * buf,int len)1573 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1574 {
1575 usb_device_request_t req;
1576 usbd_status error;
1577
1578 req.bmRequestType = UT_READ_VENDOR_DEVICE;
1579 req.bRequest = RAL_READ_MULTI_MAC;
1580 USETW(req.wValue, 0);
1581 USETW(req.wIndex, reg);
1582 USETW(req.wLength, len);
1583
1584 error = usbd_do_request(sc->sc_udev, &req, buf);
1585 if (error != 0) {
1586 printf("%s: could not read MAC register: %s\n",
1587 device_xname(sc->sc_dev), usbd_errstr(error));
1588 }
1589 }
1590
1591 Static void
ural_write(struct ural_softc * sc,uint16_t reg,uint16_t val)1592 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val)
1593 {
1594 usb_device_request_t req;
1595 usbd_status error;
1596
1597 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1598 req.bRequest = RAL_WRITE_MAC;
1599 USETW(req.wValue, val);
1600 USETW(req.wIndex, reg);
1601 USETW(req.wLength, 0);
1602
1603 error = usbd_do_request(sc->sc_udev, &req, NULL);
1604 if (error != 0) {
1605 printf("%s: could not write MAC register: %s\n",
1606 device_xname(sc->sc_dev), usbd_errstr(error));
1607 }
1608 }
1609
1610 Static void
ural_write_multi(struct ural_softc * sc,uint16_t reg,void * buf,int len)1611 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1612 {
1613 usb_device_request_t req;
1614 usbd_status error;
1615
1616 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1617 req.bRequest = RAL_WRITE_MULTI_MAC;
1618 USETW(req.wValue, 0);
1619 USETW(req.wIndex, reg);
1620 USETW(req.wLength, len);
1621
1622 error = usbd_do_request(sc->sc_udev, &req, buf);
1623 if (error != 0) {
1624 printf("%s: could not write MAC register: %s\n",
1625 device_xname(sc->sc_dev), usbd_errstr(error));
1626 }
1627 }
1628
1629 Static void
ural_bbp_write(struct ural_softc * sc,uint8_t reg,uint8_t val)1630 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val)
1631 {
1632 uint16_t tmp;
1633 int ntries;
1634
1635 for (ntries = 0; ntries < 5; ntries++) {
1636 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1637 break;
1638 }
1639 if (ntries == 5) {
1640 printf("%s: could not write to BBP\n", device_xname(sc->sc_dev));
1641 return;
1642 }
1643
1644 tmp = reg << 8 | val;
1645 ural_write(sc, RAL_PHY_CSR7, tmp);
1646 }
1647
1648 Static uint8_t
ural_bbp_read(struct ural_softc * sc,uint8_t reg)1649 ural_bbp_read(struct ural_softc *sc, uint8_t reg)
1650 {
1651 uint16_t val;
1652 int ntries;
1653
1654 val = RAL_BBP_WRITE | reg << 8;
1655 ural_write(sc, RAL_PHY_CSR7, val);
1656
1657 for (ntries = 0; ntries < 5; ntries++) {
1658 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1659 break;
1660 }
1661 if (ntries == 5) {
1662 printf("%s: could not read BBP\n", device_xname(sc->sc_dev));
1663 return 0;
1664 }
1665
1666 return ural_read(sc, RAL_PHY_CSR7) & 0xff;
1667 }
1668
1669 Static void
ural_rf_write(struct ural_softc * sc,uint8_t reg,uint32_t val)1670 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val)
1671 {
1672 uint32_t tmp;
1673 int ntries;
1674
1675 for (ntries = 0; ntries < 5; ntries++) {
1676 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY))
1677 break;
1678 }
1679 if (ntries == 5) {
1680 printf("%s: could not write to RF\n", device_xname(sc->sc_dev));
1681 return;
1682 }
1683
1684 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3);
1685 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff);
1686 ural_write(sc, RAL_PHY_CSR10, tmp >> 16);
1687
1688 /* remember last written value in sc */
1689 sc->rf_regs[reg] = val;
1690
1691 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff));
1692 }
1693
1694 Static void
ural_set_chan(struct ural_softc * sc,struct ieee80211_channel * c)1695 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c)
1696 {
1697 struct ieee80211com *ic = &sc->sc_ic;
1698 uint8_t power, tmp;
1699 u_int i, chan;
1700
1701 chan = ieee80211_chan2ieee(ic, c);
1702 if (chan == 0 || chan == IEEE80211_CHAN_ANY)
1703 return;
1704
1705 if (IEEE80211_IS_CHAN_2GHZ(c))
1706 power = uimin(sc->txpow[chan - 1], 31);
1707 else
1708 power = 31;
1709
1710 /* adjust txpower using ifconfig settings */
1711 power -= (100 - ic->ic_txpowlimit) / 8;
1712
1713 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power));
1714
1715 switch (sc->rf_rev) {
1716 case RAL_RF_2522:
1717 ural_rf_write(sc, RAL_RF1, 0x00814);
1718 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]);
1719 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1720 break;
1721
1722 case RAL_RF_2523:
1723 ural_rf_write(sc, RAL_RF1, 0x08804);
1724 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]);
1725 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044);
1726 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1727 break;
1728
1729 case RAL_RF_2524:
1730 ural_rf_write(sc, RAL_RF1, 0x0c808);
1731 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]);
1732 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1733 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1734 break;
1735
1736 case RAL_RF_2525:
1737 ural_rf_write(sc, RAL_RF1, 0x08808);
1738 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]);
1739 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1740 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1741
1742 ural_rf_write(sc, RAL_RF1, 0x08808);
1743 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]);
1744 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1745 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1746 break;
1747
1748 case RAL_RF_2525E:
1749 ural_rf_write(sc, RAL_RF1, 0x08808);
1750 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]);
1751 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1752 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282);
1753 break;
1754
1755 case RAL_RF_2526:
1756 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]);
1757 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1758 ural_rf_write(sc, RAL_RF1, 0x08804);
1759
1760 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]);
1761 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1762 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1763 break;
1764
1765 /* dual-band RF */
1766 case RAL_RF_5222:
1767 for (i = 0; ural_rf5222[i].chan != chan; i++);
1768
1769 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1);
1770 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2);
1771 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1772 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4);
1773 break;
1774 }
1775
1776 if (ic->ic_opmode != IEEE80211_M_MONITOR &&
1777 ic->ic_state != IEEE80211_S_SCAN) {
1778 /* set Japan filter bit for channel 14 */
1779 tmp = ural_bbp_read(sc, 70);
1780
1781 tmp &= ~RAL_JAPAN_FILTER;
1782 if (chan == 14)
1783 tmp |= RAL_JAPAN_FILTER;
1784
1785 ural_bbp_write(sc, 70, tmp);
1786
1787 /* clear CRC errors */
1788 ural_read(sc, RAL_STA_CSR0);
1789
1790 DELAY(10000);
1791 ural_disable_rf_tune(sc);
1792 }
1793 }
1794
1795 /*
1796 * Disable RF auto-tuning.
1797 */
1798 Static void
ural_disable_rf_tune(struct ural_softc * sc)1799 ural_disable_rf_tune(struct ural_softc *sc)
1800 {
1801 uint32_t tmp;
1802
1803 if (sc->rf_rev != RAL_RF_2523) {
1804 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE;
1805 ural_rf_write(sc, RAL_RF1, tmp);
1806 }
1807
1808 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE;
1809 ural_rf_write(sc, RAL_RF3, tmp);
1810
1811 DPRINTFN(2, ("disabling RF autotune\n"));
1812 }
1813
1814 /*
1815 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF
1816 * synchronization.
1817 */
1818 Static void
ural_enable_tsf_sync(struct ural_softc * sc)1819 ural_enable_tsf_sync(struct ural_softc *sc)
1820 {
1821 struct ieee80211com *ic = &sc->sc_ic;
1822 uint16_t logcwmin, preload, tmp;
1823
1824 /* first, disable TSF synchronization */
1825 ural_write(sc, RAL_TXRX_CSR19, 0);
1826
1827 tmp = (16 * ic->ic_bss->ni_intval) << 4;
1828 ural_write(sc, RAL_TXRX_CSR18, tmp);
1829
1830 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0;
1831 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6;
1832 tmp = logcwmin << 12 | preload;
1833 ural_write(sc, RAL_TXRX_CSR20, tmp);
1834
1835 /* finally, enable TSF synchronization */
1836 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN;
1837 if (ic->ic_opmode == IEEE80211_M_STA)
1838 tmp |= RAL_ENABLE_TSF_SYNC(1);
1839 else
1840 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR;
1841 ural_write(sc, RAL_TXRX_CSR19, tmp);
1842
1843 DPRINTF(("enabling TSF synchronization\n"));
1844 }
1845
1846 Static void
ural_update_slot(struct ifnet * ifp)1847 ural_update_slot(struct ifnet *ifp)
1848 {
1849 struct ural_softc *sc = ifp->if_softc;
1850 struct ieee80211com *ic = &sc->sc_ic;
1851 uint16_t slottime, sifs, eifs;
1852
1853 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
1854
1855 /*
1856 * These settings may sound a bit inconsistent but this is what the
1857 * reference driver does.
1858 */
1859 if (ic->ic_curmode == IEEE80211_MODE_11B) {
1860 sifs = 16 - RAL_RXTX_TURNAROUND;
1861 eifs = 364;
1862 } else {
1863 sifs = 10 - RAL_RXTX_TURNAROUND;
1864 eifs = 64;
1865 }
1866
1867 ural_write(sc, RAL_MAC_CSR10, slottime);
1868 ural_write(sc, RAL_MAC_CSR11, sifs);
1869 ural_write(sc, RAL_MAC_CSR12, eifs);
1870 }
1871
1872 Static void
ural_set_txpreamble(struct ural_softc * sc)1873 ural_set_txpreamble(struct ural_softc *sc)
1874 {
1875 uint16_t tmp;
1876
1877 tmp = ural_read(sc, RAL_TXRX_CSR10);
1878
1879 tmp &= ~RAL_SHORT_PREAMBLE;
1880 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE)
1881 tmp |= RAL_SHORT_PREAMBLE;
1882
1883 ural_write(sc, RAL_TXRX_CSR10, tmp);
1884 }
1885
1886 Static void
ural_set_basicrates(struct ural_softc * sc)1887 ural_set_basicrates(struct ural_softc *sc)
1888 {
1889 struct ieee80211com *ic = &sc->sc_ic;
1890
1891 /* update basic rate set */
1892 if (ic->ic_curmode == IEEE80211_MODE_11B) {
1893 /* 11b basic rates: 1, 2Mbps */
1894 ural_write(sc, RAL_TXRX_CSR11, 0x3);
1895 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) {
1896 /* 11a basic rates: 6, 12, 24Mbps */
1897 ural_write(sc, RAL_TXRX_CSR11, 0x150);
1898 } else {
1899 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */
1900 ural_write(sc, RAL_TXRX_CSR11, 0x15f);
1901 }
1902 }
1903
1904 Static void
ural_set_bssid(struct ural_softc * sc,uint8_t * bssid)1905 ural_set_bssid(struct ural_softc *sc, uint8_t *bssid)
1906 {
1907 uint16_t tmp;
1908
1909 tmp = bssid[0] | bssid[1] << 8;
1910 ural_write(sc, RAL_MAC_CSR5, tmp);
1911
1912 tmp = bssid[2] | bssid[3] << 8;
1913 ural_write(sc, RAL_MAC_CSR6, tmp);
1914
1915 tmp = bssid[4] | bssid[5] << 8;
1916 ural_write(sc, RAL_MAC_CSR7, tmp);
1917
1918 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid)));
1919 }
1920
1921 Static void
ural_set_macaddr(struct ural_softc * sc,uint8_t * addr)1922 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr)
1923 {
1924 uint16_t tmp;
1925
1926 tmp = addr[0] | addr[1] << 8;
1927 ural_write(sc, RAL_MAC_CSR2, tmp);
1928
1929 tmp = addr[2] | addr[3] << 8;
1930 ural_write(sc, RAL_MAC_CSR3, tmp);
1931
1932 tmp = addr[4] | addr[5] << 8;
1933 ural_write(sc, RAL_MAC_CSR4, tmp);
1934
1935 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr)));
1936 }
1937
1938 Static void
ural_update_promisc(struct ural_softc * sc)1939 ural_update_promisc(struct ural_softc *sc)
1940 {
1941 struct ifnet *ifp = sc->sc_ic.ic_ifp;
1942 uint32_t tmp;
1943
1944 tmp = ural_read(sc, RAL_TXRX_CSR2);
1945
1946 tmp &= ~RAL_DROP_NOT_TO_ME;
1947 if (!(ifp->if_flags & IFF_PROMISC))
1948 tmp |= RAL_DROP_NOT_TO_ME;
1949
1950 ural_write(sc, RAL_TXRX_CSR2, tmp);
1951
1952 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
1953 "entering" : "leaving"));
1954 }
1955
1956 Static const char *
ural_get_rf(int rev)1957 ural_get_rf(int rev)
1958 {
1959 switch (rev) {
1960 case RAL_RF_2522: return "RT2522";
1961 case RAL_RF_2523: return "RT2523";
1962 case RAL_RF_2524: return "RT2524";
1963 case RAL_RF_2525: return "RT2525";
1964 case RAL_RF_2525E: return "RT2525e";
1965 case RAL_RF_2526: return "RT2526";
1966 case RAL_RF_5222: return "RT5222";
1967 default: return "unknown";
1968 }
1969 }
1970
1971 Static void
ural_read_eeprom(struct ural_softc * sc)1972 ural_read_eeprom(struct ural_softc *sc)
1973 {
1974 struct ieee80211com *ic = &sc->sc_ic;
1975 uint16_t val;
1976
1977 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2);
1978 val = le16toh(val);
1979 sc->rf_rev = (val >> 11) & 0x7;
1980 sc->hw_radio = (val >> 10) & 0x1;
1981 sc->led_mode = (val >> 6) & 0x7;
1982 sc->rx_ant = (val >> 4) & 0x3;
1983 sc->tx_ant = (val >> 2) & 0x3;
1984 sc->nb_ant = val & 0x3;
1985
1986 /* read MAC address */
1987 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6);
1988
1989 /* read default values for BBP registers */
1990 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16);
1991
1992 /* read Tx power for all b/g channels */
1993 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14);
1994 }
1995
1996 Static int
ural_bbp_init(struct ural_softc * sc)1997 ural_bbp_init(struct ural_softc *sc)
1998 {
1999 int i, ntries;
2000
2001 /* wait for BBP to be ready */
2002 for (ntries = 0; ntries < 100; ntries++) {
2003 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0)
2004 break;
2005 DELAY(1000);
2006 }
2007 if (ntries == 100) {
2008 printf("%s: timeout waiting for BBP\n", device_xname(sc->sc_dev));
2009 return EIO;
2010 }
2011
2012 /* initialize BBP registers to default values */
2013 for (i = 0; i < __arraycount(ural_def_bbp); i++)
2014 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val);
2015
2016 #if 0
2017 /* initialize BBP registers to values stored in EEPROM */
2018 for (i = 0; i < 16; i++) {
2019 if (sc->bbp_prom[i].reg == 0xff)
2020 continue;
2021 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
2022 }
2023 #endif
2024
2025 return 0;
2026 }
2027
2028 Static void
ural_set_txantenna(struct ural_softc * sc,int antenna)2029 ural_set_txantenna(struct ural_softc *sc, int antenna)
2030 {
2031 uint16_t tmp;
2032 uint8_t tx;
2033
2034 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK;
2035 if (antenna == 1)
2036 tx |= RAL_BBP_ANTA;
2037 else if (antenna == 2)
2038 tx |= RAL_BBP_ANTB;
2039 else
2040 tx |= RAL_BBP_DIVERSITY;
2041
2042 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */
2043 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 ||
2044 sc->rf_rev == RAL_RF_5222)
2045 tx |= RAL_BBP_FLIPIQ;
2046
2047 ural_bbp_write(sc, RAL_BBP_TX, tx);
2048
2049 /* update values in PHY_CSR5 and PHY_CSR6 */
2050 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7;
2051 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7));
2052
2053 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7;
2054 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7));
2055 }
2056
2057 Static void
ural_set_rxantenna(struct ural_softc * sc,int antenna)2058 ural_set_rxantenna(struct ural_softc *sc, int antenna)
2059 {
2060 uint8_t rx;
2061
2062 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK;
2063 if (antenna == 1)
2064 rx |= RAL_BBP_ANTA;
2065 else if (antenna == 2)
2066 rx |= RAL_BBP_ANTB;
2067 else
2068 rx |= RAL_BBP_DIVERSITY;
2069
2070 /* need to force no I/Q flip for RF 2525e and 2526 */
2071 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526)
2072 rx &= ~RAL_BBP_FLIPIQ;
2073
2074 ural_bbp_write(sc, RAL_BBP_RX, rx);
2075 }
2076
2077 Static int
ural_init(struct ifnet * ifp)2078 ural_init(struct ifnet *ifp)
2079 {
2080 struct ural_softc *sc = ifp->if_softc;
2081 struct ieee80211com *ic = &sc->sc_ic;
2082 struct ieee80211_key *wk;
2083 uint16_t tmp;
2084 usbd_status error;
2085 int i, ntries;
2086
2087 ural_set_testmode(sc);
2088 ural_write(sc, 0x308, 0x00f0); /* XXX magic */
2089
2090 ural_stop(ifp, 0);
2091
2092 /* initialize MAC registers to default values */
2093 for (i = 0; i < __arraycount(ural_def_mac); i++)
2094 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val);
2095
2096 /* wait for BBP and RF to wake up (this can take a long time!) */
2097 for (ntries = 0; ntries < 100; ntries++) {
2098 tmp = ural_read(sc, RAL_MAC_CSR17);
2099 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) ==
2100 (RAL_BBP_AWAKE | RAL_RF_AWAKE))
2101 break;
2102 DELAY(1000);
2103 }
2104 if (ntries == 100) {
2105 printf("%s: timeout waiting for BBP/RF to wakeup\n",
2106 device_xname(sc->sc_dev));
2107 error = EIO;
2108 goto fail;
2109 }
2110
2111 /* we're ready! */
2112 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY);
2113
2114 /* set basic rate set (will be updated later) */
2115 ural_write(sc, RAL_TXRX_CSR11, 0x15f);
2116
2117 error = ural_bbp_init(sc);
2118 if (error != 0)
2119 goto fail;
2120
2121 /* set default BSS channel */
2122 ural_set_chan(sc, ic->ic_curchan);
2123
2124 /* clear statistic registers (STA_CSR0 to STA_CSR10) */
2125 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta));
2126
2127 ural_set_txantenna(sc, sc->tx_ant);
2128 ural_set_rxantenna(sc, sc->rx_ant);
2129
2130 IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl));
2131 ural_set_macaddr(sc, ic->ic_myaddr);
2132
2133 /*
2134 * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31).
2135 */
2136 for (i = 0; i < IEEE80211_WEP_NKID; i++) {
2137 wk = &ic->ic_crypto.cs_nw_keys[i];
2138 ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE +
2139 RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE);
2140 }
2141
2142 /*
2143 * Allocate xfer for AMRR statistics requests.
2144 */
2145 struct usbd_pipe *pipe0 = usbd_get_pipe0(sc->sc_udev);
2146 error = usbd_create_xfer(pipe0, sizeof(sc->sta), 0, 0, &sc->amrr_xfer);
2147 if (error) {
2148 printf("%s: could not allocate AMRR xfer\n",
2149 device_xname(sc->sc_dev));
2150 goto fail;
2151 }
2152
2153 /*
2154 * Open Tx and Rx USB bulk pipes.
2155 */
2156 error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE,
2157 &sc->sc_tx_pipeh);
2158 if (error != 0) {
2159 printf("%s: could not open Tx pipe: %s\n",
2160 device_xname(sc->sc_dev), usbd_errstr(error));
2161 goto fail;
2162 }
2163
2164 error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE,
2165 &sc->sc_rx_pipeh);
2166 if (error != 0) {
2167 printf("%s: could not open Rx pipe: %s\n",
2168 device_xname(sc->sc_dev), usbd_errstr(error));
2169 goto fail;
2170 }
2171
2172 /*
2173 * Allocate Tx and Rx xfer queues.
2174 */
2175 error = ural_alloc_tx_list(sc);
2176 if (error != 0) {
2177 printf("%s: could not allocate Tx list\n",
2178 device_xname(sc->sc_dev));
2179 goto fail;
2180 }
2181
2182 error = ural_alloc_rx_list(sc);
2183 if (error != 0) {
2184 printf("%s: could not allocate Rx list\n",
2185 device_xname(sc->sc_dev));
2186 goto fail;
2187 }
2188
2189 /*
2190 * Start up the receive pipe.
2191 */
2192 for (i = 0; i < RAL_RX_LIST_COUNT; i++) {
2193 struct ural_rx_data *data = &sc->rx_data[i];
2194
2195 usbd_setup_xfer(data->xfer, data, data->buf, MCLBYTES,
2196 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof);
2197 usbd_transfer(data->xfer);
2198 }
2199
2200 /* kick Rx */
2201 tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR;
2202 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2203 tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR;
2204 if (ic->ic_opmode != IEEE80211_M_HOSTAP)
2205 tmp |= RAL_DROP_TODS;
2206 if (!(ifp->if_flags & IFF_PROMISC))
2207 tmp |= RAL_DROP_NOT_TO_ME;
2208 }
2209 ural_write(sc, RAL_TXRX_CSR2, tmp);
2210
2211 ifp->if_flags &= ~IFF_OACTIVE;
2212 ifp->if_flags |= IFF_RUNNING;
2213
2214 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2215 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)
2216 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
2217 } else
2218 ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
2219
2220 return 0;
2221
2222 fail: ural_stop(ifp, 1);
2223 return error;
2224 }
2225
2226 Static void
ural_stop(struct ifnet * ifp,int disable)2227 ural_stop(struct ifnet *ifp, int disable)
2228 {
2229 struct ural_softc *sc = ifp->if_softc;
2230 struct ieee80211com *ic = &sc->sc_ic;
2231
2232 ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
2233
2234 sc->sc_tx_timer = 0;
2235 ifp->if_timer = 0;
2236 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2237
2238 /* disable Rx */
2239 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX);
2240
2241 /* reset ASIC and BBP (but won't reset MAC registers!) */
2242 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP);
2243 ural_write(sc, RAL_MAC_CSR1, 0);
2244
2245 if (sc->amrr_xfer != NULL) {
2246 usbd_destroy_xfer(sc->amrr_xfer);
2247 sc->amrr_xfer = NULL;
2248 }
2249
2250 if (sc->sc_rx_pipeh != NULL) {
2251 usbd_abort_pipe(sc->sc_rx_pipeh);
2252 }
2253
2254 if (sc->sc_tx_pipeh != NULL) {
2255 usbd_abort_pipe(sc->sc_tx_pipeh);
2256 }
2257
2258 ural_free_rx_list(sc);
2259 ural_free_tx_list(sc);
2260
2261 if (sc->sc_rx_pipeh != NULL) {
2262 usbd_close_pipe(sc->sc_rx_pipeh);
2263 sc->sc_rx_pipeh = NULL;
2264 }
2265
2266 if (sc->sc_tx_pipeh != NULL) {
2267 usbd_close_pipe(sc->sc_tx_pipeh);
2268 sc->sc_tx_pipeh = NULL;
2269 }
2270 }
2271
2272 static int
ural_activate(device_t self,enum devact act)2273 ural_activate(device_t self, enum devact act)
2274 {
2275 struct ural_softc *sc = device_private(self);
2276
2277 switch (act) {
2278 case DVACT_DEACTIVATE:
2279 if_deactivate(&sc->sc_if);
2280 return 0;
2281 default:
2282 return EOPNOTSUPP;
2283 }
2284 }
2285
2286 Static void
ural_amrr_start(struct ural_softc * sc,struct ieee80211_node * ni)2287 ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni)
2288 {
2289 int i;
2290
2291 /* clear statistic registers (STA_CSR0 to STA_CSR10) */
2292 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta));
2293
2294 ieee80211_amrr_node_init(&sc->amrr, &sc->amn);
2295
2296 /* set rate to some reasonable initial value */
2297 for (i = ni->ni_rates.rs_nrates - 1;
2298 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72;
2299 i--);
2300 ni->ni_txrate = i;
2301
2302 callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc);
2303 }
2304
2305 Static void
ural_amrr_timeout(void * arg)2306 ural_amrr_timeout(void *arg)
2307 {
2308 struct ural_softc *sc = (struct ural_softc *)arg;
2309 usb_device_request_t req;
2310 int s;
2311
2312 s = splusb();
2313
2314 /*
2315 * Asynchronously read statistic registers (cleared by read).
2316 */
2317 req.bmRequestType = UT_READ_VENDOR_DEVICE;
2318 req.bRequest = RAL_READ_MULTI_MAC;
2319 USETW(req.wValue, 0);
2320 USETW(req.wIndex, RAL_STA_CSR0);
2321 USETW(req.wLength, sizeof(sc->sta));
2322
2323 usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc,
2324 USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof(sc->sta), 0,
2325 ural_amrr_update);
2326 (void)usbd_transfer(sc->amrr_xfer);
2327
2328 splx(s);
2329 }
2330
2331 Static void
ural_amrr_update(struct usbd_xfer * xfer,void * priv,usbd_status status)2332 ural_amrr_update(struct usbd_xfer *xfer, void * priv,
2333 usbd_status status)
2334 {
2335 struct ural_softc *sc = (struct ural_softc *)priv;
2336 struct ifnet *ifp = sc->sc_ic.ic_ifp;
2337
2338 if (status != USBD_NORMAL_COMPLETION) {
2339 printf("%s: could not retrieve Tx statistics - "
2340 "cancelling automatic rate control\n",
2341 device_xname(sc->sc_dev));
2342 return;
2343 }
2344
2345 /* count TX retry-fail as Tx errors */
2346 if_statadd(ifp, if_oerrors, sc->sta[9]);
2347
2348 sc->amn.amn_retrycnt =
2349 sc->sta[7] + /* TX one-retry ok count */
2350 sc->sta[8] + /* TX more-retry ok count */
2351 sc->sta[9]; /* TX retry-fail count */
2352
2353 sc->amn.amn_txcnt =
2354 sc->amn.amn_retrycnt +
2355 sc->sta[6]; /* TX no-retry ok count */
2356
2357 ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn);
2358
2359 callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc);
2360 }
2361