xref: /trueos/sys/dev/ep/if_ep.c (revision b972b67ed72b5687a023c92602aaef64163b2f59)
1 /*-
2  * Copyright (c) 1994 Herb Peyerl <hpeyerl@novatel.ca>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  * 3. All advertising materials mentioning features or use of this software
14  *    must display the following acknowledgement:
15  *      This product includes software developed by Herb Peyerl.
16  * 4. The name of Herb Peyerl may not be used to endorse or promote products
17  *    derived from this software without specific prior written permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
20  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
21  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
22  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
23  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
24  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
28  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29  */
30 
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
33 
34 /*
35  *	Modified from the FreeBSD 1.1.5.1 version by:
36  *		 	Andres Vega Garcia
37  *			INRIA - Sophia Antipolis, France
38  *			avega@sophia.inria.fr
39  */
40 
41 /*
42  *  Promiscuous mode added and interrupt logic slightly changed
43  *  to reduce the number of adapter failures. Transceiver select
44  *  logic changed to use value from EEPROM. Autoconfiguration
45  *  features added.
46  *  Done by:
47  *          Serge Babkin
48  *          Chelindbank (Chelyabinsk, Russia)
49  *          babkin@hq.icb.chel.su
50  */
51 
52 /*
53  * Pccard support for 3C589 by:
54  *		HAMADA Naoki
55  *		nao@tom-yam.or.jp
56  */
57 
58 /*
59  * MAINTAINER: Matthew N. Dodd <winter@jurai.net>
60  *                             <mdodd@FreeBSD.org>
61  */
62 
63 #include <sys/param.h>
64 #include <sys/systm.h>
65 #include <sys/kernel.h>
66 #include <sys/mbuf.h>
67 #include <sys/socket.h>
68 #include <sys/sockio.h>
69 #include <sys/bus.h>
70 
71 #include <machine/bus.h>
72 #include <machine/resource.h>
73 #include <sys/rman.h>
74 
75 #include <net/if.h>
76 #include <net/if_dl.h>
77 #include <net/if_media.h>
78 #include <net/if_types.h>
79 #include <net/ethernet.h>
80 #include <net/bpf.h>
81 
82 #include <dev/ep/if_epreg.h>
83 #include <dev/ep/if_epvar.h>
84 
85 /* Exported variables */
86 devclass_t ep_devclass;
87 
88 static int ep_media2if_media[] =
89 {IFM_10_T, IFM_10_5, IFM_NONE, IFM_10_2, IFM_NONE};
90 
91 /* if functions */
92 static void epinit(void *);
93 static int epioctl(struct ifnet *, u_long, caddr_t);
94 static void epstart(struct ifnet *);
95 
96 static void ep_intr_locked(struct ep_softc *);
97 static void epstart_locked(struct ifnet *);
98 static void epinit_locked(struct ep_softc *);
99 static void eptick(void *);
100 static void epwatchdog(struct ep_softc *);
101 
102 /* if_media functions */
103 static int ep_ifmedia_upd(struct ifnet *);
104 static void ep_ifmedia_sts(struct ifnet *, struct ifmediareq *);
105 
106 static void epstop(struct ep_softc *);
107 static void epread(struct ep_softc *);
108 static int eeprom_rdy(struct ep_softc *);
109 
110 #define EP_FTST(sc, f)	(sc->stat &   (f))
111 #define EP_FSET(sc, f)	(sc->stat |=  (f))
112 #define EP_FRST(sc, f)	(sc->stat &= ~(f))
113 
114 static int
eeprom_rdy(struct ep_softc * sc)115 eeprom_rdy(struct ep_softc *sc)
116 {
117 	int i;
118 
119 	for (i = 0; is_eeprom_busy(sc) && i < MAX_EEPROMBUSY; i++)
120 		DELAY(100);
121 
122 	if (i >= MAX_EEPROMBUSY) {
123 		device_printf(sc->dev, "eeprom failed to come ready.\n");
124  		return (ENXIO);
125 	}
126 
127 	return (0);
128 }
129 
130 /*
131  * get_e: gets a 16 bits word from the EEPROM. we must have set the window
132  * before
133  */
134 int
ep_get_e(struct ep_softc * sc,uint16_t offset,uint16_t * result)135 ep_get_e(struct ep_softc *sc, uint16_t offset, uint16_t *result)
136 {
137 
138 	if (eeprom_rdy(sc))
139 		return (ENXIO);
140 
141 	CSR_WRITE_2(sc, EP_W0_EEPROM_COMMAND,
142 	    (EEPROM_CMD_RD << sc->epb.cmd_off) | offset);
143 
144 	if (eeprom_rdy(sc))
145 		return (ENXIO);
146 
147 	(*result) = CSR_READ_2(sc, EP_W0_EEPROM_DATA);
148 
149 	return (0);
150 }
151 
152 static int
ep_get_macaddr(struct ep_softc * sc,u_char * addr)153 ep_get_macaddr(struct ep_softc *sc, u_char *addr)
154 {
155 	int i;
156 	uint16_t result;
157 	int error;
158 	uint16_t *macaddr;
159 
160 	macaddr = (uint16_t *) addr;
161 
162 	GO_WINDOW(sc, 0);
163 	for (i = EEPROM_NODE_ADDR_0; i <= EEPROM_NODE_ADDR_2; i++) {
164 		error = ep_get_e(sc, i, &result);
165 		if (error)
166 			return (error);
167 		macaddr[i] = htons(result);
168 	}
169 	return (0);
170 }
171 
172 int
ep_alloc(device_t dev)173 ep_alloc(device_t dev)
174 {
175 	struct ep_softc *sc = device_get_softc(dev);
176 	int rid;
177 	int error = 0;
178 	uint16_t result;
179 
180 	rid = 0;
181 	sc->iobase = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid,
182 	    RF_ACTIVE);
183 	if (!sc->iobase) {
184 		device_printf(dev, "No I/O space?!\n");
185 		error = ENXIO;
186 		goto bad;
187 	}
188 	rid = 0;
189 	sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
190 	if (!sc->irq) {
191 		device_printf(dev, "No irq?!\n");
192 		error = ENXIO;
193 		goto bad;
194 	}
195 	sc->dev = dev;
196 	sc->stat = 0;		/* 16 bit access */
197 
198 	sc->bst = rman_get_bustag(sc->iobase);
199 	sc->bsh = rman_get_bushandle(sc->iobase);
200 
201 	sc->ep_connectors = 0;
202 	sc->ep_connector = 0;
203 
204 	GO_WINDOW(sc, 0);
205 
206 	error = ep_get_e(sc, EEPROM_PROD_ID, &result);
207 	if (error)
208 		goto bad;
209 	sc->epb.prod_id = result;
210 
211 	error = ep_get_e(sc, EEPROM_RESOURCE_CFG, &result);
212 	if (error)
213 		goto bad;
214 	sc->epb.res_cfg = result;
215 
216 bad:
217 	if (error != 0)
218 		ep_free(dev);
219 	return (error);
220 }
221 
222 void
ep_get_media(struct ep_softc * sc)223 ep_get_media(struct ep_softc *sc)
224 {
225 	uint16_t config;
226 
227 	GO_WINDOW(sc, 0);
228 	config = CSR_READ_2(sc, EP_W0_CONFIG_CTRL);
229 	if (config & IS_AUI)
230 		sc->ep_connectors |= AUI;
231 	if (config & IS_BNC)
232 		sc->ep_connectors |= BNC;
233 	if (config & IS_UTP)
234 		sc->ep_connectors |= UTP;
235 
236 	if (!(sc->ep_connectors & 7))
237 		if (bootverbose)
238 			device_printf(sc->dev, "no connectors!\n");
239 
240 	/*
241 	 * This works for most of the cards so we'll do it here.
242 	 * The cards that require something different can override
243 	 * this later on.
244 	 */
245 	sc->ep_connector = CSR_READ_2(sc, EP_W0_ADDRESS_CFG) >> ACF_CONNECTOR_BITS;
246 }
247 
248 void
ep_free(device_t dev)249 ep_free(device_t dev)
250 {
251 	struct ep_softc *sc = device_get_softc(dev);
252 
253 	if (sc->ep_intrhand)
254 		bus_teardown_intr(dev, sc->irq, sc->ep_intrhand);
255 	if (sc->iobase)
256 		bus_release_resource(dev, SYS_RES_IOPORT, 0, sc->iobase);
257 	if (sc->irq)
258 		bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
259 	sc->ep_intrhand = 0;
260 	sc->iobase = 0;
261 	sc->irq = 0;
262 }
263 
264 static void
ep_setup_station(struct ep_softc * sc,u_char * enaddr)265 ep_setup_station(struct ep_softc *sc, u_char *enaddr)
266 {
267 	int i;
268 
269 	/*
270 	 * Setup the station address
271 	 */
272 	GO_WINDOW(sc, 2);
273 	for (i = 0; i < ETHER_ADDR_LEN; i++)
274 		CSR_WRITE_1(sc, EP_W2_ADDR_0 + i, enaddr[i]);
275 }
276 
277 int
ep_attach(struct ep_softc * sc)278 ep_attach(struct ep_softc *sc)
279 {
280 	struct ifnet *ifp = NULL;
281 	struct ifmedia *ifm = NULL;
282 	int error;
283 
284 	sc->gone = 0;
285 	EP_LOCK_INIT(sc);
286 	if (! (sc->stat & F_ENADDR_SKIP)) {
287 		error = ep_get_macaddr(sc, sc->eaddr);
288 		if (error) {
289 			device_printf(sc->dev, "Unable to get MAC address!\n");
290 			EP_LOCK_DESTROY(sc);
291 			return (ENXIO);
292 		}
293 	}
294 	ep_setup_station(sc, sc->eaddr);
295 	ifp = sc->ifp = if_alloc(IFT_ETHER);
296 	if (ifp == NULL) {
297 		device_printf(sc->dev, "if_alloc() failed\n");
298 		EP_LOCK_DESTROY(sc);
299 		return (ENOSPC);
300 	}
301 
302 	ifp->if_softc = sc;
303 	if_initname(ifp, device_get_name(sc->dev), device_get_unit(sc->dev));
304 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
305 	ifp->if_start = epstart;
306 	ifp->if_ioctl = epioctl;
307 	ifp->if_init = epinit;
308 	IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
309 	ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
310 	IFQ_SET_READY(&ifp->if_snd);
311 
312 	callout_init_mtx(&sc->watchdog_timer, &sc->sc_mtx, 0);
313 	if (!sc->epb.mii_trans) {
314 		ifmedia_init(&sc->ifmedia, 0, ep_ifmedia_upd, ep_ifmedia_sts);
315 
316 		if (sc->ep_connectors & AUI)
317 			ifmedia_add(&sc->ifmedia,
318 			    IFM_ETHER | IFM_10_5, 0, NULL);
319 		if (sc->ep_connectors & UTP)
320 			ifmedia_add(&sc->ifmedia,
321 			    IFM_ETHER | IFM_10_T, 0, NULL);
322 		if (sc->ep_connectors & BNC)
323 			ifmedia_add(&sc->ifmedia,
324 			    IFM_ETHER | IFM_10_2, 0, NULL);
325 		if (!sc->ep_connectors)
326 			ifmedia_add(&sc->ifmedia,
327 			    IFM_ETHER | IFM_NONE, 0, NULL);
328 
329 		ifmedia_set(&sc->ifmedia,
330 		    IFM_ETHER | ep_media2if_media[sc->ep_connector]);
331 
332 		ifm = &sc->ifmedia;
333 		ifm->ifm_media = ifm->ifm_cur->ifm_media;
334 		ep_ifmedia_upd(ifp);
335 	}
336 	ether_ifattach(ifp, sc->eaddr);
337 
338 #ifdef EP_LOCAL_STATS
339 	sc->rx_no_first = sc->rx_no_mbuf = sc->rx_bpf_disc =
340 	    sc->rx_overrunf = sc->rx_overrunl = sc->tx_underrun = 0;
341 #endif
342 	EP_FSET(sc, F_RX_FIRST);
343 	sc->top = sc->mcur = 0;
344 
345 	epstop(sc);
346 
347 	return (0);
348 }
349 
350 int
ep_detach(device_t dev)351 ep_detach(device_t dev)
352 {
353 	struct ep_softc *sc;
354 	struct ifnet *ifp;
355 
356 	sc = device_get_softc(dev);
357 	ifp = sc->ifp;
358 	EP_ASSERT_UNLOCKED(sc);
359 	EP_LOCK(sc);
360 	if (bus_child_present(dev))
361 		epstop(sc);
362 	sc->gone = 1;
363 	ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
364 	EP_UNLOCK(sc);
365 	ether_ifdetach(ifp);
366 	callout_drain(&sc->watchdog_timer);
367 	ep_free(dev);
368 
369 	if_free(ifp);
370 	EP_LOCK_DESTROY(sc);
371 
372 	return (0);
373 }
374 
375 static void
epinit(void * xsc)376 epinit(void *xsc)
377 {
378 	struct ep_softc *sc = xsc;
379 	EP_LOCK(sc);
380 	epinit_locked(sc);
381 	EP_UNLOCK(sc);
382 }
383 
384 /*
385  * The order in here seems important. Otherwise we may not receive
386  * interrupts. ?!
387  */
388 static void
epinit_locked(struct ep_softc * sc)389 epinit_locked(struct ep_softc *sc)
390 {
391 	struct ifnet *ifp = sc->ifp;
392 	int i;
393 
394 	if (sc->gone)
395 		return;
396 
397 	EP_ASSERT_LOCKED(sc);
398 	EP_BUSY_WAIT(sc);
399 
400 	GO_WINDOW(sc, 0);
401 	CSR_WRITE_2(sc, EP_COMMAND, STOP_TRANSCEIVER);
402 	GO_WINDOW(sc, 4);
403 	CSR_WRITE_2(sc, EP_W4_MEDIA_TYPE, DISABLE_UTP);
404 	GO_WINDOW(sc, 0);
405 
406 	/* Disable the card */
407 	CSR_WRITE_2(sc, EP_W0_CONFIG_CTRL, 0);
408 
409 	/* Enable the card */
410 	CSR_WRITE_2(sc, EP_W0_CONFIG_CTRL, ENABLE_DRQ_IRQ);
411 
412 	GO_WINDOW(sc, 2);
413 	/* Reload the ether_addr. */
414 	ep_setup_station(sc, IF_LLADDR(sc->ifp));
415 
416 	CSR_WRITE_2(sc, EP_COMMAND, RX_RESET);
417 	CSR_WRITE_2(sc, EP_COMMAND, TX_RESET);
418 	EP_BUSY_WAIT(sc);
419 
420 	/* Window 1 is operating window */
421 	GO_WINDOW(sc, 1);
422 	for (i = 0; i < 31; i++)
423 		CSR_READ_1(sc, EP_W1_TX_STATUS);
424 
425 	/* get rid of stray intr's */
426 	CSR_WRITE_2(sc, EP_COMMAND, ACK_INTR | 0xff);
427 
428 	CSR_WRITE_2(sc, EP_COMMAND, SET_RD_0_MASK | S_5_INTS);
429 	CSR_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK | S_5_INTS);
430 
431 	if (ifp->if_flags & IFF_PROMISC)
432 		CSR_WRITE_2(sc, EP_COMMAND, SET_RX_FILTER | FIL_INDIVIDUAL |
433 		    FIL_MULTICAST | FIL_BRDCST | FIL_PROMISC);
434 	else
435 		CSR_WRITE_2(sc, EP_COMMAND, SET_RX_FILTER | FIL_INDIVIDUAL |
436 		    FIL_MULTICAST | FIL_BRDCST);
437 
438 	if (!sc->epb.mii_trans)
439 		ep_ifmedia_upd(ifp);
440 
441 	if (sc->stat & F_HAS_TX_PLL)
442 		CSR_WRITE_2(sc, EP_COMMAND, TX_PLL_ENABLE);
443 	CSR_WRITE_2(sc, EP_COMMAND, RX_ENABLE);
444 	CSR_WRITE_2(sc, EP_COMMAND, TX_ENABLE);
445 
446 	ifp->if_drv_flags |= IFF_DRV_RUNNING;
447 	ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;	/* just in case */
448 
449 #ifdef EP_LOCAL_STATS
450 	sc->rx_no_first = sc->rx_no_mbuf =
451 	    sc->rx_overrunf = sc->rx_overrunl = sc->tx_underrun = 0;
452 #endif
453 	EP_FSET(sc, F_RX_FIRST);
454 	if (sc->top) {
455 		m_freem(sc->top);
456 		sc->top = sc->mcur = 0;
457 	}
458 	CSR_WRITE_2(sc, EP_COMMAND, SET_RX_EARLY_THRESH | RX_INIT_EARLY_THRESH);
459 	CSR_WRITE_2(sc, EP_COMMAND, SET_TX_START_THRESH | 16);
460 
461 	GO_WINDOW(sc, 1);
462 	epstart_locked(ifp);
463 	callout_reset(&sc->watchdog_timer, hz, eptick, sc);
464 }
465 
466 static void
epstart(struct ifnet * ifp)467 epstart(struct ifnet *ifp)
468 {
469 	struct ep_softc *sc;
470 	sc = ifp->if_softc;
471 	EP_LOCK(sc);
472 	epstart_locked(ifp);
473 	EP_UNLOCK(sc);
474 }
475 
476 static void
epstart_locked(struct ifnet * ifp)477 epstart_locked(struct ifnet *ifp)
478 {
479 	struct ep_softc *sc;
480 	u_int len;
481 	struct mbuf *m, *m0;
482 	int pad, started;
483 
484 	sc = ifp->if_softc;
485 	if (sc->gone)
486 		return;
487 	EP_ASSERT_LOCKED(sc);
488 	EP_BUSY_WAIT(sc);
489 	if (ifp->if_drv_flags & IFF_DRV_OACTIVE)
490 		return;
491 	started = 0;
492 startagain:
493 	/* Sneak a peek at the next packet */
494 	IFQ_DRV_DEQUEUE(&ifp->if_snd, m0);
495 	if (m0 == NULL)
496 		return;
497 	if (!started && (sc->stat & F_HAS_TX_PLL))
498 		CSR_WRITE_2(sc, EP_COMMAND, TX_PLL_ENABLE);
499 	started++;
500 	for (len = 0, m = m0; m != NULL; m = m->m_next)
501 		len += m->m_len;
502 
503 	pad = (4 - len) & 3;
504 
505 	/*
506 	 * The 3c509 automatically pads short packets to minimum
507 	 * ethernet length, but we drop packets that are too large.
508 	 * Perhaps we should truncate them instead?
509 	 */
510 	if (len + pad > ETHER_MAX_LEN) {
511 		/* packet is obviously too large: toss it */
512 		ifp->if_oerrors++;
513 		m_freem(m0);
514 		goto readcheck;
515 	}
516 	if (CSR_READ_2(sc, EP_W1_FREE_TX) < len + pad + 4) {
517 		/* no room in FIFO */
518 		CSR_WRITE_2(sc, EP_COMMAND, SET_TX_AVAIL_THRESH | (len + pad + 4));
519 		/* make sure */
520 		if (CSR_READ_2(sc, EP_W1_FREE_TX) < len + pad + 4) {
521 			ifp->if_drv_flags |= IFF_DRV_OACTIVE;
522 			IFQ_DRV_PREPEND(&ifp->if_snd, m0);
523 			goto done;
524 		}
525 	} else
526 		CSR_WRITE_2(sc, EP_COMMAND,
527 		    SET_TX_AVAIL_THRESH | EP_THRESH_DISABLE);
528 
529 	/* XXX 4.x and earlier would splhigh here */
530 
531 	CSR_WRITE_2(sc, EP_W1_TX_PIO_WR_1, len);
532 	/* Second dword meaningless */
533 	CSR_WRITE_2(sc, EP_W1_TX_PIO_WR_1, 0x0);
534 
535 	if (EP_FTST(sc, F_ACCESS_32_BITS)) {
536 		for (m = m0; m != NULL; m = m->m_next) {
537 			if (m->m_len > 3)
538 				CSR_WRITE_MULTI_4(sc, EP_W1_TX_PIO_WR_1,
539 				    mtod(m, uint32_t *), m->m_len / 4);
540 			if (m->m_len & 3)
541 				CSR_WRITE_MULTI_1(sc, EP_W1_TX_PIO_WR_1,
542 				    mtod(m, uint8_t *)+(m->m_len & (~3)),
543 				    m->m_len & 3);
544 		}
545 	} else {
546 		for (m = m0; m != NULL; m = m->m_next) {
547 			if (m->m_len > 1)
548 				CSR_WRITE_MULTI_2(sc, EP_W1_TX_PIO_WR_1,
549 				    mtod(m, uint16_t *), m->m_len / 2);
550 			if (m->m_len & 1)
551 				CSR_WRITE_1(sc, EP_W1_TX_PIO_WR_1,
552 				    *(mtod(m, uint8_t *)+m->m_len - 1));
553 		}
554 	}
555 
556 	while (pad--)
557 		CSR_WRITE_1(sc, EP_W1_TX_PIO_WR_1, 0);	/* Padding */
558 
559 	/* XXX and drop splhigh here */
560 
561 	BPF_MTAP(ifp, m0);
562 
563 	sc->tx_timer = 2;
564 	ifp->if_opackets++;
565 	m_freem(m0);
566 
567 	/*
568 	 * Is another packet coming in? We don't want to overflow
569 	 * the tiny RX fifo.
570 	 */
571 readcheck:
572 	if (CSR_READ_2(sc, EP_W1_RX_STATUS) & RX_BYTES_MASK) {
573 		/*
574 		 * we check if we have packets left, in that case
575 		 * we prepare to come back later
576 		 */
577 		if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
578 			CSR_WRITE_2(sc, EP_COMMAND, SET_TX_AVAIL_THRESH | 8);
579 		goto done;
580 	}
581 	goto startagain;
582 done:;
583 	return;
584 }
585 
586 void
ep_intr(void * arg)587 ep_intr(void *arg)
588 {
589 	struct ep_softc *sc;
590 
591 	sc = (struct ep_softc *) arg;
592 	EP_LOCK(sc);
593 	ep_intr_locked(sc);
594 	EP_UNLOCK(sc);
595 }
596 
597 static void
ep_intr_locked(struct ep_softc * sc)598 ep_intr_locked(struct ep_softc *sc)
599 {
600 	int status;
601 	struct ifnet *ifp;
602 
603 	/* XXX 4.x splbio'd here to reduce interruptability */
604 
605 	/*
606 	 * quick fix: Try to detect an interrupt when the card goes away.
607 	 */
608 	if (sc->gone || CSR_READ_2(sc, EP_STATUS) == 0xffff)
609 		return;
610 	ifp = sc->ifp;
611 
612 	CSR_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK);	/* disable all Ints */
613 
614 rescan:
615 
616 	while ((status = CSR_READ_2(sc, EP_STATUS)) & S_5_INTS) {
617 
618 		/* first acknowledge all interrupt sources */
619 		CSR_WRITE_2(sc, EP_COMMAND, ACK_INTR | (status & S_MASK));
620 
621 		if (status & (S_RX_COMPLETE | S_RX_EARLY))
622 			epread(sc);
623 		if (status & S_TX_AVAIL) {
624 			/* we need ACK */
625 			sc->tx_timer = 0;
626 			ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
627 			GO_WINDOW(sc, 1);
628 			CSR_READ_2(sc, EP_W1_FREE_TX);
629 			epstart_locked(ifp);
630 		}
631 		if (status & S_CARD_FAILURE) {
632 			sc->tx_timer = 0;
633 #ifdef EP_LOCAL_STATS
634 			device_printf(sc->dev, "\n\tStatus: %x\n", status);
635 			GO_WINDOW(sc, 4);
636 			printf("\tFIFO Diagnostic: %x\n",
637 			    CSR_READ_2(sc, EP_W4_FIFO_DIAG));
638 			printf("\tStat: %x\n", sc->stat);
639 			printf("\tIpackets=%d, Opackets=%d\n",
640 			    ifp->if_ipackets, ifp->if_opackets);
641 			printf("\tNOF=%d, NOMB=%d, RXOF=%d, RXOL=%d, TXU=%d\n",
642 			    sc->rx_no_first, sc->rx_no_mbuf, sc->rx_overrunf,
643 			    sc->rx_overrunl, sc->tx_underrun);
644 #else
645 
646 #ifdef DIAGNOSTIC
647 			device_printf(sc->dev,
648 			    "Status: %x (input buffer overflow)\n", status);
649 #else
650 			++ifp->if_ierrors;
651 #endif
652 
653 #endif
654 			epinit_locked(sc);
655 			return;
656 		}
657 		if (status & S_TX_COMPLETE) {
658 			sc->tx_timer = 0;
659 			/*
660 			 * We need ACK. We do it at the end.
661 			 *
662 		         * We need to read TX_STATUS until we get a
663 			 * 0 status in order to turn off the interrupt flag.
664 		         */
665 			while ((status = CSR_READ_1(sc, EP_W1_TX_STATUS)) &
666 			    TXS_COMPLETE) {
667 				if (status & TXS_SUCCES_INTR_REQ)
668 					;	/* nothing */
669 				else if (status &
670 				    (TXS_UNDERRUN | TXS_JABBER |
671 				    TXS_MAX_COLLISION)) {
672 					CSR_WRITE_2(sc, EP_COMMAND, TX_RESET);
673 					if (status & TXS_UNDERRUN) {
674 #ifdef EP_LOCAL_STATS
675 						sc->tx_underrun++;
676 #endif
677 					}
678 					if (status & TXS_MAX_COLLISION) {
679 						/*
680 						 * TXS_MAX_COLLISION we
681 						 * shouldn't get here
682 						 */
683 						++ifp->if_collisions;
684 					}
685 					++ifp->if_oerrors;
686 					CSR_WRITE_2(sc, EP_COMMAND, TX_ENABLE);
687 					/*
688 				         * To have a tx_avail_int but giving
689 					 * the chance to the Reception
690 				         */
691 					if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
692 						CSR_WRITE_2(sc, EP_COMMAND,
693 						    SET_TX_AVAIL_THRESH | 8);
694 				}
695 				/* pops up the next status */
696 				CSR_WRITE_1(sc, EP_W1_TX_STATUS, 0x0);
697 			}	/* while */
698 			ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
699 			GO_WINDOW(sc, 1);
700 			CSR_READ_2(sc, EP_W1_FREE_TX);
701 			epstart_locked(ifp);
702 		}	/* end TX_COMPLETE */
703 	}
704 
705 	CSR_WRITE_2(sc, EP_COMMAND, C_INTR_LATCH);	/* ACK int Latch */
706 
707 	if ((status = CSR_READ_2(sc, EP_STATUS)) & S_5_INTS)
708 		goto rescan;
709 
710 	/* re-enable Ints */
711 	CSR_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK | S_5_INTS);
712 }
713 
714 static void
epread(struct ep_softc * sc)715 epread(struct ep_softc *sc)
716 {
717 	struct mbuf *top, *mcur, *m;
718 	struct ifnet *ifp;
719 	int lenthisone;
720 	short rx_fifo2, status;
721 	short rx_fifo;
722 
723 /* XXX Must be called with sc locked */
724 
725 	ifp = sc->ifp;
726 	status = CSR_READ_2(sc, EP_W1_RX_STATUS);
727 
728 read_again:
729 
730 	if (status & ERR_RX) {
731 		++ifp->if_ierrors;
732 		if (status & ERR_RX_OVERRUN) {
733 			/*
734 		         * We can think the rx latency is actually
735 			 * greather than we expect
736 		         */
737 #ifdef EP_LOCAL_STATS
738 			if (EP_FTST(sc, F_RX_FIRST))
739 				sc->rx_overrunf++;
740 			else
741 				sc->rx_overrunl++;
742 #endif
743 		}
744 		goto out;
745 	}
746 	rx_fifo = rx_fifo2 = status & RX_BYTES_MASK;
747 
748 	if (EP_FTST(sc, F_RX_FIRST)) {
749 		MGETHDR(m, M_NOWAIT, MT_DATA);
750 		if (!m)
751 			goto out;
752 		if (rx_fifo >= MINCLSIZE)
753 			MCLGET(m, M_NOWAIT);
754 		sc->top = sc->mcur = top = m;
755 #define EROUND  ((sizeof(struct ether_header) + 3) & ~3)
756 #define EOFF    (EROUND - sizeof(struct ether_header))
757 		top->m_data += EOFF;
758 
759 		/* Read what should be the header. */
760 		CSR_READ_MULTI_2(sc, EP_W1_RX_PIO_RD_1,
761 		    mtod(top, uint16_t *), sizeof(struct ether_header) / 2);
762 		top->m_len = sizeof(struct ether_header);
763 		rx_fifo -= sizeof(struct ether_header);
764 		sc->cur_len = rx_fifo2;
765 	} else {
766 		/* come here if we didn't have a complete packet last time */
767 		top = sc->top;
768 		m = sc->mcur;
769 		sc->cur_len += rx_fifo2;
770 	}
771 
772 	/* Reads what is left in the RX FIFO */
773 	while (rx_fifo > 0) {
774 		lenthisone = min(rx_fifo, M_TRAILINGSPACE(m));
775 		if (lenthisone == 0) {	/* no room in this one */
776 			mcur = m;
777 			MGET(m, M_NOWAIT, MT_DATA);
778 			if (!m)
779 				goto out;
780 			if (rx_fifo >= MINCLSIZE)
781 				MCLGET(m, M_NOWAIT);
782 			m->m_len = 0;
783 			mcur->m_next = m;
784 			lenthisone = min(rx_fifo, M_TRAILINGSPACE(m));
785 		}
786 		if (EP_FTST(sc, F_ACCESS_32_BITS)) {
787 			/* default for EISA configured cards */
788 			CSR_READ_MULTI_4(sc, EP_W1_RX_PIO_RD_1,
789 			    (uint32_t *)(mtod(m, caddr_t)+m->m_len),
790 			    lenthisone / 4);
791 			m->m_len += (lenthisone & ~3);
792 			if (lenthisone & 3)
793 				CSR_READ_MULTI_1(sc, EP_W1_RX_PIO_RD_1,
794 				    mtod(m, caddr_t)+m->m_len, lenthisone & 3);
795 			m->m_len += (lenthisone & 3);
796 		} else {
797 			CSR_READ_MULTI_2(sc, EP_W1_RX_PIO_RD_1,
798 			    (uint16_t *)(mtod(m, caddr_t)+m->m_len),
799 			    lenthisone / 2);
800 			m->m_len += lenthisone;
801 			if (lenthisone & 1)
802 				*(mtod(m, caddr_t)+m->m_len - 1) =
803 				    CSR_READ_1(sc, EP_W1_RX_PIO_RD_1);
804 		}
805 		rx_fifo -= lenthisone;
806 	}
807 
808 	if (status & ERR_RX_INCOMPLETE) {
809 		/* we haven't received the complete packet */
810 		sc->mcur = m;
811 #ifdef EP_LOCAL_STATS
812 		/* to know how often we come here */
813 		sc->rx_no_first++;
814 #endif
815 		EP_FRST(sc, F_RX_FIRST);
816 		status = CSR_READ_2(sc, EP_W1_RX_STATUS);
817 		if (!(status & ERR_RX_INCOMPLETE)) {
818 			/*
819 			 * We see if by now, the packet has completly
820 			 * arrived
821 			 */
822 			goto read_again;
823 		}
824 		CSR_WRITE_2(sc, EP_COMMAND,
825 		    SET_RX_EARLY_THRESH | RX_NEXT_EARLY_THRESH);
826 		return;
827 	}
828 	CSR_WRITE_2(sc, EP_COMMAND, RX_DISCARD_TOP_PACK);
829 	++ifp->if_ipackets;
830 	EP_FSET(sc, F_RX_FIRST);
831 	top->m_pkthdr.rcvif = sc->ifp;
832 	top->m_pkthdr.len = sc->cur_len;
833 
834 	/*
835 	 * Drop locks before calling if_input() since it may re-enter
836 	 * ep_start() in the netisr case.  This would result in a
837 	 * lock reversal.  Better performance might be obtained by
838 	 * chaining all packets received, dropping the lock, and then
839 	 * calling if_input() on each one.
840 	 */
841 	EP_UNLOCK(sc);
842 	(*ifp->if_input) (ifp, top);
843 	EP_LOCK(sc);
844 	sc->top = 0;
845 	EP_BUSY_WAIT(sc);
846 	CSR_WRITE_2(sc, EP_COMMAND, SET_RX_EARLY_THRESH | RX_INIT_EARLY_THRESH);
847 	return;
848 
849 out:
850 	CSR_WRITE_2(sc, EP_COMMAND, RX_DISCARD_TOP_PACK);
851 	if (sc->top) {
852 		m_freem(sc->top);
853 		sc->top = 0;
854 #ifdef EP_LOCAL_STATS
855 		sc->rx_no_mbuf++;
856 #endif
857 	}
858 	EP_FSET(sc, F_RX_FIRST);
859 	EP_BUSY_WAIT(sc);
860 	CSR_WRITE_2(sc, EP_COMMAND, SET_RX_EARLY_THRESH | RX_INIT_EARLY_THRESH);
861 }
862 
863 static int
ep_ifmedia_upd(struct ifnet * ifp)864 ep_ifmedia_upd(struct ifnet *ifp)
865 {
866 	struct ep_softc *sc = ifp->if_softc;
867 	int i = 0, j;
868 
869 	GO_WINDOW(sc, 0);
870 	CSR_WRITE_2(sc, EP_COMMAND, STOP_TRANSCEIVER);
871 	GO_WINDOW(sc, 4);
872 	CSR_WRITE_2(sc, EP_W4_MEDIA_TYPE, DISABLE_UTP);
873 	GO_WINDOW(sc, 0);
874 
875 	switch (IFM_SUBTYPE(sc->ifmedia.ifm_media)) {
876 	case IFM_10_T:
877 		if (sc->ep_connectors & UTP) {
878 			i = ACF_CONNECTOR_UTP;
879 			GO_WINDOW(sc, 4);
880 			CSR_WRITE_2(sc, EP_W4_MEDIA_TYPE, ENABLE_UTP);
881 		}
882 		break;
883 	case IFM_10_2:
884 		if (sc->ep_connectors & BNC) {
885 			i = ACF_CONNECTOR_BNC;
886 			CSR_WRITE_2(sc, EP_COMMAND, START_TRANSCEIVER);
887 			DELAY(DELAY_MULTIPLE * 1000);
888 		}
889 		break;
890 	case IFM_10_5:
891 		if (sc->ep_connectors & AUI)
892 			i = ACF_CONNECTOR_AUI;
893 		break;
894 	default:
895 		i = sc->ep_connector;
896 		device_printf(sc->dev,
897 		    "strange connector type in EEPROM: assuming AUI\n");
898 	}
899 
900 	GO_WINDOW(sc, 0);
901 	j = CSR_READ_2(sc, EP_W0_ADDRESS_CFG) & 0x3fff;
902 	CSR_WRITE_2(sc, EP_W0_ADDRESS_CFG, j | (i << ACF_CONNECTOR_BITS));
903 
904 	return (0);
905 }
906 
907 static void
ep_ifmedia_sts(struct ifnet * ifp,struct ifmediareq * ifmr)908 ep_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
909 {
910 	struct ep_softc *sc = ifp->if_softc;
911 	uint16_t ms;
912 
913 	switch (IFM_SUBTYPE(sc->ifmedia.ifm_media)) {
914 	case IFM_10_T:
915 		GO_WINDOW(sc, 4);
916 		ms = CSR_READ_2(sc, EP_W4_MEDIA_TYPE);
917 		GO_WINDOW(sc, 0);
918 		ifmr->ifm_status = IFM_AVALID;
919 		if (ms & MT_LB) {
920 			ifmr->ifm_status |= IFM_ACTIVE;
921 			ifmr->ifm_active = IFM_ETHER | IFM_10_T;
922 		} else {
923 			ifmr->ifm_active = IFM_ETHER | IFM_NONE;
924 		}
925 		break;
926 	default:
927 		ifmr->ifm_active = sc->ifmedia.ifm_media;
928 		break;
929 	}
930 }
931 
932 static int
epioctl(struct ifnet * ifp,u_long cmd,caddr_t data)933 epioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
934 {
935 	struct ep_softc *sc = ifp->if_softc;
936 	struct ifreq *ifr = (struct ifreq *) data;
937 	int error = 0;
938 
939 	switch (cmd) {
940 	case SIOCSIFFLAGS:
941 		EP_LOCK(sc);
942 		if (((ifp->if_flags & IFF_UP) == 0) &&
943 		    (ifp->if_drv_flags & IFF_DRV_RUNNING)) {
944 			epstop(sc);
945 		} else
946 			/* reinitialize card on any parameter change */
947 			epinit_locked(sc);
948 		EP_UNLOCK(sc);
949 		break;
950 	case SIOCADDMULTI:
951 	case SIOCDELMULTI:
952 		/*
953 		 * The Etherlink III has no programmable multicast
954 		 * filter.  We always initialize the card to be
955 		 * promiscuous to multicast, since we're always a
956 		 * member of the ALL-SYSTEMS group, so there's no
957 		 * need to process SIOC*MULTI requests.
958 		 */
959 		error = 0;
960 		break;
961 	case SIOCSIFMEDIA:
962 	case SIOCGIFMEDIA:
963 		if (!sc->epb.mii_trans)
964 			error = ifmedia_ioctl(ifp, ifr, &sc->ifmedia, cmd);
965 		else
966 			error = EINVAL;
967 		break;
968 	default:
969 		error = ether_ioctl(ifp, cmd, data);
970 		break;
971 	}
972 	return (error);
973 }
974 
975 static void
eptick(void * arg)976 eptick(void *arg)
977 {
978 	struct ep_softc *sc;
979 
980 	sc = arg;
981 	if (sc->tx_timer != 0 && --sc->tx_timer == 0)
982 		epwatchdog(sc);
983 	callout_reset(&sc->watchdog_timer, hz, eptick, sc);
984 }
985 
986 static void
epwatchdog(struct ep_softc * sc)987 epwatchdog(struct ep_softc *sc)
988 {
989 	struct ifnet *ifp;
990 
991 	ifp = sc->ifp;
992 	if (sc->gone)
993 		return;
994 	ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
995 	epstart_locked(ifp);
996 	ep_intr_locked(sc);
997 }
998 
999 static void
epstop(struct ep_softc * sc)1000 epstop(struct ep_softc *sc)
1001 {
1002 	CSR_WRITE_2(sc, EP_COMMAND, RX_DISABLE);
1003 	CSR_WRITE_2(sc, EP_COMMAND, RX_DISCARD_TOP_PACK);
1004 	EP_BUSY_WAIT(sc);
1005 
1006 	CSR_WRITE_2(sc, EP_COMMAND, TX_DISABLE);
1007 	CSR_WRITE_2(sc, EP_COMMAND, STOP_TRANSCEIVER);
1008 	DELAY(800);
1009 
1010 	CSR_WRITE_2(sc, EP_COMMAND, RX_RESET);
1011 	EP_BUSY_WAIT(sc);
1012 	CSR_WRITE_2(sc, EP_COMMAND, TX_RESET);
1013 	EP_BUSY_WAIT(sc);
1014 
1015 	CSR_WRITE_2(sc, EP_COMMAND, C_INTR_LATCH);
1016 	CSR_WRITE_2(sc, EP_COMMAND, SET_RD_0_MASK);
1017 	CSR_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK);
1018 	CSR_WRITE_2(sc, EP_COMMAND, SET_RX_FILTER);
1019 
1020 	sc->ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
1021 	callout_stop(&sc->watchdog_timer);
1022 }
1023