1 /*-
2 * Copyright (c) 2010 Hans Petter Selasky. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 */
25
26 #include <sys/cdefs.h>
27 __FBSDID("$FreeBSD$");
28
29 #include <sys/stdint.h>
30 #include <sys/stddef.h>
31 #include <sys/param.h>
32 #include <sys/queue.h>
33 #include <sys/types.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/bus.h>
37 #include <sys/module.h>
38 #include <sys/lock.h>
39 #include <sys/mutex.h>
40 #include <sys/condvar.h>
41 #include <sys/sysctl.h>
42 #include <sys/sx.h>
43 #include <sys/unistd.h>
44 #include <sys/callout.h>
45 #include <sys/malloc.h>
46 #include <sys/priv.h>
47
48 #include <dev/usb/usb.h>
49 #include <dev/usb/usbdi.h>
50
51 #include <dev/usb/usb_core.h>
52 #include <dev/usb/usb_busdma.h>
53 #include <dev/usb/usb_process.h>
54 #include <dev/usb/usb_util.h>
55
56 #include <dev/usb/usb_controller.h>
57 #include <dev/usb/usb_bus.h>
58 #include <dev/usb/usb_pci.h>
59 #include <dev/usb/controller/xhci.h>
60 #include <dev/usb/controller/xhcireg.h>
61 #include "usb_if.h"
62
63 static device_probe_t xhci_pci_probe;
64 static device_attach_t xhci_pci_attach;
65 static device_detach_t xhci_pci_detach;
66 static usb_take_controller_t xhci_pci_take_controller;
67
68 static device_method_t xhci_device_methods[] = {
69 /* device interface */
70 DEVMETHOD(device_probe, xhci_pci_probe),
71 DEVMETHOD(device_attach, xhci_pci_attach),
72 DEVMETHOD(device_detach, xhci_pci_detach),
73 DEVMETHOD(device_suspend, bus_generic_suspend),
74 DEVMETHOD(device_resume, bus_generic_resume),
75 DEVMETHOD(device_shutdown, bus_generic_shutdown),
76 DEVMETHOD(usb_take_controller, xhci_pci_take_controller),
77
78 DEVMETHOD_END
79 };
80
81 static driver_t xhci_driver = {
82 .name = "xhci",
83 .methods = xhci_device_methods,
84 .size = sizeof(struct xhci_softc),
85 };
86
87 static devclass_t xhci_devclass;
88
89 DRIVER_MODULE(xhci, pci, xhci_driver, xhci_devclass, NULL, NULL);
90 MODULE_DEPEND(xhci, usb, 1, 1, 1);
91
92 static const char *
xhci_pci_match(device_t self)93 xhci_pci_match(device_t self)
94 {
95 uint32_t device_id = pci_get_devid(self);
96
97 switch (device_id) {
98 case 0x01941033:
99 return ("NEC uPD720200 USB 3.0 controller");
100
101 case 0x10001b73:
102 return ("Fresco Logic FL1000G USB 3.0 controller");
103
104 case 0x10421b21:
105 return ("ASMedia ASM1042 USB 3.0 controller");
106 case 0x11421b21:
107 return ("ASMedia ASM1042A USB 3.0 controller");
108
109 case 0x0f358086:
110 return ("Intel BayTrail USB 3.0 controller");
111 case 0x9c318086:
112 case 0x1e318086:
113 return ("Intel Panther Point USB 3.0 controller");
114 case 0x8c318086:
115 return ("Intel Lynx Point USB 3.0 controller");
116 case 0x8cb18086:
117 return ("Intel Wildcat Point USB 3.0 controller");
118 case 0x9cb18086:
119 return ("Broadwell Integrated PCH-LP chipset USB 3.0 controller");
120
121 case 0xa01b177d:
122 return ("Cavium ThunderX USB 3.0 controller");
123
124 default:
125 break;
126 }
127
128 if ((pci_get_class(self) == PCIC_SERIALBUS)
129 && (pci_get_subclass(self) == PCIS_SERIALBUS_USB)
130 && (pci_get_progif(self) == PCIP_SERIALBUS_USB_XHCI)) {
131 return ("XHCI (generic) USB 3.0 controller");
132 }
133 return (NULL); /* dunno */
134 }
135
136 static int
xhci_pci_probe(device_t self)137 xhci_pci_probe(device_t self)
138 {
139 const char *desc = xhci_pci_match(self);
140
141 if (desc) {
142 device_set_desc(self, desc);
143 return (BUS_PROBE_DEFAULT);
144 } else {
145 return (ENXIO);
146 }
147 }
148
149 static int xhci_use_msi = 1;
150 TUNABLE_INT("hw.usb.xhci.msi", &xhci_use_msi);
151 static int xhci_use_msix = 1;
152 TUNABLE_INT("hw.usb.xhci.msix", &xhci_use_msix);
153
154 static void
xhci_interrupt_poll(void * _sc)155 xhci_interrupt_poll(void *_sc)
156 {
157 struct xhci_softc *sc = _sc;
158 USB_BUS_UNLOCK(&sc->sc_bus);
159 xhci_interrupt(sc);
160 USB_BUS_LOCK(&sc->sc_bus);
161 usb_callout_reset(&sc->sc_callout, 1, (void *)&xhci_interrupt_poll, sc);
162 }
163
164 static int
xhci_pci_port_route(device_t self,uint32_t set,uint32_t clear)165 xhci_pci_port_route(device_t self, uint32_t set, uint32_t clear)
166 {
167 uint32_t temp;
168 uint32_t usb3_mask;
169 uint32_t usb2_mask;
170
171 temp = pci_read_config(self, PCI_XHCI_INTEL_USB3_PSSEN, 4) |
172 pci_read_config(self, PCI_XHCI_INTEL_XUSB2PR, 4);
173
174 temp |= set;
175 temp &= ~clear;
176
177 /* Don't set bits which the hardware doesn't support */
178 usb3_mask = pci_read_config(self, PCI_XHCI_INTEL_USB3PRM, 4);
179 usb2_mask = pci_read_config(self, PCI_XHCI_INTEL_USB2PRM, 4);
180
181 pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp & usb3_mask, 4);
182 pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp & usb2_mask, 4);
183
184 device_printf(self, "Port routing mask set to 0x%08x\n", temp);
185
186 return (0);
187 }
188
189 static int
xhci_pci_attach(device_t self)190 xhci_pci_attach(device_t self)
191 {
192 struct xhci_softc *sc = device_get_softc(self);
193 int count, err, msix_table, rid;
194 uint8_t usemsi = 1;
195 uint8_t usedma32 = 0;
196
197 rid = PCI_XHCI_CBMEM;
198 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
199 RF_ACTIVE);
200 if (!sc->sc_io_res) {
201 device_printf(self, "Could not map memory\n");
202 return (ENOMEM);
203 }
204 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
205 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
206 sc->sc_io_size = rman_get_size(sc->sc_io_res);
207
208 switch (pci_get_devid(self)) {
209 case 0x01941033: /* NEC uPD720200 USB 3.0 controller */
210 case 0x00141912: /* NEC uPD720201 USB 3.0 controller */
211 /* Don't use 64-bit DMA on these controllers. */
212 usedma32 = 1;
213 break;
214 case 0x10001b73: /* FL1000G */
215 /* Fresco Logic host doesn't support MSI. */
216 usemsi = 0;
217 break;
218 case 0x0f358086: /* BayTrail */
219 case 0x9c318086: /* Panther Point */
220 case 0x1e318086: /* Panther Point */
221 case 0x8c318086: /* Lynx Point */
222 case 0x8cb18086: /* Wildcat Point */
223 case 0x9cb18086: /* Broadwell Mobile Integrated */
224 /*
225 * On Intel chipsets, reroute ports from EHCI to XHCI
226 * controller and use a different IMOD value.
227 */
228 sc->sc_port_route = &xhci_pci_port_route;
229 sc->sc_imod_default = XHCI_IMOD_DEFAULT_LP;
230 break;
231 }
232
233 if (xhci_init(sc, self, usedma32)) {
234 device_printf(self, "Could not initialize softc\n");
235 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM,
236 sc->sc_io_res);
237 return (ENXIO);
238 }
239
240 pci_enable_busmaster(self);
241
242 usb_callout_init_mtx(&sc->sc_callout, &sc->sc_bus.bus_mtx, 0);
243
244 rid = 0;
245 if (xhci_use_msix && (msix_table = pci_msix_table_bar(self)) >= 0) {
246 sc->sc_msix_res = bus_alloc_resource_any(self, SYS_RES_MEMORY,
247 &msix_table, RF_ACTIVE);
248 if (sc->sc_msix_res == NULL) {
249 /* May not be enabled */
250 device_printf(self,
251 "Unable to map MSI-X table \n");
252 } else {
253 count = 1;
254 if (pci_alloc_msix(self, &count) == 0) {
255 if (bootverbose)
256 device_printf(self, "MSI-X enabled\n");
257 rid = 1;
258 } else {
259 bus_release_resource(self, SYS_RES_MEMORY,
260 msix_table, sc->sc_msix_res);
261 sc->sc_msix_res = NULL;
262 }
263 }
264 }
265 if (rid == 0 && xhci_use_msi && usemsi) {
266 count = 1;
267 if (pci_alloc_msi(self, &count) == 0) {
268 if (bootverbose)
269 device_printf(self, "MSI enabled\n");
270 rid = 1;
271 }
272 }
273 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
274 RF_ACTIVE | (rid != 0 ? 0 : RF_SHAREABLE));
275 if (sc->sc_irq_res == NULL) {
276 pci_release_msi(self);
277 device_printf(self, "Could not allocate IRQ\n");
278 /* goto error; FALLTHROUGH - use polling */
279 }
280 sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
281 if (sc->sc_bus.bdev == NULL) {
282 device_printf(self, "Could not add USB device\n");
283 goto error;
284 }
285 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
286
287 sprintf(sc->sc_vendor, "0x%04x", pci_get_vendor(self));
288
289 if (sc->sc_irq_res != NULL) {
290 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
291 NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl);
292 if (err != 0) {
293 bus_release_resource(self, SYS_RES_IRQ,
294 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res);
295 sc->sc_irq_res = NULL;
296 pci_release_msi(self);
297 device_printf(self, "Could not setup IRQ, err=%d\n", err);
298 sc->sc_intr_hdl = NULL;
299 }
300 }
301 if (sc->sc_irq_res == NULL || sc->sc_intr_hdl == NULL) {
302 if (xhci_use_polling() != 0) {
303 device_printf(self, "Interrupt polling at %dHz\n", hz);
304 USB_BUS_LOCK(&sc->sc_bus);
305 xhci_interrupt_poll(sc);
306 USB_BUS_UNLOCK(&sc->sc_bus);
307 } else
308 goto error;
309 }
310
311 xhci_pci_take_controller(self);
312
313 err = xhci_halt_controller(sc);
314
315 if (err == 0)
316 err = xhci_start_controller(sc);
317
318 if (err == 0)
319 err = device_probe_and_attach(sc->sc_bus.bdev);
320
321 if (err) {
322 device_printf(self, "XHCI halt/start/probe failed err=%d\n", err);
323 goto error;
324 }
325 return (0);
326
327 error:
328 xhci_pci_detach(self);
329 return (ENXIO);
330 }
331
332 static int
xhci_pci_detach(device_t self)333 xhci_pci_detach(device_t self)
334 {
335 struct xhci_softc *sc = device_get_softc(self);
336 device_t bdev;
337
338 if (sc->sc_bus.bdev != NULL) {
339 bdev = sc->sc_bus.bdev;
340 device_detach(bdev);
341 device_delete_child(self, bdev);
342 }
343 /* during module unload there are lots of children leftover */
344 device_delete_children(self);
345
346 usb_callout_drain(&sc->sc_callout);
347 xhci_halt_controller(sc);
348
349 pci_disable_busmaster(self);
350
351 if (sc->sc_irq_res && sc->sc_intr_hdl) {
352 bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
353 sc->sc_intr_hdl = NULL;
354 }
355 if (sc->sc_irq_res) {
356 bus_release_resource(self, SYS_RES_IRQ,
357 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res);
358 sc->sc_irq_res = NULL;
359 pci_release_msi(self);
360 }
361 if (sc->sc_io_res) {
362 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM,
363 sc->sc_io_res);
364 sc->sc_io_res = NULL;
365 }
366 if (sc->sc_msix_res) {
367 bus_release_resource(self, SYS_RES_MEMORY,
368 rman_get_rid(sc->sc_msix_res), sc->sc_msix_res);
369 sc->sc_msix_res = NULL;
370 }
371
372 xhci_uninit(sc);
373
374 return (0);
375 }
376
377 static int
xhci_pci_take_controller(device_t self)378 xhci_pci_take_controller(device_t self)
379 {
380 struct xhci_softc *sc = device_get_softc(self);
381 uint32_t cparams;
382 uint32_t eecp;
383 uint32_t eec;
384 uint16_t to;
385 uint8_t bios_sem;
386
387 cparams = XREAD4(sc, capa, XHCI_HCSPARAMS0);
388
389 eec = -1;
390
391 /* Synchronise with the BIOS if it owns the controller. */
392 for (eecp = XHCI_HCS0_XECP(cparams) << 2; eecp != 0 && XHCI_XECP_NEXT(eec);
393 eecp += XHCI_XECP_NEXT(eec) << 2) {
394 eec = XREAD4(sc, capa, eecp);
395
396 if (XHCI_XECP_ID(eec) != XHCI_ID_USB_LEGACY)
397 continue;
398 bios_sem = XREAD1(sc, capa, eecp +
399 XHCI_XECP_BIOS_SEM);
400 if (bios_sem == 0)
401 continue;
402 device_printf(sc->sc_bus.bdev, "waiting for BIOS "
403 "to give up control\n");
404 XWRITE1(sc, capa, eecp +
405 XHCI_XECP_OS_SEM, 1);
406 to = 500;
407 while (1) {
408 bios_sem = XREAD1(sc, capa, eecp +
409 XHCI_XECP_BIOS_SEM);
410 if (bios_sem == 0)
411 break;
412
413 if (--to == 0) {
414 device_printf(sc->sc_bus.bdev,
415 "timed out waiting for BIOS\n");
416 break;
417 }
418 usb_pause_mtx(NULL, hz / 100); /* wait 10ms */
419 }
420 }
421 return (0);
422 }
423