xref: /trueos/sys/dev/stg/tmc18c30var.h (revision b972b67ed72b5687a023c92602aaef64163b2f59)
1 /*	$FreeBSD$	*/
2 /*	$NecBSD: tmc18c30var.h,v 1.12.18.2 2001/06/13 05:51:23 honda Exp $	*/
3 /*	$NetBSD$	*/
4 
5 /*-
6  * [NetBSD for NEC PC-98 series]
7  *  Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001
8  *	NetBSD/pc98 porting staff. All rights reserved.
9  *  Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001
10  *	Naofumi HONDA. All rights reserved.
11  *  Copyright (c) 1996, 1997, 1998
12  *	Kouichi Matsuda. All rights reserved.
13  *
14  *  Redistribution and use in source and binary forms, with or without
15  *  modification, are permitted provided that the following conditions
16  *  are met:
17  *  1. Redistributions of source code must retain the above copyright
18  *     notice, this list of conditions and the following disclaimer.
19  *  2. Redistributions in binary form must reproduce the above copyright
20  *     notice, this list of conditions and the following disclaimer in the
21  *     documentation and/or other materials provided with the distribution.
22  *  3. The name of the author may not be used to endorse or promote products
23  *     derived from this software without specific prior written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
26  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
27  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
28  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
29  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
30  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
31  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
33  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
34  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 #ifndef	_TMC18C30VAR_H_
39 #define	_TMC18C30VAR_H_
40 
41 /*****************************************************************
42  * Host adapter structure
43  *****************************************************************/
44 struct stg_softc {
45 	struct scsi_low_softc sc_sclow;	/* generic data */
46 
47 	bus_space_tag_t sc_iot;
48 	bus_space_tag_t sc_memt;
49 	bus_space_handle_t sc_ioh;
50 
51 	int port_rid;
52 	int irq_rid;
53 	int mem_rid;
54 	struct resource *port_res;
55 	struct resource *irq_res;
56 	struct resource *mem_res;
57 
58 	void *stg_intrhand;
59 
60 	int sc_tmaxcnt;
61 	u_int sc_chip;			/* chip type */
62 	u_int sc_fsz;			/* fifo size */
63 	u_int sc_idbit;			/* host id bit */
64 	u_int sc_wthold;		/* write thread */
65 	u_int sc_rthold;		/* read thread */
66 	u_int sc_maxwsize;		/* max write size */
67 	int sc_dataout_timeout;		/* data out timeout counter */
68 	int sc_ubf_timeout;		/* unexpected bus free timeout */
69 
70 	u_int8_t sc_fcWinit;		/* write flags */
71 	u_int8_t sc_fcRinit;		/* read flags */
72 
73 	u_int8_t sc_icinit;		/* interrupt masks */
74 	u_int8_t sc_busc;		/* default bus control register */
75 	u_int8_t sc_imsg;		/* identify msg required */
76 	u_int8_t sc_busimg;		/* bus control register image */
77 };
78 
79 /*****************************************************************
80  * Lun information
81  *****************************************************************/
82 struct stg_targ_info {
83 	struct targ_info sti_ti;		/* generic data */
84 
85 	u_int8_t sti_reg_synch;		/* synch register per lun */
86 };
87 
88 /*****************************************************************
89  * Proto
90  *****************************************************************/
91 int stgprobesubr(bus_space_tag_t, bus_space_handle_t, u_int);
92 void stgattachsubr(struct stg_softc *);
93 int stgintr(void *);
94 
95 #endif	/* !_TMC18C30VAR_H_ */
96