1 /* $NetBSD: dl10019.c,v 1.17 2021/07/01 20:39:15 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: dl10019.c,v 1.17 2021/07/01 20:39:15 thorpej Exp $");
34
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/mbuf.h>
38 #include <sys/syslog.h>
39 #include <sys/socket.h>
40 #include <sys/device.h>
41
42 #include <net/if.h>
43 #include <net/if_ether.h>
44 #include <net/if_media.h>
45
46 #include <sys/bus.h>
47 #include <sys/intr.h>
48
49 #include <dev/mii/miivar.h>
50 #include <dev/mii/mii.h>
51 #include <dev/mii/mii_bitbang.h>
52
53 #include <dev/ic/dp8390reg.h>
54 #include <dev/ic/dp8390var.h>
55
56 #include <dev/ic/ne2000reg.h>
57 #include <dev/ic/ne2000var.h>
58
59 #include <dev/ic/dl10019reg.h>
60 #include <dev/ic/dl10019var.h>
61
62 int dl10019_mii_readreg(device_t, int, int, uint16_t *);
63 int dl10019_mii_writereg(device_t, int, int, uint16_t);
64 void dl10019_mii_statchg(struct ifnet *);
65
66 /*
67 * MII bit-bang glue.
68 */
69 u_int32_t dl10019_mii_bitbang_read(device_t);
70 void dl10019_mii_bitbang_write(device_t, u_int32_t);
71
72 const struct mii_bitbang_ops dl10019_mii_bitbang_ops = {
73 dl10019_mii_bitbang_read,
74 dl10019_mii_bitbang_write,
75 {
76 DL0_GPIO_MII_DATAOUT, /* MII_BIT_MDO */
77 DL0_GPIO_MII_DATAIN, /* MII_BIT_MDI */
78 DL0_GPIO_MII_CLK, /* MII_BIT_MDC */
79 DL0_19_GPIO_MII_DIROUT, /* MII_BIT_DIR_HOST_PHY */
80 0, /* MII_BIT_DIR_PHY_HOST */
81 }
82 };
83
84 const struct mii_bitbang_ops dl10022_mii_bitbang_ops = {
85 dl10019_mii_bitbang_read,
86 dl10019_mii_bitbang_write,
87 {
88 DL0_GPIO_MII_DATAOUT, /* MII_BIT_MDO */
89 DL0_GPIO_MII_DATAIN, /* MII_BIT_MDI */
90 DL0_GPIO_MII_CLK, /* MII_BIT_MDC */
91 DL0_22_GPIO_MII_DIROUT, /* MII_BIT_DIR_HOST_PHY */
92 0, /* MII_BIT_DIR_PHY_HOST */
93 }
94 };
95
96 static void
dl10019_mii_reset(struct dp8390_softc * sc)97 dl10019_mii_reset(struct dp8390_softc *sc)
98 {
99 struct ne2000_softc *nsc = (void *) sc;
100 int i;
101
102 if (nsc->sc_type != NE2000_TYPE_DL10022)
103 return;
104
105 for (i = 0; i < 2; i++) {
106 bus_space_write_1(sc->sc_regt, sc->sc_regh, NEDL_DL0_GPIO,
107 0x08);
108 delay(1);
109 bus_space_write_1(sc->sc_regt, sc->sc_regh, NEDL_DL0_GPIO,
110 0x0c);
111 delay(1);
112 }
113 bus_space_write_1(sc->sc_regt, sc->sc_regh, NEDL_DL0_GPIO, 0x00);
114 }
115
116 static void
dl10019_tick(void * arg)117 dl10019_tick(void *arg)
118 {
119 struct dp8390_softc *sc = arg;
120 int s;
121
122 s = splnet();
123 mii_tick(&sc->sc_mii);
124 splx(s);
125
126 callout_schedule(&sc->sc_tick_ch, hz);
127 }
128
129 void
dl10019_media_init(struct dp8390_softc * sc)130 dl10019_media_init(struct dp8390_softc *sc)
131 {
132 struct ifnet *ifp = &sc->sc_ec.ec_if;
133 struct mii_data *mii = &sc->sc_mii;
134
135 callout_setfunc(&sc->sc_tick_ch, dl10019_tick, sc);
136
137 sc->sc_ec.ec_mii = mii;
138
139 mii->mii_ifp = ifp;
140 mii->mii_readreg = dl10019_mii_readreg;
141 mii->mii_writereg = dl10019_mii_writereg;
142 mii->mii_statchg = dl10019_mii_statchg;
143 ifmedia_init(&mii->mii_media, IFM_IMASK, dp8390_mediachange,
144 dp8390_mediastatus);
145
146 dl10019_mii_reset(sc);
147
148 mii_attach(sc->sc_dev, mii, 0xffffffff, MII_PHY_ANY,
149 MII_OFFSET_ANY, 0);
150
151 if (LIST_FIRST(&mii->mii_phys) == NULL) {
152 ifmedia_add(&mii->mii_media, IFM_ETHER | IFM_NONE, 0, NULL);
153 ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_NONE);
154 } else
155 ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_AUTO);
156 }
157
158 void
dl10019_media_fini(struct dp8390_softc * sc)159 dl10019_media_fini(struct dp8390_softc *sc)
160 {
161
162 callout_stop(&sc->sc_tick_ch);
163 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY);
164 /* dp8390_detach() will call ifmedia_fini(). */
165 }
166
167 int
dl10019_mediachange(struct dp8390_softc * sc)168 dl10019_mediachange(struct dp8390_softc *sc)
169 {
170 int rc;
171
172 if ((rc = mii_mediachg(&sc->sc_mii)) == ENXIO)
173 return 0;
174 return rc;
175 }
176
177 void
dl10019_mediastatus(struct dp8390_softc * sc,struct ifmediareq * ifmr)178 dl10019_mediastatus(struct dp8390_softc *sc, struct ifmediareq *ifmr)
179 {
180
181 mii_pollstat(&sc->sc_mii);
182 ifmr->ifm_status = sc->sc_mii.mii_media_status;
183 ifmr->ifm_active = sc->sc_mii.mii_media_active;
184 }
185
186 void
dl10019_init_card(struct dp8390_softc * sc)187 dl10019_init_card(struct dp8390_softc *sc)
188 {
189
190 dl10019_mii_reset(sc);
191 mii_mediachg(&sc->sc_mii);
192 callout_schedule(&sc->sc_tick_ch, hz);
193 }
194
195 void
dl10019_stop_card(struct dp8390_softc * sc)196 dl10019_stop_card(struct dp8390_softc *sc)
197 {
198
199 callout_stop(&sc->sc_tick_ch);
200 mii_down(&sc->sc_mii);
201 }
202
203 u_int32_t
dl10019_mii_bitbang_read(device_t self)204 dl10019_mii_bitbang_read(device_t self)
205 {
206 struct dp8390_softc *sc = device_private(self);
207
208 /* We're already in Page 0. */
209 return (bus_space_read_1(sc->sc_regt, sc->sc_regh, NEDL_DL0_GPIO) &
210 ~DL0_GPIO_PRESERVE);
211 }
212
213 void
dl10019_mii_bitbang_write(device_t self,u_int32_t val)214 dl10019_mii_bitbang_write(device_t self, u_int32_t val)
215 {
216 struct dp8390_softc *sc = device_private(self);
217 u_int8_t gpio;
218
219 /* We're already in Page 0. */
220 gpio = bus_space_read_1(sc->sc_regt, sc->sc_regh, NEDL_DL0_GPIO);
221 bus_space_write_1(sc->sc_regt, sc->sc_regh, NEDL_DL0_GPIO,
222 (val & ~DL0_GPIO_PRESERVE) | (gpio & DL0_GPIO_PRESERVE));
223 }
224
225 int
dl10019_mii_readreg(device_t self,int phy,int reg,uint16_t * val)226 dl10019_mii_readreg(device_t self, int phy, int reg, uint16_t *val)
227 {
228 struct ne2000_softc *nsc = device_private(self);
229 const struct mii_bitbang_ops *ops;
230
231 ops = (nsc->sc_type == NE2000_TYPE_DL10022) ?
232 &dl10022_mii_bitbang_ops : &dl10019_mii_bitbang_ops;
233
234 return mii_bitbang_readreg(self, ops, phy, reg, val);
235 }
236
237 int
dl10019_mii_writereg(device_t self,int phy,int reg,uint16_t val)238 dl10019_mii_writereg(device_t self, int phy, int reg, uint16_t val)
239 {
240 struct ne2000_softc *nsc = device_private(self);
241 const struct mii_bitbang_ops *ops;
242
243 ops = (nsc->sc_type == NE2000_TYPE_DL10022) ?
244 &dl10022_mii_bitbang_ops : &dl10019_mii_bitbang_ops;
245
246 return mii_bitbang_writereg(self, ops, phy, reg, val);
247 }
248
249 void
dl10019_mii_statchg(struct ifnet * ifp)250 dl10019_mii_statchg(struct ifnet *ifp)
251 {
252 struct ne2000_softc *nsc = ifp->if_softc;
253 struct dp8390_softc *sc = &nsc->sc_dp8390;
254
255 /*
256 * Disable collision detection on the DL10022 if
257 * we are on a full-duplex link.
258 */
259 if (nsc->sc_type == NE2000_TYPE_DL10022) {
260 u_int8_t diag;
261
262 if (sc->sc_mii.mii_media_active & IFM_FDX)
263 diag = DL0_DIAG_NOCOLLDETECT;
264 else
265 diag = 0;
266 bus_space_write_1(sc->sc_regt, sc->sc_regh,
267 NEDL_DL0_DIAG, diag);
268 }
269 }
270