1 /*-
2 * Copyright (c) 2005, M. Warner Losh
3 * Copyright (c) 1995, David Greenman
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice unmodified, this list of conditions, and the following
11 * disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD$
29 */
30
31 /*
32 * Notes for adding media support. Each chipset is somewhat different
33 * from the others. Linux has a table of OIDs that it uses to see what
34 * supports the misc register of the NS83903. But a sampling of datasheets
35 * I could dig up on cards I own paints a different picture.
36 *
37 * Chipset specific details:
38 * NS 83903/902A paired
39 * ccr base 0x1020
40 * id register at 0x1000: 7-3 = 0, 2-0 = 1.
41 * (maybe this test is too week)
42 * misc register at 0x018:
43 * 6 WAIT_TOUTENABLE enable watchdog timeout
44 * 3 AUI/TPI 1 AUX, 0 TPI
45 * 2 loopback
46 * 1 gdlink (tpi mode only) 1 tp good, 0 tp bad
47 * 0 0-no mam, 1 mam connected
48 *
49 * NS83926 appears to be a NS pcmcia glue chip used on the IBM Ethernet II
50 * and the NEC PC9801N-J12 ccr base 0x2000!
51 *
52 * winbond 289c926
53 * ccr base 0xfd0
54 * cfb (am 0xff2):
55 * 0-1 PHY01 00 TPI, 01 10B2, 10 10B5, 11 TPI (reduced squ)
56 * 2 LNKEN 0 - enable link and auto switch, 1 disable
57 * 3 LNKSTS TPI + LNKEN=0 + link good == 1, else 0
58 * sr (am 0xff4)
59 * 88 00 88 00 88 00, etc
60 *
61 * TMI tc3299a (cr PHY01 == 0)
62 * ccr base 0x3f8
63 * cra (io 0xa)
64 * crb (io 0xb)
65 * 0-1 PHY01 00 auto, 01 res, 10 10B5, 11 TPI
66 * 2 GDLINK 1 disable checking of link
67 * 6 LINK 0 bad link, 1 good link
68 *
69 * EN5017A, EN5020 no data, but very popular
70 * Other chips?
71 * NetBSD supports RTL8019, but none have surfaced that I can see
72 */
73
74 #include <sys/param.h>
75 #include <sys/systm.h>
76 #include <sys/socket.h>
77 #include <sys/kernel.h>
78 #include <sys/module.h>
79 #include <sys/bus.h>
80 #include <machine/bus.h>
81 #include <sys/rman.h>
82 #include <machine/resource.h>
83
84 #include <net/ethernet.h>
85 #include <net/if.h>
86 #include <net/if_var.h>
87 #include <net/if_arp.h>
88 #include <net/if_mib.h>
89 #include <net/if_media.h>
90
91 #include <dev/ed/if_edreg.h>
92 #include <dev/ed/if_edvar.h>
93 #include <dev/ed/ax88x90reg.h>
94 #include <dev/ed/dl100xxreg.h>
95 #include <dev/ed/tc5299jreg.h>
96 #include <dev/pccard/pccardvar.h>
97 #include <dev/pccard/pccardreg.h>
98 #include <dev/pccard/pccard_cis.h>
99 #include <dev/mii/mii.h>
100 #include <dev/mii/miivar.h>
101
102 #include "card_if.h"
103 /* "device miibus" required. See GENERIC if you get errors here. */
104 #include "miibus_if.h"
105 #include "pccarddevs.h"
106
107 /*
108 * NE-2000 based PC Cards have a number of ways to get the MAC address.
109 * Some cards encode this as a FUNCE. Others have this in the ROMs the
110 * same way that ISA cards do. Some have it encoded in the attribute
111 * memory somewhere that isn't in the CIS. Some new chipsets have it
112 * in special registers in the ASIC part of the chip.
113 *
114 * For those cards that have the MAC adress stored in attribute memory
115 * outside of a FUNCE entry in the CIS, nearly all of them have it at
116 * a fixed offset (0xff0). We use that offset as a source of last
117 * resource if other offsets have failed. This is the address of the
118 * National Semiconductor DP83903A, which is the only chip's datasheet
119 * I've found.
120 */
121 #define ED_DEFAULT_MAC_OFFSET 0xff0
122
123 static const struct ed_product {
124 struct pccard_product prod;
125 int flags;
126 #define NE2000DVF_DL100XX 0x0001 /* chip is D-Link DL10019/22 */
127 #define NE2000DVF_AX88X90 0x0002 /* chip is ASIX AX88[17]90 */
128 #define NE2000DVF_TC5299J 0x0004 /* chip is Tamarack TC5299J */
129 #define NE2000DVF_TOSHIBA 0x0008 /* Toshiba DP83902A */
130 #define NE2000DVF_ENADDR 0x0100 /* Get MAC from attr mem */
131 #define NE2000DVF_ANYFUNC 0x0200 /* Allow any function type */
132 #define NE2000DVF_MODEM 0x0400 /* Has a modem/serial */
133 int enoff;
134 } ed_pccard_products[] = {
135 { PCMCIA_CARD(ACCTON, EN2212), 0},
136 { PCMCIA_CARD(ACCTON, EN2216), 0},
137 { PCMCIA_CARD(ALLIEDTELESIS, LA_PCM), 0},
138 { PCMCIA_CARD(AMBICOM, AMB8002), 0},
139 { PCMCIA_CARD(AMBICOM, AMB8002T), 0},
140 { PCMCIA_CARD(AMBICOM, AMB8010), 0},
141 { PCMCIA_CARD(AMBICOM, AMB8010_ALT), 0},
142 { PCMCIA_CARD(AMBICOM, AMB8610), 0},
143 { PCMCIA_CARD(BILLIONTON, CFLT10N), 0},
144 { PCMCIA_CARD(BILLIONTON, LNA100B), NE2000DVF_AX88X90},
145 { PCMCIA_CARD(BILLIONTON, LNT10TB), 0},
146 { PCMCIA_CARD(BILLIONTON, LNT10TN), 0},
147 { PCMCIA_CARD(BROMAX, AXNET), NE2000DVF_AX88X90},
148 { PCMCIA_CARD(BROMAX, IPORT), 0},
149 { PCMCIA_CARD(BROMAX, IPORT2), 0},
150 { PCMCIA_CARD(BUFFALO, LPC2_CLT), 0},
151 { PCMCIA_CARD(BUFFALO, LPC3_CLT), 0},
152 { PCMCIA_CARD(BUFFALO, LPC3_CLX), NE2000DVF_AX88X90},
153 { PCMCIA_CARD(BUFFALO, LPC4_TX), NE2000DVF_AX88X90},
154 { PCMCIA_CARD(BUFFALO, LPC4_CLX), NE2000DVF_AX88X90},
155 { PCMCIA_CARD(BUFFALO, LPC_CF_CLT), 0},
156 { PCMCIA_CARD(CNET, NE2000), 0},
157 { PCMCIA_CARD(COMPEX, AX88190), NE2000DVF_AX88X90},
158 { PCMCIA_CARD(COMPEX, LANMODEM), 0},
159 { PCMCIA_CARD(COMPEX, LINKPORT_ENET_B), 0},
160 { PCMCIA_CARD(COREGA, ETHER_II_PCC_T), 0},
161 { PCMCIA_CARD(COREGA, ETHER_II_PCC_TD), 0},
162 { PCMCIA_CARD(COREGA, ETHER_PCC_T), 0},
163 { PCMCIA_CARD(COREGA, ETHER_PCC_TD), 0},
164 { PCMCIA_CARD(COREGA, FAST_ETHER_PCC_TX), NE2000DVF_DL100XX},
165 { PCMCIA_CARD(COREGA, FETHER_PCC_TXD), NE2000DVF_AX88X90},
166 { PCMCIA_CARD(COREGA, FETHER_PCC_TXF), NE2000DVF_DL100XX},
167 { PCMCIA_CARD(COREGA, FETHER_II_PCC_TXD), NE2000DVF_AX88X90},
168 { PCMCIA_CARD(COREGA, LAPCCTXD), 0},
169 { PCMCIA_CARD(DAYNA, COMMUNICARD_E_1), 0},
170 { PCMCIA_CARD(DAYNA, COMMUNICARD_E_2), 0},
171 { PCMCIA_CARD(DLINK, DE650), NE2000DVF_ANYFUNC },
172 { PCMCIA_CARD(DLINK, DE660), 0 },
173 { PCMCIA_CARD(DLINK, DE660PLUS), 0},
174 { PCMCIA_CARD(DYNALINK, L10C), 0},
175 { PCMCIA_CARD(EDIMAX, EP4000A), 0},
176 { PCMCIA_CARD(EPSON, EEN10B), 0},
177 { PCMCIA_CARD(EXP, THINLANCOMBO), 0},
178 { PCMCIA_CARD(GLOBALVILLAGE, LANMODEM), 0},
179 { PCMCIA_CARD(GREY_CELL, TDK3000), 0},
180 { PCMCIA_CARD(GREY_CELL, DMF650TX),
181 NE2000DVF_ANYFUNC | NE2000DVF_DL100XX | NE2000DVF_MODEM},
182 { PCMCIA_CARD(GVC, NIC_2000P), 0},
183 { PCMCIA_CARD(IBM, HOME_AND_AWAY), 0},
184 { PCMCIA_CARD(IBM, INFOMOVER), 0},
185 { PCMCIA_CARD(IODATA3, PCLAT), 0},
186 { PCMCIA_CARD(KINGSTON, CIO10T), 0},
187 { PCMCIA_CARD(KINGSTON, KNE2), 0},
188 { PCMCIA_CARD(LANTECH, FASTNETTX), NE2000DVF_AX88X90},
189 /* Same ID for many different cards, including generic NE2000 */
190 { PCMCIA_CARD(LINKSYS, COMBO_ECARD),
191 NE2000DVF_DL100XX | NE2000DVF_AX88X90},
192 { PCMCIA_CARD(LINKSYS, ECARD_1), 0},
193 { PCMCIA_CARD(LINKSYS, ECARD_2), 0},
194 { PCMCIA_CARD(LINKSYS, ETHERFAST), NE2000DVF_DL100XX},
195 { PCMCIA_CARD(LINKSYS, TRUST_COMBO_ECARD), 0},
196 { PCMCIA_CARD(MACNICA, ME1_JEIDA), 0},
197 { PCMCIA_CARD(MAGICRAM, ETHER), 0},
198 { PCMCIA_CARD(MELCO, LPC3_CLX), NE2000DVF_AX88X90},
199 { PCMCIA_CARD(MELCO, LPC3_TX), NE2000DVF_AX88X90},
200 { PCMCIA_CARD(MELCO2, LPC2_T), 0},
201 { PCMCIA_CARD(MELCO2, LPC2_TX), 0},
202 { PCMCIA_CARD(MITSUBISHI, B8895), NE2000DVF_ANYFUNC}, /* NG */
203 { PCMCIA_CARD(MICRORESEARCH, MR10TPC), 0},
204 { PCMCIA_CARD(NDC, ND5100_E), 0},
205 { PCMCIA_CARD(NETGEAR, FA410TXC), NE2000DVF_DL100XX},
206 /* Same ID as DLINK DFE-670TXD. 670 has DL10022, fa411 has ax88790 */
207 { PCMCIA_CARD(NETGEAR, FA411), NE2000DVF_AX88X90 | NE2000DVF_DL100XX},
208 { PCMCIA_CARD(NEXTCOM, NEXTHAWK), 0},
209 { PCMCIA_CARD(NEWMEDIA, LANSURFER), NE2000DVF_ANYFUNC},
210 { PCMCIA_CARD(NEWMEDIA, LIVEWIRE), 0},
211 { PCMCIA_CARD(OEM2, 100BASE), NE2000DVF_AX88X90},
212 { PCMCIA_CARD(OEM2, ETHERNET), 0},
213 { PCMCIA_CARD(OEM2, FAST_ETHERNET), NE2000DVF_AX88X90},
214 { PCMCIA_CARD(OEM2, NE2000), 0},
215 { PCMCIA_CARD(PLANET, SMARTCOM2000), 0 },
216 { PCMCIA_CARD(PREMAX, PE200), 0},
217 { PCMCIA_CARD(PSION, LANGLOBAL),
218 NE2000DVF_ANYFUNC | NE2000DVF_AX88X90 | NE2000DVF_MODEM},
219 { PCMCIA_CARD(RACORE, ETHERNET), 0},
220 { PCMCIA_CARD(RACORE, FASTENET), NE2000DVF_AX88X90},
221 { PCMCIA_CARD(RACORE, 8041TX), NE2000DVF_AX88X90 | NE2000DVF_TC5299J},
222 { PCMCIA_CARD(RELIA, COMBO), 0},
223 { PCMCIA_CARD(RIOS, PCCARD3), 0},
224 { PCMCIA_CARD(RPTI, EP400), 0},
225 { PCMCIA_CARD(RPTI, EP401), 0},
226 { PCMCIA_CARD(SMC, EZCARD), 0},
227 { PCMCIA_CARD(SOCKET, EA_ETHER), 0},
228 { PCMCIA_CARD(SOCKET, ES_1000), 0},
229 { PCMCIA_CARD(SOCKET, LP_ETHER), 0},
230 { PCMCIA_CARD(SOCKET, LP_ETHER_CF), 0},
231 { PCMCIA_CARD(SOCKET, LP_ETH_10_100_CF), NE2000DVF_DL100XX},
232 { PCMCIA_CARD(SVEC, COMBOCARD), 0},
233 { PCMCIA_CARD(SVEC, LANCARD), 0},
234 { PCMCIA_CARD(TAMARACK, ETHERNET), 0},
235 { PCMCIA_CARD(TDK, CFE_10), 0},
236 { PCMCIA_CARD(TDK, LAK_CD031), 0},
237 { PCMCIA_CARD(TDK, DFL5610WS), 0},
238 { PCMCIA_CARD(TELECOMDEVICE, LM5LT), 0 },
239 { PCMCIA_CARD(TELECOMDEVICE, TCD_HPC100), NE2000DVF_AX88X90},
240 { PCMCIA_CARD(TJ, PTJ_LAN_T), 0 },
241 { PCMCIA_CARD(TOSHIBA2, LANCT00A), NE2000DVF_ANYFUNC | NE2000DVF_TOSHIBA},
242 { PCMCIA_CARD(ZONET, ZEN), 0},
243 { { NULL } }
244 };
245
246 /*
247 * MII bit-bang glue
248 */
249 static uint32_t ed_pccard_dl100xx_mii_bitbang_read(device_t dev);
250 static void ed_pccard_dl100xx_mii_bitbang_write(device_t dev, uint32_t val);
251
252 static const struct mii_bitbang_ops ed_pccard_dl100xx_mii_bitbang_ops = {
253 ed_pccard_dl100xx_mii_bitbang_read,
254 ed_pccard_dl100xx_mii_bitbang_write,
255 {
256 ED_DL100XX_MII_DATAOUT, /* MII_BIT_MDO */
257 ED_DL100XX_MII_DATAIN, /* MII_BIT_MDI */
258 ED_DL100XX_MII_CLK, /* MII_BIT_MDC */
259 ED_DL100XX_MII_DIROUT, /* MII_BIT_DIR_HOST_PHY */
260 0 /* MII_BIT_DIR_PHY_HOST */
261 }
262 };
263
264 static uint32_t ed_pccard_ax88x90_mii_bitbang_read(device_t dev);
265 static void ed_pccard_ax88x90_mii_bitbang_write(device_t dev, uint32_t val);
266
267 static const struct mii_bitbang_ops ed_pccard_ax88x90_mii_bitbang_ops = {
268 ed_pccard_ax88x90_mii_bitbang_read,
269 ed_pccard_ax88x90_mii_bitbang_write,
270 {
271 ED_AX88X90_MII_DATAOUT, /* MII_BIT_MDO */
272 ED_AX88X90_MII_DATAIN, /* MII_BIT_MDI */
273 ED_AX88X90_MII_CLK, /* MII_BIT_MDC */
274 0, /* MII_BIT_DIR_HOST_PHY */
275 ED_AX88X90_MII_DIRIN /* MII_BIT_DIR_PHY_HOST */
276 }
277 };
278
279 static uint32_t ed_pccard_tc5299j_mii_bitbang_read(device_t dev);
280 static void ed_pccard_tc5299j_mii_bitbang_write(device_t dev, uint32_t val);
281
282 static const struct mii_bitbang_ops ed_pccard_tc5299j_mii_bitbang_ops = {
283 ed_pccard_tc5299j_mii_bitbang_read,
284 ed_pccard_tc5299j_mii_bitbang_write,
285 {
286 ED_TC5299J_MII_DATAOUT, /* MII_BIT_MDO */
287 ED_TC5299J_MII_DATAIN, /* MII_BIT_MDI */
288 ED_TC5299J_MII_CLK, /* MII_BIT_MDC */
289 0, /* MII_BIT_DIR_HOST_PHY */
290 ED_AX88X90_MII_DIRIN /* MII_BIT_DIR_PHY_HOST */
291 }
292 };
293
294 /*
295 * PC Card (PCMCIA) specific code.
296 */
297 static int ed_pccard_probe(device_t);
298 static int ed_pccard_attach(device_t);
299 static void ed_pccard_tick(struct ed_softc *);
300
301 static int ed_pccard_dl100xx(device_t dev, const struct ed_product *);
302 static void ed_pccard_dl100xx_mii_reset(struct ed_softc *sc);
303
304 static int ed_pccard_ax88x90(device_t dev, const struct ed_product *);
305
306 static int ed_miibus_readreg(device_t dev, int phy, int reg);
307 static int ed_ifmedia_upd(struct ifnet *);
308 static void ed_ifmedia_sts(struct ifnet *, struct ifmediareq *);
309
310 static int ed_pccard_tc5299j(device_t dev, const struct ed_product *);
311
312 static void
ed_pccard_print_entry(const struct ed_product * pp)313 ed_pccard_print_entry(const struct ed_product *pp)
314 {
315 int i;
316
317 printf("Product entry: ");
318 if (pp->prod.pp_name)
319 printf("name='%s',", pp->prod.pp_name);
320 printf("vendor=%#x,product=%#x", pp->prod.pp_vendor,
321 pp->prod.pp_product);
322 for (i = 0; i < 4; i++)
323 if (pp->prod.pp_cis[i])
324 printf(",CIS%d='%s'", i, pp->prod.pp_cis[i]);
325 printf("\n");
326 }
327
328 static int
ed_pccard_probe(device_t dev)329 ed_pccard_probe(device_t dev)
330 {
331 const struct ed_product *pp, *pp2;
332 int error, first = 1;
333 uint32_t fcn = PCCARD_FUNCTION_UNSPEC;
334
335 /* Make sure we're a network function */
336 error = pccard_get_function(dev, &fcn);
337 if (error != 0)
338 return (error);
339
340 if ((pp = (const struct ed_product *) pccard_product_lookup(dev,
341 (const struct pccard_product *) ed_pccard_products,
342 sizeof(ed_pccard_products[0]), NULL)) != NULL) {
343 if (pp->prod.pp_name != NULL)
344 device_set_desc(dev, pp->prod.pp_name);
345 /*
346 * Some devices don't ID themselves as network, but
347 * that's OK if the flags say so.
348 */
349 if (!(pp->flags & NE2000DVF_ANYFUNC) &&
350 fcn != PCCARD_FUNCTION_NETWORK)
351 return (ENXIO);
352 /*
353 * Some devices match multiple entries. Report that
354 * as a warning to help cull the table
355 */
356 pp2 = pp;
357 while ((pp2 = (const struct ed_product *)pccard_product_lookup(
358 dev, (const struct pccard_product *)(pp2 + 1),
359 sizeof(ed_pccard_products[0]), NULL)) != NULL) {
360 if (first) {
361 device_printf(dev,
362 "Warning: card matches multiple entries. Report to imp@freebsd.org\n");
363 ed_pccard_print_entry(pp);
364 first = 0;
365 }
366 ed_pccard_print_entry(pp2);
367 }
368
369 return (0);
370 }
371 return (ENXIO);
372 }
373
374 static int
ed_pccard_rom_mac(device_t dev,uint8_t * enaddr)375 ed_pccard_rom_mac(device_t dev, uint8_t *enaddr)
376 {
377 struct ed_softc *sc = device_get_softc(dev);
378 uint8_t romdata[32], sum;
379 int i;
380
381 /*
382 * Read in the rom data at location 0. Since there are no
383 * NE-1000 based PC Card devices, we'll assume we're 16-bit.
384 *
385 * In researching what format this takes, I've found that the
386 * following appears to be true for multiple cards based on
387 * observation as well as datasheet digging.
388 *
389 * Data is stored in some ROM and is copied out 8 bits at a time
390 * into 16-bit wide locations. This means that the odd locations
391 * of the ROM are not used (and can be either 0 or ff).
392 *
393 * The contents appears to be as follows:
394 * PROM RAM
395 * Offset Offset What
396 * 0 0 ENETADDR 0
397 * 1 2 ENETADDR 1
398 * 2 4 ENETADDR 2
399 * 3 6 ENETADDR 3
400 * 4 8 ENETADDR 4
401 * 5 10 ENETADDR 5
402 * 6-13 12-26 Reserved (varies by manufacturer)
403 * 14 28 0x57
404 * 15 30 0x57
405 *
406 * Some manufacturers have another image of enetaddr from
407 * PROM offset 0x10 to 0x15 with 0x42 in 0x1e and 0x1f, but
408 * this doesn't appear to be universally documented in the
409 * datasheets. Some manufactuers have a card type, card config
410 * checksums, etc encoded into PROM offset 6-13, but deciphering it
411 * requires more knowledge about the exact underlying chipset than
412 * we possess (and maybe can possess).
413 */
414 ed_pio_readmem(sc, 0, romdata, 32);
415 if (bootverbose)
416 device_printf(dev, "ROM DATA: %32D\n", romdata, " ");
417 if (romdata[28] != 0x57 || romdata[30] != 0x57)
418 return (0);
419 for (i = 0, sum = 0; i < ETHER_ADDR_LEN; i++)
420 sum |= romdata[i * 2];
421 if (sum == 0)
422 return (0);
423 for (i = 0; i < ETHER_ADDR_LEN; i++)
424 enaddr[i] = romdata[i * 2];
425 return (1);
426 }
427
428 static int
ed_pccard_add_modem(device_t dev)429 ed_pccard_add_modem(device_t dev)
430 {
431 device_printf(dev, "Need to write this code\n");
432 return 0;
433 }
434
435 static int
ed_pccard_kick_phy(struct ed_softc * sc)436 ed_pccard_kick_phy(struct ed_softc *sc)
437 {
438 struct mii_softc *miisc;
439 struct mii_data *mii;
440
441 mii = device_get_softc(sc->miibus);
442 LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
443 PHY_RESET(miisc);
444 return (mii_mediachg(mii));
445 }
446
447 static int
ed_pccard_media_ioctl(struct ed_softc * sc,struct ifreq * ifr,u_long command)448 ed_pccard_media_ioctl(struct ed_softc *sc, struct ifreq *ifr, u_long command)
449 {
450 struct mii_data *mii;
451
452 if (sc->miibus == NULL)
453 return (EINVAL);
454 mii = device_get_softc(sc->miibus);
455 return (ifmedia_ioctl(sc->ifp, ifr, &mii->mii_media, command));
456 }
457
458
459 static void
ed_pccard_mediachg(struct ed_softc * sc)460 ed_pccard_mediachg(struct ed_softc *sc)
461 {
462 struct mii_data *mii;
463
464 if (sc->miibus == NULL)
465 return;
466 mii = device_get_softc(sc->miibus);
467 mii_mediachg(mii);
468 }
469
470 static int
ed_pccard_attach(device_t dev)471 ed_pccard_attach(device_t dev)
472 {
473 u_char sum;
474 u_char enaddr[ETHER_ADDR_LEN];
475 const struct ed_product *pp;
476 int error, i, flags, port_rid, modem_rid;
477 struct ed_softc *sc = device_get_softc(dev);
478 u_long size;
479 static uint16_t *intr_vals[] = {NULL, NULL};
480
481 sc->dev = dev;
482 if ((pp = (const struct ed_product *) pccard_product_lookup(dev,
483 (const struct pccard_product *) ed_pccard_products,
484 sizeof(ed_pccard_products[0]), NULL)) == NULL) {
485 printf("Can't find\n");
486 return (ENXIO);
487 }
488 modem_rid = port_rid = -1;
489 if (pp->flags & NE2000DVF_MODEM) {
490 for (i = 0; i < 4; i++) {
491 size = bus_get_resource_count(dev, SYS_RES_IOPORT, i);
492 if (size == ED_NOVELL_IO_PORTS)
493 port_rid = i;
494 else if (size == 8)
495 modem_rid = i;
496 }
497 if (port_rid == -1) {
498 device_printf(dev, "Cannot locate my ports!\n");
499 return (ENXIO);
500 }
501 } else {
502 port_rid = 0;
503 }
504 /* Allocate the port resource during setup. */
505 error = ed_alloc_port(dev, port_rid, ED_NOVELL_IO_PORTS);
506 if (error) {
507 printf("alloc_port failed\n");
508 return (error);
509 }
510 if (rman_get_size(sc->port_res) == ED_NOVELL_IO_PORTS / 2) {
511 port_rid++;
512 sc->port_res2 = bus_alloc_resource(dev, SYS_RES_IOPORT,
513 &port_rid, 0ul, ~0ul, 1, RF_ACTIVE);
514 if (sc->port_res2 == NULL ||
515 rman_get_size(sc->port_res2) != ED_NOVELL_IO_PORTS / 2) {
516 error = ENXIO;
517 goto bad;
518 }
519 }
520 error = ed_alloc_irq(dev, 0, 0);
521 if (error)
522 goto bad;
523
524 /*
525 * Determine which chipset we are. Almost all the PC Card chipsets
526 * have the Novel ASIC and NIC offsets. There's 2 known cards that
527 * follow the WD80x3 conventions, which are handled as a special case.
528 */
529 sc->asic_offset = ED_NOVELL_ASIC_OFFSET;
530 sc->nic_offset = ED_NOVELL_NIC_OFFSET;
531 error = ENXIO;
532 flags = device_get_flags(dev);
533 if (error != 0)
534 error = ed_pccard_dl100xx(dev, pp);
535 if (error != 0)
536 error = ed_pccard_ax88x90(dev, pp);
537 if (error != 0)
538 error = ed_pccard_tc5299j(dev, pp);
539 if (error != 0) {
540 error = ed_probe_Novell_generic(dev, flags);
541 printf("Novell generic probe failed: %d\n", error);
542 }
543 if (error != 0 && (pp->flags & NE2000DVF_TOSHIBA)) {
544 flags |= ED_FLAGS_TOSH_ETHER;
545 flags |= ED_FLAGS_PCCARD;
546 sc->asic_offset = ED_WD_ASIC_OFFSET;
547 sc->nic_offset = ED_WD_NIC_OFFSET;
548 error = ed_probe_WD80x3_generic(dev, flags, intr_vals);
549 }
550 if (error)
551 goto bad;
552
553 /*
554 * There are several ways to get the MAC address for the card.
555 * Some of the above probe routines can fill in the enaddr. If
556 * not, we run through a number of 'well known' locations:
557 * (1) From the PC Card FUNCE
558 * (2) From offset 0 in the shared memory
559 * (3) From a hinted offset in attribute memory
560 * (4) From 0xff0 in attribute memory
561 * If we can't get a non-zero MAC address from this list, we fail.
562 */
563 for (i = 0, sum = 0; i < ETHER_ADDR_LEN; i++)
564 sum |= sc->enaddr[i];
565 if (sum == 0) {
566 pccard_get_ether(dev, enaddr);
567 if (bootverbose)
568 device_printf(dev, "CIS MAC %6D\n", enaddr, ":");
569 for (i = 0, sum = 0; i < ETHER_ADDR_LEN; i++)
570 sum |= enaddr[i];
571 if (sum == 0 && ed_pccard_rom_mac(dev, enaddr)) {
572 if (bootverbose)
573 device_printf(dev, "ROM mac %6D\n", enaddr,
574 ":");
575 sum++;
576 }
577 if (sum == 0 && pp->flags & NE2000DVF_ENADDR) {
578 for (i = 0; i < ETHER_ADDR_LEN; i++) {
579 pccard_attr_read_1(dev, pp->enoff + i * 2,
580 enaddr + i);
581 sum |= enaddr[i];
582 }
583 if (bootverbose)
584 device_printf(dev, "Hint %x MAC %6D\n",
585 pp->enoff, enaddr, ":");
586 }
587 if (sum == 0) {
588 for (i = 0; i < ETHER_ADDR_LEN; i++) {
589 pccard_attr_read_1(dev, ED_DEFAULT_MAC_OFFSET +
590 i * 2, enaddr + i);
591 sum |= enaddr[i];
592 }
593 if (bootverbose)
594 device_printf(dev, "Fallback MAC %6D\n",
595 enaddr, ":");
596 }
597 if (sum == 0) {
598 device_printf(dev, "Cannot extract MAC address.\n");
599 ed_release_resources(dev);
600 return (ENXIO);
601 }
602 bcopy(enaddr, sc->enaddr, ETHER_ADDR_LEN);
603 }
604
605 error = ed_attach(dev);
606 if (error)
607 goto bad;
608 if (sc->chip_type == ED_CHIP_TYPE_DL10019 ||
609 sc->chip_type == ED_CHIP_TYPE_DL10022) {
610 /* Try to attach an MII bus, but ignore errors. */
611 ed_pccard_dl100xx_mii_reset(sc);
612 (void)mii_attach(dev, &sc->miibus, sc->ifp, ed_ifmedia_upd,
613 ed_ifmedia_sts, BMSR_DEFCAPMASK, MII_PHY_ANY,
614 MII_OFFSET_ANY, MIIF_FORCEANEG);
615 } else if (sc->chip_type == ED_CHIP_TYPE_AX88190 ||
616 sc->chip_type == ED_CHIP_TYPE_AX88790 ||
617 sc->chip_type == ED_CHIP_TYPE_TC5299J) {
618 error = mii_attach(dev, &sc->miibus, sc->ifp, ed_ifmedia_upd,
619 ed_ifmedia_sts, BMSR_DEFCAPMASK, MII_PHY_ANY,
620 MII_OFFSET_ANY, MIIF_FORCEANEG);
621 if (error != 0) {
622 device_printf(dev, "attaching PHYs failed\n");
623 goto bad;
624 }
625 }
626 if (sc->miibus != NULL) {
627 sc->sc_tick = ed_pccard_tick;
628 sc->sc_mediachg = ed_pccard_mediachg;
629 sc->sc_media_ioctl = ed_pccard_media_ioctl;
630 ed_pccard_kick_phy(sc);
631 } else {
632 ed_gen_ifmedia_init(sc);
633 }
634 if (modem_rid != -1)
635 ed_pccard_add_modem(dev);
636
637 error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET | INTR_MPSAFE,
638 NULL, edintr, sc, &sc->irq_handle);
639 if (error) {
640 device_printf(dev, "setup intr failed %d \n", error);
641 goto bad;
642 }
643
644 return (0);
645 bad:
646 ed_detach(dev);
647 return (error);
648 }
649
650 /*
651 * Probe the Ethernet MAC addrees for PCMCIA Linksys EtherFast 10/100
652 * and compatible cards (DL10019C Ethernet controller).
653 */
654 static int
ed_pccard_dl100xx(device_t dev,const struct ed_product * pp)655 ed_pccard_dl100xx(device_t dev, const struct ed_product *pp)
656 {
657 struct ed_softc *sc = device_get_softc(dev);
658 u_char sum;
659 uint8_t id;
660 u_int memsize;
661 int i, error;
662
663 if (!(pp->flags & NE2000DVF_DL100XX))
664 return (ENXIO);
665 if (bootverbose)
666 device_printf(dev, "Trying DL100xx\n");
667 error = ed_probe_Novell_generic(dev, device_get_flags(dev));
668 if (bootverbose && error)
669 device_printf(dev, "Novell generic probe failed: %d\n", error);
670 if (error != 0)
671 return (error);
672
673 /*
674 * Linksys registers(offset from ASIC base)
675 *
676 * 0x04-0x09 : Physical Address Register 0-5 (PAR0-PAR5)
677 * 0x0A : Card ID Register (CIR)
678 * 0x0B : Check Sum Register (SR)
679 */
680 for (sum = 0, i = 0x04; i < 0x0c; i++)
681 sum += ed_asic_inb(sc, i);
682 if (sum != 0xff) {
683 if (bootverbose)
684 device_printf(dev, "Bad checksum %#x\n", sum);
685 return (ENXIO); /* invalid DL10019C */
686 }
687 if (bootverbose)
688 device_printf(dev, "CIR is %d\n", ed_asic_inb(sc, 0xa));
689 for (i = 0; i < ETHER_ADDR_LEN; i++)
690 sc->enaddr[i] = ed_asic_inb(sc, 0x04 + i);
691 ed_nic_outb(sc, ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS);
692 id = ed_asic_inb(sc, 0xf);
693 sc->isa16bit = 1;
694 /*
695 * Hard code values based on the datasheet. We're NE-2000 compatible
696 * NIC with 24kb of packet memory starting at 24k offset. These
697 * cards also work with 16k at 16k, but don't work with 24k at 16k
698 * or 32k at 16k.
699 */
700 sc->type = ED_TYPE_NE2000;
701 sc->mem_start = 24 * 1024;
702 memsize = sc->mem_size = 24 * 1024;
703 sc->mem_end = sc->mem_start + memsize;
704 sc->tx_page_start = memsize / ED_PAGE_SIZE;
705 sc->txb_cnt = 3;
706 sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE;
707 sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE;
708
709 sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE;
710
711 ed_nic_outb(sc, ED_P0_PSTART, sc->mem_start / ED_PAGE_SIZE);
712 ed_nic_outb(sc, ED_P0_PSTOP, sc->mem_end / ED_PAGE_SIZE);
713 sc->vendor = ED_VENDOR_NOVELL;
714 sc->chip_type = (id & 0x90) == 0x90 ?
715 ED_CHIP_TYPE_DL10022 : ED_CHIP_TYPE_DL10019;
716 sc->type_str = ((id & 0x90) == 0x90) ? "DL10022" : "DL10019";
717 sc->mii_bitbang_ops = &ed_pccard_dl100xx_mii_bitbang_ops;
718 return (0);
719 }
720
721 /* MII bit-twiddling routines for cards using Dlink chipset */
722
723 static void
ed_pccard_dl100xx_mii_reset(struct ed_softc * sc)724 ed_pccard_dl100xx_mii_reset(struct ed_softc *sc)
725 {
726 if (sc->chip_type != ED_CHIP_TYPE_DL10022)
727 return;
728
729 ed_asic_outb(sc, ED_DL100XX_MIIBUS, ED_DL10022_MII_RESET2);
730 DELAY(10);
731 ed_asic_outb(sc, ED_DL100XX_MIIBUS,
732 ED_DL10022_MII_RESET2 | ED_DL10022_MII_RESET1);
733 DELAY(10);
734 ed_asic_outb(sc, ED_DL100XX_MIIBUS, ED_DL10022_MII_RESET2);
735 DELAY(10);
736 ed_asic_outb(sc, ED_DL100XX_MIIBUS,
737 ED_DL10022_MII_RESET2 | ED_DL10022_MII_RESET1);
738 DELAY(10);
739 ed_asic_outb(sc, ED_DL100XX_MIIBUS, 0);
740 }
741
742 static void
ed_pccard_dl100xx_mii_bitbang_write(device_t dev,uint32_t val)743 ed_pccard_dl100xx_mii_bitbang_write(device_t dev, uint32_t val)
744 {
745 struct ed_softc *sc;
746
747 sc = device_get_softc(dev);
748
749 ed_asic_outb(sc, ED_DL100XX_MIIBUS, val);
750 ed_asic_barrier(sc, ED_DL100XX_MIIBUS, 1,
751 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
752 }
753
754 static uint32_t
ed_pccard_dl100xx_mii_bitbang_read(device_t dev)755 ed_pccard_dl100xx_mii_bitbang_read(device_t dev)
756 {
757 struct ed_softc *sc;
758 uint32_t val;
759
760 sc = device_get_softc(dev);
761
762 val = ed_asic_inb(sc, ED_DL100XX_MIIBUS);
763 ed_asic_barrier(sc, ED_DL100XX_MIIBUS, 1,
764 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
765 return (val);
766 }
767
768 static void
ed_pccard_ax88x90_reset(struct ed_softc * sc)769 ed_pccard_ax88x90_reset(struct ed_softc *sc)
770 {
771 int i;
772
773 /* Reset Card */
774 ed_nic_barrier(sc, ED_P0_CR, 1,
775 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
776 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STP | ED_CR_PAGE_0);
777 ed_nic_barrier(sc, ED_P0_CR, 1,
778 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
779 ed_asic_outb(sc, ED_NOVELL_RESET, ed_asic_inb(sc, ED_NOVELL_RESET));
780
781 /* Wait for the RST bit to assert, but cap it at 10ms */
782 for (i = 10000; !(ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RST) && i > 0;
783 i--)
784 continue;
785 ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RST); /* ACK INTR */
786 if (i == 0)
787 device_printf(sc->dev, "Reset didn't finish\n");
788 }
789
790 /*
791 * Probe and vendor-specific initialization routine for ax88x90 boards
792 */
793 static int
ed_probe_ax88x90_generic(device_t dev,int flags)794 ed_probe_ax88x90_generic(device_t dev, int flags)
795 {
796 struct ed_softc *sc = device_get_softc(dev);
797 u_int memsize;
798 static char test_pattern[32] = "THIS is A memory TEST pattern";
799 char test_buffer[32];
800
801 ed_pccard_ax88x90_reset(sc);
802 DELAY(10*1000);
803
804 /* Make sure that we really have an 8390 based board */
805 if (!ed_probe_generic8390(sc))
806 return (ENXIO);
807
808 sc->vendor = ED_VENDOR_NOVELL;
809 sc->mem_shared = 0;
810 sc->cr_proto = ED_CR_RD2;
811
812 /*
813 * This prevents packets from being stored in the NIC memory when the
814 * readmem routine turns on the start bit in the CR. We write some
815 * bytes in word mode and verify we can read them back. If we can't
816 * then we don't have an AX88x90 chip here.
817 */
818 sc->isa16bit = 1;
819 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_MON);
820 ed_nic_outb(sc, ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS);
821 ed_pio_writemem(sc, test_pattern, 16384, sizeof(test_pattern));
822 ed_pio_readmem(sc, 16384, test_buffer, sizeof(test_pattern));
823 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern)) != 0)
824 return (ENXIO);
825
826 /*
827 * Hard code values based on the datasheet. We're NE-2000 compatible
828 * NIC with 16kb of packet memory starting at 16k offset.
829 */
830 sc->type = ED_TYPE_NE2000;
831 memsize = sc->mem_size = 16*1024;
832 sc->mem_start = 16 * 1024;
833 if (ed_asic_inb(sc, ED_AX88X90_TEST) != 0)
834 sc->chip_type = ED_CHIP_TYPE_AX88790;
835 else {
836 sc->chip_type = ED_CHIP_TYPE_AX88190;
837 /*
838 * The AX88190 (not A) has external 64k SRAM. Probe for this
839 * here. Most of the cards I have either use the AX88190A
840 * part, or have only 32k SRAM for some reason, so I don't
841 * know if this works or not.
842 */
843 ed_pio_writemem(sc, test_pattern, 32768, sizeof(test_pattern));
844 ed_pio_readmem(sc, 32768, test_buffer, sizeof(test_pattern));
845 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern)) == 0) {
846 sc->mem_start = 2*1024;
847 memsize = sc->mem_size = 62 * 1024;
848 }
849 }
850 sc->mem_end = sc->mem_start + memsize;
851 sc->tx_page_start = memsize / ED_PAGE_SIZE;
852 if (sc->mem_size > 16 * 1024)
853 sc->txb_cnt = 3;
854 else
855 sc->txb_cnt = 2;
856 sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE;
857 sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE;
858
859 sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE;
860
861 ed_nic_outb(sc, ED_P0_PSTART, sc->mem_start / ED_PAGE_SIZE);
862 ed_nic_outb(sc, ED_P0_PSTOP, sc->mem_end / ED_PAGE_SIZE);
863
864 /* Get the mac before we go -- It's just at 0x400 in "SRAM" */
865 ed_pio_readmem(sc, 0x400, sc->enaddr, ETHER_ADDR_LEN);
866
867 /* clear any pending interrupts that might have occurred above */
868 ed_nic_outb(sc, ED_P0_ISR, 0xff);
869 sc->sc_write_mbufs = ed_pio_write_mbufs;
870 return (0);
871 }
872
873 static int
ed_pccard_ax88x90_check_mii(device_t dev,struct ed_softc * sc)874 ed_pccard_ax88x90_check_mii(device_t dev, struct ed_softc *sc)
875 {
876 int i, id;
877
878 /*
879 * All AX88x90 devices have MII and a PHY, so we use this to weed out
880 * chips that would otherwise make it through the tests we have after
881 * this point.
882 */
883 for (i = 0; i < 32; i++) {
884 id = ed_miibus_readreg(dev, i, MII_BMSR);
885 if (id != 0 && id != 0xffff)
886 break;
887 }
888 /*
889 * Found one, we're good.
890 */
891 if (i != 32)
892 return (0);
893 /*
894 * Didn't find anything, so try to power up and try again. The PHY
895 * may be not responding because we're in power down mode.
896 */
897 if (sc->chip_type == ED_CHIP_TYPE_AX88190)
898 return (ENXIO);
899 pccard_ccr_write_1(dev, PCCARD_CCR_STATUS, PCCARD_CCR_STATUS_PWRDWN);
900 for (i = 0; i < 32; i++) {
901 id = ed_miibus_readreg(dev, i, MII_BMSR);
902 if (id != 0 && id != 0xffff)
903 break;
904 }
905 /*
906 * Still no joy? We're AFU, punt.
907 */
908 if (i == 32)
909 return (ENXIO);
910 return (0);
911 }
912
913 /*
914 * Special setup for AX88[17]90
915 */
916 static int
ed_pccard_ax88x90(device_t dev,const struct ed_product * pp)917 ed_pccard_ax88x90(device_t dev, const struct ed_product *pp)
918 {
919 int error;
920 int iobase;
921 struct ed_softc *sc = device_get_softc(dev);
922
923 if (!(pp->flags & NE2000DVF_AX88X90))
924 return (ENXIO);
925
926 if (bootverbose)
927 device_printf(dev, "Checking AX88x90\n");
928
929 /*
930 * Set the IOBASE Register. The AX88x90 cards are potentially
931 * multifunction cards, and thus requires a slight workaround.
932 * We write the address the card is at, on the off chance that this
933 * card is not MFC.
934 * XXX I'm not sure that this is still needed...
935 */
936 iobase = rman_get_start(sc->port_res);
937 pccard_ccr_write_1(dev, PCCARD_CCR_IOBASE0, iobase & 0xff);
938 pccard_ccr_write_1(dev, PCCARD_CCR_IOBASE1, (iobase >> 8) & 0xff);
939
940 error = ed_probe_ax88x90_generic(dev, device_get_flags(dev));
941 if (error) {
942 if (bootverbose)
943 device_printf(dev, "probe ax88x90 failed %d\n",
944 error);
945 return (error);
946 }
947 sc->mii_bitbang_ops = &ed_pccard_ax88x90_mii_bitbang_ops;
948 error = ed_pccard_ax88x90_check_mii(dev, sc);
949 if (error)
950 return (error);
951 sc->vendor = ED_VENDOR_NOVELL;
952 sc->type = ED_TYPE_NE2000;
953 if (sc->chip_type == ED_CHIP_TYPE_AX88190)
954 sc->type_str = "AX88190";
955 else
956 sc->type_str = "AX88790";
957 return (0);
958 }
959
960 static void
ed_pccard_ax88x90_mii_bitbang_write(device_t dev,uint32_t val)961 ed_pccard_ax88x90_mii_bitbang_write(device_t dev, uint32_t val)
962 {
963 struct ed_softc *sc;
964
965 sc = device_get_softc(dev);
966
967 ed_asic_outb(sc, ED_AX88X90_MIIBUS, val);
968 ed_asic_barrier(sc, ED_AX88X90_MIIBUS, 1,
969 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
970 }
971
972 static uint32_t
ed_pccard_ax88x90_mii_bitbang_read(device_t dev)973 ed_pccard_ax88x90_mii_bitbang_read(device_t dev)
974 {
975 struct ed_softc *sc;
976 uint32_t val;
977
978 sc = device_get_softc(dev);
979
980 val = ed_asic_inb(sc, ED_AX88X90_MIIBUS);
981 ed_asic_barrier(sc, ED_AX88X90_MIIBUS, 1,
982 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
983 return (val);
984 }
985
986 /*
987 * Special setup for TC5299J
988 */
989 static int
ed_pccard_tc5299j(device_t dev,const struct ed_product * pp)990 ed_pccard_tc5299j(device_t dev, const struct ed_product *pp)
991 {
992 int error, i, id;
993 char *ts;
994 struct ed_softc *sc = device_get_softc(dev);
995
996 if (!(pp->flags & NE2000DVF_TC5299J))
997 return (ENXIO);
998
999 if (bootverbose)
1000 device_printf(dev, "Checking Tc5299j\n");
1001
1002 error = ed_probe_Novell_generic(dev, device_get_flags(dev));
1003 if (bootverbose)
1004 device_printf(dev, "Novell generic probe failed: %d\n", error);
1005 if (error != 0)
1006 return (error);
1007
1008 /*
1009 * Check to see if we have a MII PHY ID at any address. All TC5299J
1010 * devices have MII and a PHY, so we use this to weed out chips that
1011 * would otherwise make it through the tests we have after this point.
1012 */
1013 sc->mii_bitbang_ops = &ed_pccard_tc5299j_mii_bitbang_ops;
1014 for (i = 0; i < 32; i++) {
1015 id = ed_miibus_readreg(dev, i, MII_PHYIDR1);
1016 if (id != 0 && id != 0xffff)
1017 break;
1018 }
1019 if (i == 32)
1020 return (ENXIO);
1021 ts = "TC5299J";
1022 if (ed_pccard_rom_mac(dev, sc->enaddr) == 0)
1023 return (ENXIO);
1024 sc->vendor = ED_VENDOR_NOVELL;
1025 sc->type = ED_TYPE_NE2000;
1026 sc->chip_type = ED_CHIP_TYPE_TC5299J;
1027 sc->type_str = ts;
1028 return (0);
1029 }
1030
1031 static void
ed_pccard_tc5299j_mii_bitbang_write(device_t dev,uint32_t val)1032 ed_pccard_tc5299j_mii_bitbang_write(device_t dev, uint32_t val)
1033 {
1034 struct ed_softc *sc;
1035
1036 sc = device_get_softc(dev);
1037
1038 /* We are already on page 3. */
1039 ed_nic_outb(sc, ED_TC5299J_MIIBUS, val);
1040 ed_nic_barrier(sc, ED_TC5299J_MIIBUS, 1,
1041 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1042 }
1043
1044 static uint32_t
ed_pccard_tc5299j_mii_bitbang_read(device_t dev)1045 ed_pccard_tc5299j_mii_bitbang_read(device_t dev)
1046 {
1047 struct ed_softc *sc;
1048 uint32_t val;
1049
1050 sc = device_get_softc(dev);
1051
1052 /* We are already on page 3. */
1053 val = ed_asic_inb(sc, ED_TC5299J_MIIBUS);
1054 ed_nic_barrier(sc, ED_TC5299J_MIIBUS, 1,
1055 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1056 return (val);
1057 }
1058
1059 /*
1060 * MII bus support routines.
1061 */
1062 static int
ed_miibus_readreg(device_t dev,int phy,int reg)1063 ed_miibus_readreg(device_t dev, int phy, int reg)
1064 {
1065 struct ed_softc *sc;
1066 int val;
1067 uint8_t cr = 0;
1068
1069 sc = device_get_softc(dev);
1070 /*
1071 * The AX88790 has an interesting quirk. It has an internal phy that
1072 * needs a special bit set to access, but can also have additional
1073 * external PHYs set for things like HomeNET media. When accessing
1074 * the internal PHY, a bit has to be set, when accessing the external
1075 * PHYs, it must be clear. See Errata 1, page 51, in the AX88790
1076 * datasheet for more details.
1077 *
1078 * Also, PHYs above 16 appear to be phantoms on some cards, but not
1079 * others. Registers read for this are often the same as prior values
1080 * read. Filter all register requests to 17-31.
1081 */
1082 if (sc->chip_type == ED_CHIP_TYPE_AX88790) {
1083 if (phy > 0x10)
1084 return (0);
1085 if (phy == 0x10)
1086 ed_asic_outb(sc, ED_AX88X90_GPIO,
1087 ED_AX88X90_GPIO_INT_PHY);
1088 else
1089 ed_asic_outb(sc, ED_AX88X90_GPIO, 0);
1090 ed_asic_barrier(sc, ED_AX88X90_GPIO, 1,
1091 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1092 } else if (sc->chip_type == ED_CHIP_TYPE_TC5299J) {
1093 /* Select page 3. */
1094 ed_nic_barrier(sc, ED_P0_CR, 1,
1095 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1096 cr = ed_nic_inb(sc, ED_P0_CR);
1097 ed_nic_outb(sc, ED_P0_CR, cr | ED_CR_PAGE_3);
1098 ed_nic_barrier(sc, ED_P0_CR, 1,
1099 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1100 }
1101 val = mii_bitbang_readreg(dev, sc->mii_bitbang_ops, phy, reg);
1102 if (sc->chip_type == ED_CHIP_TYPE_TC5299J) {
1103 /* Restore prior page. */
1104 ed_nic_outb(sc, ED_P0_CR, cr);
1105 ed_nic_barrier(sc, ED_P0_CR, 1,
1106 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1107 }
1108 return (val);
1109 }
1110
1111 static int
ed_miibus_writereg(device_t dev,int phy,int reg,int data)1112 ed_miibus_writereg(device_t dev, int phy, int reg, int data)
1113 {
1114 struct ed_softc *sc;
1115 uint8_t cr = 0;
1116
1117 sc = device_get_softc(dev);
1118 /* See ed_miibus_readreg for details */
1119 if (sc->chip_type == ED_CHIP_TYPE_AX88790) {
1120 if (phy > 0x10)
1121 return (0);
1122 if (phy == 0x10)
1123 ed_asic_outb(sc, ED_AX88X90_GPIO,
1124 ED_AX88X90_GPIO_INT_PHY);
1125 else
1126 ed_asic_outb(sc, ED_AX88X90_GPIO, 0);
1127 ed_asic_barrier(sc, ED_AX88X90_GPIO, 1,
1128 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1129 } else if (sc->chip_type == ED_CHIP_TYPE_TC5299J) {
1130 /* Select page 3. */
1131 ed_nic_barrier(sc, ED_P0_CR, 1,
1132 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1133 cr = ed_nic_inb(sc, ED_P0_CR);
1134 ed_nic_outb(sc, ED_P0_CR, cr | ED_CR_PAGE_3);
1135 ed_nic_barrier(sc, ED_P0_CR, 1,
1136 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1137 }
1138 mii_bitbang_writereg(dev, sc->mii_bitbang_ops, phy, reg, data);
1139 if (sc->chip_type == ED_CHIP_TYPE_TC5299J) {
1140 /* Restore prior page. */
1141 ed_nic_outb(sc, ED_P0_CR, cr);
1142 ed_nic_barrier(sc, ED_P0_CR, 1,
1143 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1144 }
1145 return (0);
1146 }
1147
1148 static int
ed_ifmedia_upd(struct ifnet * ifp)1149 ed_ifmedia_upd(struct ifnet *ifp)
1150 {
1151 struct ed_softc *sc;
1152 int error;
1153
1154 sc = ifp->if_softc;
1155 ED_LOCK(sc);
1156 if (sc->miibus == NULL) {
1157 ED_UNLOCK(sc);
1158 return (ENXIO);
1159 }
1160
1161 error = ed_pccard_kick_phy(sc);
1162 ED_UNLOCK(sc);
1163 return (error);
1164 }
1165
1166 static void
ed_ifmedia_sts(struct ifnet * ifp,struct ifmediareq * ifmr)1167 ed_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1168 {
1169 struct ed_softc *sc;
1170 struct mii_data *mii;
1171
1172 sc = ifp->if_softc;
1173 ED_LOCK(sc);
1174 if (sc->miibus == NULL) {
1175 ED_UNLOCK(sc);
1176 return;
1177 }
1178
1179 mii = device_get_softc(sc->miibus);
1180 mii_pollstat(mii);
1181 ifmr->ifm_active = mii->mii_media_active;
1182 ifmr->ifm_status = mii->mii_media_status;
1183 ED_UNLOCK(sc);
1184 }
1185
1186 static void
ed_child_detached(device_t dev,device_t child)1187 ed_child_detached(device_t dev, device_t child)
1188 {
1189 struct ed_softc *sc;
1190
1191 sc = device_get_softc(dev);
1192 if (child == sc->miibus)
1193 sc->miibus = NULL;
1194 }
1195
1196 static void
ed_pccard_tick(struct ed_softc * sc)1197 ed_pccard_tick(struct ed_softc *sc)
1198 {
1199 struct mii_data *mii;
1200 int media = 0;
1201
1202 ED_ASSERT_LOCKED(sc);
1203 if (sc->miibus != NULL) {
1204 mii = device_get_softc(sc->miibus);
1205 media = mii->mii_media_status;
1206 mii_tick(mii);
1207 if (mii->mii_media_status & IFM_ACTIVE &&
1208 media != mii->mii_media_status) {
1209 if (sc->chip_type == ED_CHIP_TYPE_DL10022) {
1210 ed_asic_outb(sc, ED_DL10022_DIAG,
1211 (mii->mii_media_active & IFM_FDX) ?
1212 ED_DL10022_COLLISON_DIS : 0);
1213 #ifdef notyet
1214 } else if (sc->chip_type == ED_CHIP_TYPE_DL10019) {
1215 write_asic(sc, ED_DL10019_MAGIC,
1216 (mii->mii_media_active & IFM_FDX) ?
1217 DL19FDUPLX : 0);
1218 #endif
1219 }
1220 }
1221
1222 }
1223 }
1224
1225 static device_method_t ed_pccard_methods[] = {
1226 /* Device interface */
1227 DEVMETHOD(device_probe, ed_pccard_probe),
1228 DEVMETHOD(device_attach, ed_pccard_attach),
1229 DEVMETHOD(device_detach, ed_detach),
1230
1231 /* Bus interface */
1232 DEVMETHOD(bus_child_detached, ed_child_detached),
1233
1234 /* MII interface */
1235 DEVMETHOD(miibus_readreg, ed_miibus_readreg),
1236 DEVMETHOD(miibus_writereg, ed_miibus_writereg),
1237
1238 DEVMETHOD_END
1239 };
1240
1241 static driver_t ed_pccard_driver = {
1242 "ed",
1243 ed_pccard_methods,
1244 sizeof(struct ed_softc)
1245 };
1246
1247 DRIVER_MODULE(ed, pccard, ed_pccard_driver, ed_devclass, 0, NULL);
1248 DRIVER_MODULE(miibus, ed, miibus_driver, miibus_devclass, 0, NULL);
1249 MODULE_DEPEND(ed, miibus, 1, 1, 1);
1250 MODULE_DEPEND(ed, ether, 1, 1, 1);
1251 PCCARD_PNP_INFO(ed_pccard_products);
1252