1 /*-
2 * Copyright (c) 1999,2000 Michael Smith
3 * Copyright (c) 2000 BSDi
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27 /*-
28 * Copyright (c) 2002 Eric Moore
29 * Copyright (c) 2002, 2004 LSI Logic Corporation
30 * All rights reserved.
31 *
32 * Redistribution and use in source and binary forms, with or without
33 * modification, are permitted provided that the following conditions
34 * are met:
35 * 1. Redistributions of source code must retain the above copyright
36 * notice, this list of conditions and the following disclaimer.
37 * 2. Redistributions in binary form must reproduce the above copyright
38 * notice, this list of conditions and the following disclaimer in the
39 * documentation and/or other materials provided with the distribution.
40 * 3. The party using or redistributing the source code and binary forms
41 * agrees to the disclaimer below and the terms and conditions set forth
42 * herein.
43 *
44 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
45 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
46 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
47 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
48 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
49 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
50 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
51 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
52 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
53 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
54 * SUCH DAMAGE.
55 */
56
57 #include <sys/cdefs.h>
58 __FBSDID("$FreeBSD: stable/9/sys/dev/amr/amr_pci.c 281827 2015-04-21 11:29:07Z mav $");
59
60 #include <sys/param.h>
61 #include <sys/systm.h>
62 #include <sys/kernel.h>
63 #include <sys/module.h>
64 #include <sys/sysctl.h>
65
66 #include <sys/bio.h>
67 #include <sys/bus.h>
68 #include <sys/conf.h>
69
70 #include <machine/bus.h>
71 #include <machine/resource.h>
72 #include <sys/rman.h>
73
74 #include <dev/pci/pcireg.h>
75 #include <dev/pci/pcivar.h>
76
77 #include <dev/amr/amrio.h>
78 #include <dev/amr/amrreg.h>
79 #include <dev/amr/amrvar.h>
80
81 static int amr_pci_probe(device_t dev);
82 static int amr_pci_attach(device_t dev);
83 static int amr_pci_detach(device_t dev);
84 static int amr_pci_shutdown(device_t dev);
85 static int amr_pci_suspend(device_t dev);
86 static int amr_pci_resume(device_t dev);
87 static void amr_pci_intr(void *arg);
88 static void amr_pci_free(struct amr_softc *sc);
89 static void amr_sglist_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error);
90 static int amr_sglist_map(struct amr_softc *sc);
91 static int amr_setup_mbox(struct amr_softc *sc);
92 static int amr_ccb_map(struct amr_softc *sc);
93
94 static u_int amr_force_sg32 = 0;
95 TUNABLE_INT("hw.amr.force_sg32", &amr_force_sg32);
96 SYSCTL_DECL(_hw_amr);
97 SYSCTL_UINT(_hw_amr, OID_AUTO, force_sg32, CTLFLAG_RDTUN, &amr_force_sg32, 0,
98 "Force the AMR driver to use 32bit scatter gather");
99
100 static device_method_t amr_methods[] = {
101 /* Device interface */
102 DEVMETHOD(device_probe, amr_pci_probe),
103 DEVMETHOD(device_attach, amr_pci_attach),
104 DEVMETHOD(device_detach, amr_pci_detach),
105 DEVMETHOD(device_shutdown, amr_pci_shutdown),
106 DEVMETHOD(device_suspend, amr_pci_suspend),
107 DEVMETHOD(device_resume, amr_pci_resume),
108
109 DEVMETHOD_END
110 };
111
112 static driver_t amr_pci_driver = {
113 "amr",
114 amr_methods,
115 sizeof(struct amr_softc)
116 };
117
118 static devclass_t amr_devclass;
119 DRIVER_MODULE(amr, pci, amr_pci_driver, amr_devclass, 0, 0);
120 MODULE_DEPEND(amr, pci, 1, 1, 1);
121 MODULE_DEPEND(amr, cam, 1, 1, 1);
122
123 static struct amr_ident
124 {
125 int vendor;
126 int device;
127 int flags;
128 #define AMR_ID_PROBE_SIG (1<<0) /* generic i960RD, check signature */
129 #define AMR_ID_DO_SG64 (1<<1)
130 #define AMR_ID_QUARTZ (1<<2)
131 } amr_device_ids[] = {
132 {0x101e, 0x9010, 0},
133 {0x101e, 0x9060, 0},
134 {0x8086, 0x1960, AMR_ID_QUARTZ | AMR_ID_PROBE_SIG},
135 {0x101e, 0x1960, AMR_ID_QUARTZ},
136 {0x1000, 0x1960, AMR_ID_QUARTZ | AMR_ID_DO_SG64 | AMR_ID_PROBE_SIG},
137 {0x1000, 0x0407, AMR_ID_QUARTZ | AMR_ID_DO_SG64},
138 {0x1000, 0x0408, AMR_ID_QUARTZ | AMR_ID_DO_SG64},
139 {0x1000, 0x0409, AMR_ID_QUARTZ | AMR_ID_DO_SG64},
140 {0x1028, 0x000e, AMR_ID_QUARTZ | AMR_ID_DO_SG64 | AMR_ID_PROBE_SIG}, /* perc4/di i960 */
141 {0x1028, 0x000f, AMR_ID_QUARTZ | AMR_ID_DO_SG64}, /* perc4/di Verde*/
142 {0x1028, 0x0013, AMR_ID_QUARTZ | AMR_ID_DO_SG64}, /* perc4/di */
143 {0, 0, 0}
144 };
145
146 static struct amr_ident *
amr_find_ident(device_t dev)147 amr_find_ident(device_t dev)
148 {
149 struct amr_ident *id;
150 int sig;
151
152 for (id = amr_device_ids; id->vendor != 0; id++) {
153 if ((pci_get_vendor(dev) == id->vendor) &&
154 (pci_get_device(dev) == id->device)) {
155
156 /* do we need to test for a signature? */
157 if (id->flags & AMR_ID_PROBE_SIG) {
158 sig = pci_read_config(dev, AMR_CFG_SIG, 2);
159 if ((sig != AMR_SIGNATURE_1) && (sig != AMR_SIGNATURE_2))
160 continue;
161 }
162 return (id);
163 }
164 }
165 return (NULL);
166 }
167
168 static int
amr_pci_probe(device_t dev)169 amr_pci_probe(device_t dev)
170 {
171
172 debug_called(1);
173
174 if (amr_find_ident(dev) != NULL) {
175 device_set_desc(dev, LSI_DESC_PCI);
176 return(BUS_PROBE_DEFAULT);
177 }
178 return(ENXIO);
179 }
180
181 static int
amr_pci_attach(device_t dev)182 amr_pci_attach(device_t dev)
183 {
184 struct amr_softc *sc;
185 struct amr_ident *id;
186 int rid, rtype, error;
187
188 debug_called(1);
189
190 /*
191 * Initialise softc.
192 */
193 sc = device_get_softc(dev);
194 bzero(sc, sizeof(*sc));
195 sc->amr_dev = dev;
196
197 /* assume failure is 'not configured' */
198 error = ENXIO;
199
200 /*
201 * Determine board type.
202 */
203 if ((id = amr_find_ident(dev)) == NULL)
204 return (ENXIO);
205
206 if (id->flags & AMR_ID_QUARTZ) {
207 sc->amr_type |= AMR_TYPE_QUARTZ;
208 }
209
210 if ((amr_force_sg32 == 0) && (id->flags & AMR_ID_DO_SG64) &&
211 (sizeof(vm_paddr_t) > 4)) {
212 device_printf(dev, "Using 64-bit DMA\n");
213 sc->amr_type |= AMR_TYPE_SG64;
214 }
215
216 /* force the busmaster enable bit on */
217 pci_enable_busmaster(dev);
218
219 /*
220 * Allocate the PCI register window.
221 */
222 rid = PCIR_BAR(0);
223 rtype = AMR_IS_QUARTZ(sc) ? SYS_RES_MEMORY : SYS_RES_IOPORT;
224 sc->amr_reg = bus_alloc_resource_any(dev, rtype, &rid, RF_ACTIVE);
225 if (sc->amr_reg == NULL) {
226 device_printf(sc->amr_dev, "can't allocate register window\n");
227 goto out;
228 }
229 sc->amr_btag = rman_get_bustag(sc->amr_reg);
230 sc->amr_bhandle = rman_get_bushandle(sc->amr_reg);
231
232 /*
233 * Allocate and connect our interrupt.
234 */
235 rid = 0;
236 sc->amr_irq = bus_alloc_resource_any(sc->amr_dev, SYS_RES_IRQ, &rid,
237 RF_SHAREABLE | RF_ACTIVE);
238 if (sc->amr_irq == NULL) {
239 device_printf(sc->amr_dev, "can't allocate interrupt\n");
240 goto out;
241 }
242 if (bus_setup_intr(sc->amr_dev, sc->amr_irq,
243 INTR_TYPE_BIO | INTR_ENTROPY | INTR_MPSAFE, NULL, amr_pci_intr,
244 sc, &sc->amr_intr)) {
245 device_printf(sc->amr_dev, "can't set up interrupt\n");
246 goto out;
247 }
248
249 debug(2, "interrupt attached");
250
251 /* assume failure is 'out of memory' */
252 error = ENOMEM;
253
254 /*
255 * Allocate the parent bus DMA tag appropriate for PCI.
256 */
257 if (bus_dma_tag_create(bus_get_dma_tag(dev), /* PCI parent */
258 1, 0, /* alignment,boundary */
259 AMR_IS_SG64(sc) ?
260 BUS_SPACE_MAXADDR :
261 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
262 BUS_SPACE_MAXADDR, /* highaddr */
263 NULL, NULL, /* filter, filterarg */
264 BUS_SPACE_MAXSIZE, /* maxsize */
265 BUS_SPACE_UNRESTRICTED, /* nsegments */
266 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
267 0, /* flags */
268 NULL, NULL, /* lockfunc, lockarg */
269 &sc->amr_parent_dmat)) {
270 device_printf(dev, "can't allocate parent DMA tag\n");
271 goto out;
272 }
273
274 /*
275 * Create DMA tag for mapping buffers into controller-addressable space.
276 */
277 if (bus_dma_tag_create(sc->amr_parent_dmat, /* parent */
278 1, 0, /* alignment,boundary */
279 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
280 BUS_SPACE_MAXADDR, /* highaddr */
281 NULL, NULL, /* filter, filterarg */
282 DFLTPHYS, /* maxsize */
283 AMR_NSEG, /* nsegments */
284 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
285 0, /* flags */
286 busdma_lock_mutex, /* lockfunc */
287 &sc->amr_list_lock, /* lockarg */
288 &sc->amr_buffer_dmat)) {
289 device_printf(sc->amr_dev, "can't allocate buffer DMA tag\n");
290 goto out;
291 }
292
293 if (bus_dma_tag_create(sc->amr_parent_dmat, /* parent */
294 1, 0, /* alignment,boundary */
295 BUS_SPACE_MAXADDR, /* lowaddr */
296 BUS_SPACE_MAXADDR, /* highaddr */
297 NULL, NULL, /* filter, filterarg */
298 DFLTPHYS, /* maxsize */
299 AMR_NSEG, /* nsegments */
300 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
301 0, /* flags */
302 busdma_lock_mutex, /* lockfunc */
303 &sc->amr_list_lock, /* lockarg */
304 &sc->amr_buffer64_dmat)) {
305 device_printf(sc->amr_dev, "can't allocate buffer DMA tag\n");
306 goto out;
307 }
308
309 debug(2, "dma tag done");
310
311 /*
312 * Allocate and set up mailbox in a bus-visible fashion.
313 */
314 mtx_init(&sc->amr_list_lock, "AMR List Lock", NULL, MTX_DEF);
315 mtx_init(&sc->amr_hw_lock, "AMR HW Lock", NULL, MTX_DEF);
316 if ((error = amr_setup_mbox(sc)) != 0)
317 goto out;
318
319 debug(2, "mailbox setup");
320
321 /*
322 * Build the scatter/gather buffers.
323 */
324 if (amr_sglist_map(sc))
325 goto out;
326 debug(2, "s/g list mapped");
327
328 if (amr_ccb_map(sc))
329 goto out;
330 debug(2, "ccb mapped");
331
332
333 /*
334 * Do bus-independant initialisation, bring controller online.
335 */
336 error = amr_attach(sc);
337
338 out:
339 if (error)
340 amr_pci_free(sc);
341 return(error);
342 }
343
344 /********************************************************************************
345 * Disconnect from the controller completely, in preparation for unload.
346 */
347 static int
amr_pci_detach(device_t dev)348 amr_pci_detach(device_t dev)
349 {
350 struct amr_softc *sc = device_get_softc(dev);
351 int error;
352
353 debug_called(1);
354
355 if (sc->amr_state & AMR_STATE_OPEN)
356 return(EBUSY);
357
358 if ((error = amr_pci_shutdown(dev)))
359 return(error);
360
361 amr_pci_free(sc);
362
363 return(0);
364 }
365
366 /********************************************************************************
367 * Bring the controller down to a dormant state and detach all child devices.
368 *
369 * This function is called before detach, system shutdown, or before performing
370 * an operation which may add or delete system disks. (Call amr_startup to
371 * resume normal operation.)
372 *
373 * Note that we can assume that the bioq on the controller is empty, as we won't
374 * allow shutdown if any device is open.
375 */
376 static int
amr_pci_shutdown(device_t dev)377 amr_pci_shutdown(device_t dev)
378 {
379 struct amr_softc *sc = device_get_softc(dev);
380 int i,error;
381
382 debug_called(1);
383
384 /* mark ourselves as in-shutdown */
385 sc->amr_state |= AMR_STATE_SHUTDOWN;
386
387
388 /* flush controller */
389 device_printf(sc->amr_dev, "flushing cache...");
390 printf("%s\n", amr_flush(sc) ? "failed" : "done");
391
392 error = 0;
393
394 /* delete all our child devices */
395 for(i = 0 ; i < AMR_MAXLD; i++) {
396 if( sc->amr_drive[i].al_disk != 0) {
397 if((error = device_delete_child(sc->amr_dev,sc->amr_drive[i].al_disk)) != 0)
398 goto shutdown_out;
399 sc->amr_drive[i].al_disk = 0;
400 }
401 }
402
403 /* XXX disable interrupts? */
404
405 shutdown_out:
406 return(error);
407 }
408
409 /********************************************************************************
410 * Bring the controller to a quiescent state, ready for system suspend.
411 */
412 static int
amr_pci_suspend(device_t dev)413 amr_pci_suspend(device_t dev)
414 {
415 struct amr_softc *sc = device_get_softc(dev);
416
417 debug_called(1);
418
419 sc->amr_state |= AMR_STATE_SUSPEND;
420
421 /* flush controller */
422 device_printf(sc->amr_dev, "flushing cache...");
423 printf("%s\n", amr_flush(sc) ? "failed" : "done");
424
425 /* XXX disable interrupts? */
426
427 return(0);
428 }
429
430 /********************************************************************************
431 * Bring the controller back to a state ready for operation.
432 */
433 static int
amr_pci_resume(device_t dev)434 amr_pci_resume(device_t dev)
435 {
436 struct amr_softc *sc = device_get_softc(dev);
437
438 debug_called(1);
439
440 sc->amr_state &= ~AMR_STATE_SUSPEND;
441
442 /* XXX enable interrupts? */
443
444 return(0);
445 }
446
447 /*******************************************************************************
448 * Take an interrupt, or be poked by other code to look for interrupt-worthy
449 * status.
450 */
451 static void
amr_pci_intr(void * arg)452 amr_pci_intr(void *arg)
453 {
454 struct amr_softc *sc = (struct amr_softc *)arg;
455
456 debug_called(3);
457
458 /* collect finished commands, queue anything waiting */
459 amr_done(sc);
460 }
461
462 /********************************************************************************
463 * Free all of the resources associated with (sc)
464 *
465 * Should not be called if the controller is active.
466 */
467 static void
amr_pci_free(struct amr_softc * sc)468 amr_pci_free(struct amr_softc *sc)
469 {
470 void *p;
471
472 debug_called(1);
473
474 amr_free(sc);
475
476 /* destroy data-transfer DMA tag */
477 if (sc->amr_buffer_dmat)
478 bus_dma_tag_destroy(sc->amr_buffer_dmat);
479 if (sc->amr_buffer64_dmat)
480 bus_dma_tag_destroy(sc->amr_buffer64_dmat);
481
482 /* free and destroy DMA memory and tag for passthrough pool */
483 if (sc->amr_ccb)
484 bus_dmamem_free(sc->amr_ccb_dmat, sc->amr_ccb, sc->amr_ccb_dmamap);
485 if (sc->amr_ccb_dmat)
486 bus_dma_tag_destroy(sc->amr_ccb_dmat);
487
488 /* free and destroy DMA memory and tag for s/g lists */
489 if (sc->amr_sgtable)
490 bus_dmamem_free(sc->amr_sg_dmat, sc->amr_sgtable, sc->amr_sg_dmamap);
491 if (sc->amr_sg_dmat)
492 bus_dma_tag_destroy(sc->amr_sg_dmat);
493
494 /* free and destroy DMA memory and tag for mailbox */
495 p = (void *)(uintptr_t)(volatile void *)sc->amr_mailbox64;
496 if (sc->amr_mailbox) {
497 bus_dmamem_free(sc->amr_mailbox_dmat, p, sc->amr_mailbox_dmamap);
498 }
499 if (sc->amr_mailbox_dmat)
500 bus_dma_tag_destroy(sc->amr_mailbox_dmat);
501
502 /* disconnect the interrupt handler */
503 if (sc->amr_intr)
504 bus_teardown_intr(sc->amr_dev, sc->amr_irq, sc->amr_intr);
505 if (sc->amr_irq != NULL)
506 bus_release_resource(sc->amr_dev, SYS_RES_IRQ, 0, sc->amr_irq);
507
508 /* destroy the parent DMA tag */
509 if (sc->amr_parent_dmat)
510 bus_dma_tag_destroy(sc->amr_parent_dmat);
511
512 /* release the register window mapping */
513 if (sc->amr_reg != NULL)
514 bus_release_resource(sc->amr_dev,
515 AMR_IS_QUARTZ(sc) ? SYS_RES_MEMORY : SYS_RES_IOPORT,
516 PCIR_BAR(0), sc->amr_reg);
517 }
518
519 /********************************************************************************
520 * Allocate and map the scatter/gather table in bus space.
521 */
522 static void
amr_sglist_helper(void * arg,bus_dma_segment_t * segs,int nseg,int error)523 amr_sglist_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error)
524 {
525 uint32_t *addr;
526
527 debug_called(1);
528
529 addr = arg;
530 *addr = segs[0].ds_addr;
531 }
532
533 static int
amr_sglist_map(struct amr_softc * sc)534 amr_sglist_map(struct amr_softc *sc)
535 {
536 size_t segsize;
537 void *p;
538 int error;
539
540 debug_called(1);
541
542 /*
543 * Create a single tag describing a region large enough to hold all of
544 * the s/g lists we will need.
545 *
546 * Note that we could probably use AMR_LIMITCMD here, but that may become
547 * tunable.
548 */
549 if (AMR_IS_SG64(sc))
550 segsize = sizeof(struct amr_sg64entry) * AMR_NSEG * AMR_MAXCMD;
551 else
552 segsize = sizeof(struct amr_sgentry) * AMR_NSEG * AMR_MAXCMD;
553
554 error = bus_dma_tag_create(sc->amr_parent_dmat, /* parent */
555 512, 0, /* alignment,boundary */
556 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
557 BUS_SPACE_MAXADDR, /* highaddr */
558 NULL, NULL, /* filter, filterarg */
559 segsize, 1, /* maxsize, nsegments */
560 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
561 0, /* flags */
562 NULL, NULL, /* lockfunc, lockarg */
563 &sc->amr_sg_dmat);
564 if (error != 0) {
565 device_printf(sc->amr_dev, "can't allocate scatter/gather DMA tag\n");
566 return(ENOMEM);
567 }
568
569 /*
570 * Allocate enough s/g maps for all commands and permanently map them into
571 * controller-visible space.
572 *
573 * XXX this assumes we can get enough space for all the s/g maps in one
574 * contiguous slab. We may need to switch to a more complex arrangement
575 * where we allocate in smaller chunks and keep a lookup table from slot
576 * to bus address.
577 *
578 * XXX HACK ALERT: at least some controllers don't like the s/g memory
579 * being allocated below 0x2000. We leak some memory if
580 * we get some below this mark and allocate again. We
581 * should be able to avoid this with the tag setup, but
582 * that does't seem to work.
583 */
584 retry:
585 error = bus_dmamem_alloc(sc->amr_sg_dmat, (void **)&p, BUS_DMA_NOWAIT, &sc->amr_sg_dmamap);
586 if (error) {
587 device_printf(sc->amr_dev, "can't allocate s/g table\n");
588 return(ENOMEM);
589 }
590 bus_dmamap_load(sc->amr_sg_dmat, sc->amr_sg_dmamap, p, segsize, amr_sglist_helper, &sc->amr_sgbusaddr, 0);
591 if (sc->amr_sgbusaddr < 0x2000) {
592 debug(1, "s/g table too low (0x%x), reallocating\n", sc->amr_sgbusaddr);
593 goto retry;
594 }
595
596 if (AMR_IS_SG64(sc))
597 sc->amr_sg64table = (struct amr_sg64entry *)p;
598 sc->amr_sgtable = (struct amr_sgentry *)p;
599
600 return(0);
601 }
602
603 /********************************************************************************
604 * Allocate and set up mailbox areas for the controller (sc)
605 *
606 * The basic mailbox structure should be 16-byte aligned.
607 */
608 static int
amr_setup_mbox(struct amr_softc * sc)609 amr_setup_mbox(struct amr_softc *sc)
610 {
611 int error;
612 void *p;
613 uint32_t baddr;
614
615 debug_called(1);
616
617 /*
618 * Create a single tag describing a region large enough to hold the entire
619 * mailbox.
620 */
621 error = bus_dma_tag_create(sc->amr_parent_dmat, /* parent */
622 16, 0, /* alignment,boundary */
623 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
624 BUS_SPACE_MAXADDR, /* highaddr */
625 NULL, NULL, /* filter, filterarg */
626 sizeof(struct amr_mailbox64), /* maxsize */
627 1, /* nsegments */
628 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
629 0, /* flags */
630 NULL, NULL, /* lockfunc, lockarg */
631 &sc->amr_mailbox_dmat);
632 if (error != 0) {
633 device_printf(sc->amr_dev, "can't allocate mailbox tag\n");
634 return(ENOMEM);
635 }
636
637 /*
638 * Allocate the mailbox structure and permanently map it into
639 * controller-visible space.
640 */
641 error = bus_dmamem_alloc(sc->amr_mailbox_dmat, (void **)&p, BUS_DMA_NOWAIT,
642 &sc->amr_mailbox_dmamap);
643 if (error) {
644 device_printf(sc->amr_dev, "can't allocate mailbox memory\n");
645 return(ENOMEM);
646 }
647 bus_dmamap_load(sc->amr_mailbox_dmat, sc->amr_mailbox_dmamap, p,
648 sizeof(struct amr_mailbox64), amr_sglist_helper, &baddr, 0);
649 /*
650 * Conventional mailbox is inside the mailbox64 region.
651 */
652 /* save physical base of the basic mailbox structure */
653 sc->amr_mailboxphys = baddr + offsetof(struct amr_mailbox64, mb);
654 bzero(p, sizeof(struct amr_mailbox64));
655 sc->amr_mailbox64 = (struct amr_mailbox64 *)p;
656 sc->amr_mailbox = &sc->amr_mailbox64->mb;
657
658 return(0);
659 }
660
661 static int
amr_ccb_map(struct amr_softc * sc)662 amr_ccb_map(struct amr_softc *sc)
663 {
664 int ccbsize, error;
665
666 /*
667 * Passthrough and Extended passthrough structures will share the same
668 * memory.
669 */
670 ccbsize = sizeof(union amr_ccb) * AMR_MAXCMD;
671 error = bus_dma_tag_create(sc->amr_parent_dmat, /* parent */
672 128, 0, /* alignment,boundary */
673 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
674 BUS_SPACE_MAXADDR, /* highaddr */
675 NULL, NULL, /* filter, filterarg */
676 ccbsize, /* maxsize */
677 1, /* nsegments */
678 ccbsize, /* maxsegsize */
679 0, /* flags */
680 NULL, NULL, /* lockfunc, lockarg */
681 &sc->amr_ccb_dmat);
682 if (error != 0) {
683 device_printf(sc->amr_dev, "can't allocate ccb tag\n");
684 return (ENOMEM);
685 }
686
687 error = bus_dmamem_alloc(sc->amr_ccb_dmat, (void **)&sc->amr_ccb,
688 BUS_DMA_NOWAIT, &sc->amr_ccb_dmamap);
689 if (error) {
690 device_printf(sc->amr_dev, "can't allocate ccb memory\n");
691 return (ENOMEM);
692 }
693 bus_dmamap_load(sc->amr_ccb_dmat, sc->amr_ccb_dmamap, sc->amr_ccb,
694 ccbsize, amr_sglist_helper, &sc->amr_ccb_busaddr, 0);
695 bzero(sc->amr_ccb, ccbsize);
696
697 return (0);
698 }
699
700