xref: /dragonfly/sys/dev/misc/cpuctl/cpuctl.c (revision 2b3f93ea6d1f70880f3e87f3c2cbe0dc0bfc9332)
1 /*-
2  * Copyright (c) 2006-2008 Stanislav Sedov <stas@FreeBSD.org>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  *
26  * $FreeBSD: head/sys/dev/cpuctl/cpuctl.c 275960 2014-12-20 16:40:49Z kib $
27  */
28 
29 
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/conf.h>
33 #include <sys/fcntl.h>
34 #include <sys/malloc.h>
35 #include <sys/module.h>
36 #include <sys/caps.h>
37 #include <sys/proc.h>
38 #include <sys/queue.h>
39 #include <sys/sched.h>
40 #include <sys/kernel.h>
41 #include <sys/sysctl.h>
42 #include <sys/uio.h>
43 #include <sys/cpuctl.h>
44 #include <sys/device.h>
45 #include <sys/thread2.h>
46 
47 #include <machine/cpufunc.h>
48 #include <machine/md_var.h>
49 #include <machine/specialreg.h>
50 
51 static d_open_t cpuctl_open;
52 static d_close_t cpuctl_close;
53 static d_ioctl_t cpuctl_ioctl;
54 
55 #define   CPUCTL_VERSION 1
56 
57 #ifdef DEBUG
58 # define  DPRINTF(format,...) kprintf(format, __VA_ARGS__);
59 #else
60 # define  DPRINTF(format,...)
61 #endif
62 
63 #define   UCODE_SIZE_MAX      (4 * 1024 * 1024)
64 
65 static int cpuctl_do_msr(int cpu, cpuctl_msr_args_t *data, u_long cmd);
66 static void cpuctl_do_cpuid(int cpu, cpuctl_cpuid_args_t *data);
67 static void cpuctl_do_cpuid_count(int cpu, cpuctl_cpuid_count_args_t *data);
68 static int cpuctl_do_update(int cpu, cpuctl_update_args_t *data);
69 static int update_intel(int cpu, cpuctl_update_args_t *args);
70 static int update_amd(int cpu, cpuctl_update_args_t *args);
71 static int update_via(int cpu, cpuctl_update_args_t *args);
72 
73 static cdev_t *cpuctl_devs;
74 static MALLOC_DEFINE(M_CPUCTL, "cpuctl", "CPUCTL buffer");
75 static struct lock cpuctl_lock = LOCK_INITIALIZER("cpuctl", 0, 0);
76 
77 static struct dev_ops cpuctl_cdevsw = {
78         .head = { .name = "cpuctl", .flags = D_MPSAFE },
79         .d_open =       cpuctl_open,
80           .d_close =          cpuctl_close,
81         .d_ioctl =      cpuctl_ioctl,
82 };
83 
84 int
cpuctl_ioctl(struct dev_ioctl_args * ap)85 cpuctl_ioctl(struct dev_ioctl_args *ap)
86 {
87           int ret;
88           int cpu = dev2unit(ap->a_head.a_dev);
89           u_long cmd = ap->a_cmd;
90           int flags = ap->a_fflag;
91           caddr_t data = ap->a_data;
92 
93           if (cpu >= ncpus) {
94                     DPRINTF("[cpuctl,%d]: bad cpu number %d\n", __LINE__, cpu);
95                     return (ENXIO);
96           }
97           /* Require write flag for "write" requests. */
98           if ((cmd == CPUCTL_WRMSR || cmd == CPUCTL_UPDATE ||
99                cmd == CPUCTL_MSRSBIT || cmd == CPUCTL_MSRCBIT) &&
100               ((flags & FWRITE) == 0))
101                     return (EPERM);
102 
103           lockmgr(&cpuctl_lock, LK_EXCLUSIVE);
104 
105           switch (cmd) {
106           case CPUCTL_RDMSR:
107                     ret = cpuctl_do_msr(cpu, (cpuctl_msr_args_t *)data, cmd);
108                     break;
109           case CPUCTL_MSRSBIT:
110           case CPUCTL_MSRCBIT:
111           case CPUCTL_WRMSR:
112                     ret = caps_priv_check_self(SYSCAP_NOCPUCTL_WRMSR);
113                     if (ret != 0)
114                               goto fail;
115                     ret = cpuctl_do_msr(cpu, (cpuctl_msr_args_t *)data, cmd);
116                     break;
117           case CPUCTL_CPUID:
118                     cpuctl_do_cpuid(cpu, (cpuctl_cpuid_args_t *)data);
119                     ret = 0;
120                     break;
121           case CPUCTL_UPDATE:
122                     ret = caps_priv_check_self(SYSCAP_NOCPUCTL_UPDATE);
123                     if (ret != 0)
124                               goto fail;
125                     ret = cpuctl_do_update(cpu, (cpuctl_update_args_t *)data);
126                     break;
127           case CPUCTL_CPUID_COUNT:
128                     cpuctl_do_cpuid_count(cpu, (cpuctl_cpuid_count_args_t *)data);
129                     ret = 0;
130                     break;
131           default:
132                     ret = EINVAL;
133                     break;
134           }
135 fail:
136           lockmgr(&cpuctl_lock, LK_RELEASE);
137 
138           return (ret);
139 }
140 
141 /*
142  * Actually perform cpuid operation.
143  */
144 static void
cpuctl_do_cpuid_count(int cpu,cpuctl_cpuid_count_args_t * data)145 cpuctl_do_cpuid_count(int cpu, cpuctl_cpuid_count_args_t *data)
146 {
147           int oldcpu;
148 
149           KASSERT(cpu >= 0 && cpu < ncpus,
150               ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu));
151 
152           /* Explicitly clear cpuid data to avoid returning stale info. */
153           bzero(data->data, sizeof(data->data));
154           DPRINTF("[cpuctl,%d]: retrieving cpuid lev %#0x type %#0x for %d cpu\n",
155               __LINE__, data->level, data->level_type, cpu);
156           oldcpu = mycpuid;
157           lwkt_migratecpu(cpu);
158           cpuid_count(data->level, data->level_type, data->data);
159           lwkt_migratecpu(oldcpu);
160 }
161 
162 static void
cpuctl_do_cpuid(int cpu,cpuctl_cpuid_args_t * data)163 cpuctl_do_cpuid(int cpu, cpuctl_cpuid_args_t *data)
164 {
165           cpuctl_cpuid_count_args_t cdata;
166 
167           cdata.level = data->level;
168           /* Override the level type. */
169           cdata.level_type = 0;
170           cpuctl_do_cpuid_count(cpu, &cdata);
171           bcopy(cdata.data, data->data, sizeof(data->data)); /* Ignore error */
172 }
173 
174 /*
175  * Actually perform MSR operations.
176  */
177 static int
cpuctl_do_msr(int cpu,cpuctl_msr_args_t * data,u_long cmd)178 cpuctl_do_msr(int cpu, cpuctl_msr_args_t *data, u_long cmd)
179 {
180           uint64_t reg;
181           int oldcpu;
182           int ret;
183 
184           KASSERT(cpu >= 0 && cpu < ncpus,
185               ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu));
186 
187           /*
188            * Explicitly clear cpuid data to avoid returning stale
189            * info
190            */
191           DPRINTF("[cpuctl,%d]: operating on MSR %#0x for %d cpu\n", __LINE__,
192               data->msr, cpu);
193           oldcpu = mycpuid;
194           lwkt_migratecpu(cpu);
195           if (cmd == CPUCTL_RDMSR) {
196                     data->data = 0;
197                     ret = rdmsr_safe(data->msr, &data->data);
198           } else if (cmd == CPUCTL_WRMSR) {
199                     ret = wrmsr_safe(data->msr, data->data);
200           } else if (cmd == CPUCTL_MSRSBIT) {
201                     crit_enter();
202                     ret = rdmsr_safe(data->msr, &reg);
203                     if (ret == 0)
204                               ret = wrmsr_safe(data->msr, reg | data->data);
205                     crit_exit();
206           } else if (cmd == CPUCTL_MSRCBIT) {
207                     crit_enter();
208                     ret = rdmsr_safe(data->msr, &reg);
209                     if (ret == 0)
210                               ret = wrmsr_safe(data->msr, reg & ~data->data);
211                     crit_exit();
212           } else
213                     panic("[cpuctl,%d]: unknown operation requested: %lu", __LINE__, cmd);
214           lwkt_migratecpu(oldcpu);
215           return (ret);
216 }
217 
218 /*
219  * Actually perform microcode update.
220  */
221 extern void mitigation_vm_setup(void *arg);
222 
223 static int
cpuctl_do_update(int cpu,cpuctl_update_args_t * data)224 cpuctl_do_update(int cpu, cpuctl_update_args_t *data)
225 {
226           cpuctl_cpuid_args_t args = {
227                     .level = 0,
228           };
229           char vendor[13];
230           int ret;
231 
232           KASSERT(cpu >= 0 && cpu < ncpus,
233               ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu));
234           DPRINTF("[cpuctl,%d]: XXX %d", __LINE__, cpu);
235 
236           cpuctl_do_cpuid(cpu, &args);
237           ((uint32_t *)vendor)[0] = args.data[1];
238           ((uint32_t *)vendor)[1] = args.data[3];
239           ((uint32_t *)vendor)[2] = args.data[2];
240           vendor[12] = '\0';
241           if (strncmp(vendor, INTEL_VENDOR_ID, sizeof(INTEL_VENDOR_ID)) == 0)
242                     ret = update_intel(cpu, data);
243           else if(strncmp(vendor, AMD_VENDOR_ID, sizeof(AMD_VENDOR_ID)) == 0)
244                     ret = update_amd(cpu, data);
245           else if(strncmp(vendor, CENTAUR_VENDOR_ID, sizeof(CENTAUR_VENDOR_ID)) == 0)
246                     ret = update_via(cpu, data);
247           else
248                     ret = ENXIO;
249 
250           if (ret == 0)
251                     mitigation_vm_setup((void *)(intptr_t)1);
252 
253           return (ret);
254 }
255 
256 static int
update_intel(int cpu,cpuctl_update_args_t * args)257 update_intel(int cpu, cpuctl_update_args_t *args)
258 {
259           void *ptr;
260           uint64_t rev0, rev1;
261           uint32_t tmp[4];
262           int oldcpu;
263           int ret;
264 
265           if (args->size == 0 || args->data == NULL) {
266                     DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__);
267                     return (EINVAL);
268           }
269           if (args->size > UCODE_SIZE_MAX) {
270                     DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__);
271                     return (EINVAL);
272           }
273 
274           /*
275            * 16 byte alignment required.  Rely on the fact that
276            * malloc(9) always returns the pointer aligned at least on
277            * the size of the allocation.
278            */
279           ptr = kmalloc(args->size + 16, M_CPUCTL, M_WAITOK);
280           if (copyin(args->data, ptr, args->size) != 0) {
281                     DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed",
282                         __LINE__, args->data, ptr, args->size);
283                     ret = EFAULT;
284                     goto fail;
285           }
286           oldcpu = mycpuid;
287           lwkt_migratecpu(cpu);
288           crit_enter();
289           rdmsr_safe(MSR_BIOS_SIGN, &rev0); /* Get current microcode revision. */
290 
291           /*
292            * Perform update.
293            */
294           wrmsr_safe(MSR_BIOS_UPDT_TRIG, (uintptr_t)(ptr));
295           wrmsr_safe(MSR_BIOS_SIGN, 0);
296 
297           /*
298            * Serialize instruction flow.
299            */
300           do_cpuid(0, tmp);
301           crit_exit();
302           rdmsr_safe(MSR_BIOS_SIGN, &rev1); /* Get new microcode revision. */
303           lwkt_migratecpu(oldcpu);
304           kprintf("[cpu %d]: updated microcode from rev=0x%x to rev=0x%x\n", cpu,
305               (unsigned)(rev0 >> 32), (unsigned)(rev1 >> 32));
306 
307           if (rev1 > rev0)
308                     ret = 0;
309           else
310                     ret = EEXIST;
311 fail:
312           kfree(ptr, M_CPUCTL);
313           return (ret);
314 }
315 
316 static int
update_amd(int cpu,cpuctl_update_args_t * args)317 update_amd(int cpu, cpuctl_update_args_t *args)
318 {
319           void *ptr = NULL;
320           uint32_t tmp[4];
321           int oldcpu;
322           int ret;
323 
324           if (args->size == 0 || args->data == NULL) {
325                     DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__);
326                     return (EINVAL);
327           }
328           if (args->size > UCODE_SIZE_MAX) {
329                     DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__);
330                     return (EINVAL);
331           }
332           /*
333            * XXX Might not require contignous address space - needs check
334            */
335           ptr = contigmalloc(args->size, M_CPUCTL, 0, 0, 0xffffffff, 16, 0);
336           if (ptr == NULL) {
337                     DPRINTF("[cpuctl,%d]: cannot allocate %zd bytes of memory",
338                         __LINE__, args->size);
339                     return (ENOMEM);
340           }
341           if (copyin(args->data, ptr, args->size) != 0) {
342                     DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed",
343                         __LINE__, args->data, ptr, args->size);
344                     ret = EFAULT;
345                     goto fail;
346           }
347           oldcpu = mycpuid;
348           lwkt_migratecpu(cpu);
349           crit_enter();
350 
351           /*
352            * Perform update.
353            */
354           wrmsr_safe(MSR_AMD_PATCH_LOADER, (uintptr_t)ptr);
355 
356           /*
357            * Serialize instruction flow.
358            */
359           do_cpuid(0, tmp);
360           crit_exit();
361           lwkt_migratecpu(oldcpu);
362           ret = 0;
363 fail:
364           if (ptr != NULL)
365                     contigfree(ptr, args->size, M_CPUCTL);
366           return (ret);
367 }
368 
369 static int
update_via(int cpu,cpuctl_update_args_t * args)370 update_via(int cpu, cpuctl_update_args_t *args)
371 {
372           void *ptr;
373           uint64_t rev0, rev1, res;
374           uint32_t tmp[4];
375           int oldcpu;
376           int ret;
377 
378           if (args->size == 0 || args->data == NULL) {
379                     DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__);
380                     return (EINVAL);
381           }
382           if (args->size > UCODE_SIZE_MAX) {
383                     DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__);
384                     return (EINVAL);
385           }
386 
387           /*
388            * 4 byte alignment required.
389            */
390           ptr = kmalloc(args->size, M_CPUCTL, M_WAITOK);
391           if (copyin(args->data, ptr, args->size) != 0) {
392                     DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed",
393                         __LINE__, args->data, ptr, args->size);
394                     ret = EFAULT;
395                     goto fail;
396           }
397           oldcpu = mycpuid;
398           lwkt_migratecpu(cpu);
399           crit_enter();
400           rdmsr_safe(MSR_BIOS_SIGN, &rev0); /* Get current microcode revision. */
401 
402           /*
403            * Perform update.
404            */
405           wrmsr_safe(MSR_BIOS_UPDT_TRIG, (uintptr_t)(ptr));
406           do_cpuid(1, tmp);
407 
408           /*
409            * Result are in low byte of MSR FCR5:
410            * 0x00: No update has been attempted since RESET.
411            * 0x01: The last attempted update was successful.
412            * 0x02: The last attempted update was unsuccessful due to a bad
413            *       environment. No update was loaded and any preexisting
414            *       patches are still active.
415            * 0x03: The last attempted update was not applicable to this processor.
416            *       No update was loaded and any preexisting patches are still
417            *       active.
418            * 0x04: The last attempted update was not successful due to an invalid
419            *       update data block. No update was loaded and any preexisting
420            *       patches are still active
421            */
422           rdmsr_safe(0x1205, &res);
423           res &= 0xff;
424           crit_exit();
425           rdmsr_safe(MSR_BIOS_SIGN, &rev1); /* Get new microcode revision. */
426           lwkt_migratecpu(oldcpu);
427 
428           DPRINTF("[cpu,%d]: rev0=%x rev1=%x res=%x\n", __LINE__,
429               (unsigned)(rev0 >> 32), (unsigned)(rev1 >> 32), (unsigned)res);
430 
431           if (res != 0x01)
432                     ret = EINVAL;
433           else
434                     ret = 0;
435 fail:
436           kfree(ptr, M_CPUCTL);
437           return (ret);
438 }
439 
440 int
cpuctl_open(struct dev_open_args * ap)441 cpuctl_open(struct dev_open_args *ap)
442 {
443           int ret = 0;
444           int cpu;
445 
446           cpu = dev2unit(ap->a_head.a_dev);
447           if (cpu < 0 || cpu >= ncpus) {
448                     DPRINTF("[cpuctl,%d]: incorrect cpu number %d\n",
449                               __LINE__, cpu);
450                     return (ENXIO);
451           }
452           if (ap->a_oflags & FWRITE)
453                     ret = securelevel > 0 ? EPERM : 0;
454           return (ret);
455 }
456 
457 static int
cpuctl_close(struct dev_close_args * ap)458 cpuctl_close(struct dev_close_args *ap)
459 {
460           return 0;
461 }
462 
463 static int
cpuctl_modevent(module_t mod __unused,int type,void * data __unused)464 cpuctl_modevent(module_t mod __unused, int type, void *data __unused)
465 {
466           int cpu;
467 
468           switch(type) {
469           case MOD_LOAD:
470                     if ((cpu_feature & CPUID_MSR) == 0) {
471                               if (bootverbose)
472                                         kprintf("cpuctl: not available.\n");
473                               return (ENODEV);
474                     }
475                     if (bootverbose)
476                               kprintf("cpuctl: access to MSR registers/cpuid info.\n");
477                     cpuctl_devs = kmalloc(sizeof(*cpuctl_devs) * ncpus, M_CPUCTL,
478                         M_WAITOK | M_ZERO);
479                     for (cpu = 0; cpu < ncpus; cpu++)
480                               cpuctl_devs[cpu] = make_dev(&cpuctl_cdevsw, cpu,
481                                   UID_ROOT, GID_KMEM, 0640, "cpuctl%d", cpu);
482                     break;
483           case MOD_UNLOAD:
484                     for (cpu = 0; cpu < ncpus; cpu++) {
485                               if (cpuctl_devs[cpu] != NULL)
486                                         destroy_dev(cpuctl_devs[cpu]);
487                     }
488                     kfree(cpuctl_devs, M_CPUCTL);
489                     break;
490           case MOD_SHUTDOWN:
491                     break;
492           default:
493                     return (EOPNOTSUPP);
494           }
495           return (0);
496 }
497 
498 DEV_MODULE(cpuctl, cpuctl_modevent, NULL);
499 MODULE_VERSION(cpuctl, CPUCTL_VERSION);
500