xref: /dragonfly/sys/cpu/x86_64/misc/monitor.s (revision b1d2a2dea39e5b738c3c3ee0abfee4147c3605be)
1/*
2 * Copyright (c) 2010 The DragonFly Project. All rights reserved.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to The DragonFly Project
6 * by Venkatesh Srinivas <me@endeavour.zapto.org>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 *
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 * 3. Neither the name of The DragonFly Project nor the names of its
18 *    contributors may be used to endorse or promote products derived from this
19 *    software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 */
33
34#include <machine/asmacros.h>
35#include <machine/cputypes.h>
36#include <machine/pmap.h>
37#include <machine/specialreg.h>
38
39#include "assym.s"
40
41          .text
42
43/*
44 * void cpu_mmw_pause_int(int *addr, int oldval, int cstate, int intrbrk)
45 */
46ENTRY(cpu_mmw_pause_int)
47          movq      %rdi, %rax
48          movq      %rdx, %r8
49          movq      %rcx, %r9
50
51          xorq      %rcx, %rcx
52          xorq      %rdx, %rdx
53          monitor
54          cmpl      (%rax), %esi
55          jne       1f
56          movq      %r8, %rax
57          movq      %r9, %rcx
58          mwait
591:
60          ret
61END(cpu_mmw_pause_int)
62
63/*
64 * void cpu_mmw_pause_long(long *addr, long oldval, int cstate, int intrbrk)
65 */
66ENTRY(cpu_mmw_pause_long)
67          movq      %rdi, %rax
68          movq      %rdx, %r8
69          movq      %rcx, %r9
70
71          xorq      %rcx, %rcx
72          xorq      %rdx, %rdx
73          monitor
74          cmpq      (%rax), %rsi
75          jne       1f
76          movq      %r8, %rax
77          movq      %r9, %rcx
78          mwait
791:
80          ret
81END(cpu_mmw_pause_long)
82