1 /* Prototypes for exported functions defined in arm.cc and pe.c 2 Copyright (C) 1999-2022 Free Software Foundation, Inc. 3 Contributed by Richard Earnshaw (rearnsha@arm.com) 4 Minor hacks by Nick Clifton (nickc@cygnus.com) 5 6 This file is part of GCC. 7 8 GCC is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 3, or (at your option) 11 any later version. 12 13 GCC is distributed in the hope that it will be useful, 14 but WITHOUT ANY WARRANTY; without even the implied warranty of 15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 GNU General Public License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with GCC; see the file COPYING3. If not see 20 <http://www.gnu.org/licenses/>. */ 21 22 #ifndef GCC_ARM_PROTOS_H 23 #define GCC_ARM_PROTOS_H 24 25 #include "sbitmap.h" 26 27 extern enum unwind_info_type arm_except_unwind_info (struct gcc_options *); 28 extern int use_return_insn (int, rtx); 29 extern bool use_simple_return_p (void); 30 extern enum reg_class arm_regno_class (int); 31 extern bool arm_check_builtin_call (location_t , vec<location_t> , tree, 32 tree, unsigned int, tree *); 33 extern void arm_load_pic_register (unsigned long, rtx); 34 extern int arm_volatile_func (void); 35 extern void arm_expand_prologue (void); 36 extern void arm_expand_epilogue (bool); 37 extern void arm_declare_function_name (FILE *, const char *, tree); 38 extern void arm_asm_declare_function_name (FILE *, const char *, tree); 39 extern void thumb2_expand_return (bool); 40 extern const char *arm_strip_name_encoding (const char *); 41 extern void arm_asm_output_labelref (FILE *, const char *); 42 extern void thumb2_asm_output_opcode (FILE *); 43 extern unsigned long arm_current_func_type (void); 44 extern HOST_WIDE_INT arm_compute_initial_elimination_offset (unsigned int, 45 unsigned int); 46 extern HOST_WIDE_INT thumb_compute_initial_elimination_offset (unsigned int, 47 unsigned int); 48 extern unsigned int arm_dbx_register_number (unsigned int); 49 extern void arm_output_fn_unwind (FILE *, bool); 50 51 extern rtx arm_expand_builtin (tree exp, rtx target, rtx subtarget 52 ATTRIBUTE_UNUSED, machine_mode mode 53 ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED); 54 extern tree arm_builtin_decl (unsigned code, bool initialize_p 55 ATTRIBUTE_UNUSED); 56 extern void arm_init_builtins (void); 57 extern void arm_atomic_assign_expand_fenv (tree *hold, tree *clear, tree *update); 58 extern rtx arm_simd_vect_par_cnst_half (machine_mode mode, bool high); 59 extern bool arm_simd_check_vect_par_cnst_half_p (rtx op, machine_mode mode, 60 bool high); 61 extern void arm_emit_speculation_barrier_function (void); 62 extern void arm_decompose_di_binop (rtx, rtx, rtx *, rtx *, rtx *, rtx *); 63 extern bool arm_q_bit_access (void); 64 extern bool arm_ge_bits_access (void); 65 extern bool arm_target_insn_ok_for_lob (rtx); 66 67 #ifdef RTX_CODE 68 enum reg_class 69 arm_mode_base_reg_class (machine_mode); 70 extern void arm_gen_unlikely_cbranch (enum rtx_code, machine_mode cc_mode, 71 rtx label_ref); 72 extern bool arm_vector_mode_supported_p (machine_mode); 73 extern bool arm_small_register_classes_for_mode_p (machine_mode); 74 extern int const_ok_for_arm (HOST_WIDE_INT); 75 extern int const_ok_for_op (HOST_WIDE_INT, enum rtx_code); 76 extern int const_ok_for_dimode_op (HOST_WIDE_INT, enum rtx_code); 77 extern void thumb1_gen_const_int_rtl (rtx, HOST_WIDE_INT); 78 extern void thumb1_gen_const_int_print (rtx, HOST_WIDE_INT); 79 extern int arm_split_constant (RTX_CODE, machine_mode, rtx, 80 HOST_WIDE_INT, rtx, rtx, int); 81 extern int legitimate_pic_operand_p (rtx); 82 extern rtx legitimize_pic_address (rtx, machine_mode, rtx, rtx, bool); 83 extern rtx legitimize_tls_address (rtx, rtx); 84 extern bool arm_legitimate_address_p (machine_mode, rtx, bool); 85 extern int arm_legitimate_address_outer_p (machine_mode, rtx, RTX_CODE, int); 86 extern int thumb_legitimate_offset_p (machine_mode, HOST_WIDE_INT); 87 extern int thumb1_legitimate_address_p (machine_mode, rtx, int); 88 extern bool ldm_stm_operation_p (rtx, bool, machine_mode mode, 89 bool, bool); 90 extern bool clear_operation_p (rtx, bool); 91 extern int arm_const_double_rtx (rtx); 92 extern int vfp3_const_double_rtx (rtx); 93 extern int simd_immediate_valid_for_move (rtx, machine_mode, rtx *, int *); 94 extern int neon_immediate_valid_for_logic (rtx, machine_mode, int, rtx *, 95 int *); 96 extern int neon_immediate_valid_for_shift (rtx, machine_mode, rtx *, 97 int *, bool); 98 extern char *neon_output_logic_immediate (const char *, rtx *, 99 machine_mode, int, int); 100 extern char *neon_output_shift_immediate (const char *, char, rtx *, 101 machine_mode, int, bool); 102 extern void neon_pairwise_reduce (rtx, rtx, machine_mode, 103 rtx (*) (rtx, rtx, rtx)); 104 extern rtx mve_bool_vec_to_const (rtx const_vec); 105 extern rtx neon_make_constant (rtx, bool generate = true); 106 extern tree arm_builtin_vectorized_function (unsigned int, tree, tree); 107 extern void neon_expand_vector_init (rtx, rtx); 108 extern void neon_lane_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT, const_tree); 109 extern void arm_const_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT); 110 extern HOST_WIDE_INT neon_element_bits (machine_mode); 111 extern void neon_emit_pair_result_insn (machine_mode, 112 rtx (*) (rtx, rtx, rtx, rtx), 113 rtx, rtx, rtx); 114 extern void neon_disambiguate_copy (rtx *, rtx *, rtx *, unsigned int); 115 extern void neon_split_vcombine (rtx op[3]); 116 extern enum reg_class coproc_secondary_reload_class (machine_mode, rtx, 117 bool); 118 extern bool arm_tls_referenced_p (rtx); 119 120 extern int arm_coproc_mem_operand (rtx, bool); 121 extern int arm_coproc_mem_operand_no_writeback (rtx); 122 extern int arm_coproc_mem_operand_wb (rtx, int); 123 extern int neon_vector_mem_operand (rtx, int, bool); 124 extern int mve_vector_mem_operand (machine_mode, rtx, bool); 125 extern int neon_struct_mem_operand (rtx); 126 extern int mve_struct_mem_operand (rtx); 127 128 extern rtx *neon_vcmla_lane_prepare_operands (rtx *); 129 130 extern int tls_mentioned_p (rtx); 131 extern int symbol_mentioned_p (rtx); 132 extern int label_mentioned_p (rtx); 133 extern RTX_CODE minmax_code (rtx); 134 extern bool arm_sat_operator_match (rtx, rtx, int *, bool *); 135 extern int adjacent_mem_locations (rtx, rtx); 136 extern bool gen_ldm_seq (rtx *, int, bool); 137 extern bool gen_stm_seq (rtx *, int); 138 extern bool gen_const_stm_seq (rtx *, int); 139 extern rtx arm_gen_load_multiple (int *, int, rtx, int, rtx, HOST_WIDE_INT *); 140 extern rtx arm_gen_store_multiple (int *, int, rtx, int, rtx, HOST_WIDE_INT *); 141 extern bool offset_ok_for_ldrd_strd (HOST_WIDE_INT); 142 extern bool operands_ok_ldrd_strd (rtx, rtx, rtx, HOST_WIDE_INT, bool, bool); 143 extern bool gen_operands_ldrd_strd (rtx *, bool, bool, bool); 144 extern bool valid_operands_ldrd_strd (rtx *, bool); 145 extern int arm_gen_cpymemqi (rtx *); 146 extern bool gen_cpymem_ldrd_strd (rtx *); 147 extern machine_mode arm_select_cc_mode (RTX_CODE, rtx, rtx); 148 extern machine_mode arm_select_dominance_cc_mode (rtx, rtx, 149 HOST_WIDE_INT); 150 extern rtx arm_gen_compare_reg (RTX_CODE, rtx, rtx, rtx); 151 extern rtx arm_gen_return_addr_mask (void); 152 extern void arm_reload_in_hi (rtx *); 153 extern void arm_reload_out_hi (rtx *); 154 extern int arm_max_const_double_inline_cost (void); 155 extern int arm_const_double_inline_cost (rtx); 156 extern bool arm_const_double_by_parts (rtx); 157 extern bool arm_const_double_by_immediates (rtx); 158 extern rtx arm_load_function_descriptor (rtx funcdesc); 159 extern void arm_emit_call_insn (rtx, rtx, bool); 160 bool detect_cmse_nonsecure_call (tree); 161 extern const char *output_call (rtx *); 162 void arm_emit_movpair (rtx, rtx); 163 extern const char *output_mov_long_double_arm_from_arm (rtx *); 164 extern const char *output_move_double (rtx *, bool, int *count); 165 extern const char *output_move_quad (rtx *); 166 extern int arm_count_output_move_double_insns (rtx *); 167 extern int arm_count_ldrdstrd_insns (rtx *, bool); 168 extern const char *output_move_vfp (rtx *operands); 169 extern const char *output_move_neon (rtx *operands); 170 extern int arm_attr_length_move_neon (rtx_insn *); 171 extern int arm_address_offset_is_imm (rtx_insn *); 172 extern const char *output_add_immediate (rtx *); 173 extern const char *arithmetic_instr (rtx, int); 174 extern void output_ascii_pseudo_op (FILE *, const unsigned char *, int); 175 extern const char *output_return_instruction (rtx, bool, bool, bool); 176 extern const char *output_probe_stack_range (rtx, rtx); 177 extern void arm_poke_function_name (FILE *, const char *); 178 extern void arm_final_prescan_insn (rtx_insn *); 179 extern int arm_debugger_arg_offset (int, rtx); 180 extern bool arm_is_long_call_p (tree); 181 extern int arm_emit_vector_const (FILE *, rtx); 182 extern void arm_emit_fp16_const (rtx c); 183 extern const char * arm_output_load_gr (rtx *); 184 extern const char *vfp_output_vstmd (rtx *); 185 extern void arm_output_multireg_pop (rtx *, bool, rtx, bool, bool); 186 extern void arm_set_return_address (rtx, rtx); 187 extern int arm_eliminable_register (rtx); 188 extern const char *arm_output_shift(rtx *, int); 189 extern const char *arm_output_iwmmxt_shift_immediate (const char *, rtx *, bool); 190 extern const char *arm_output_iwmmxt_tinsr (rtx *); 191 extern unsigned int arm_sync_loop_insns (rtx , rtx *); 192 extern int arm_attr_length_push_multi(rtx, rtx); 193 extern int arm_attr_length_pop_multi(rtx *, bool, bool); 194 extern void arm_expand_compare_and_swap (rtx op[]); 195 extern void arm_split_compare_and_swap (rtx op[]); 196 extern void arm_split_atomic_op (enum rtx_code, rtx, rtx, rtx, rtx, rtx, rtx); 197 extern rtx arm_load_tp (rtx); 198 extern bool arm_coproc_builtin_available (enum unspecv); 199 extern bool arm_coproc_ldc_stc_legitimate_address (rtx); 200 extern rtx arm_stack_protect_tls_canary_mem (bool); 201 202 203 #if defined TREE_CODE 204 extern void arm_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree); 205 extern bool arm_pad_reg_upward (machine_mode, tree, int); 206 #endif 207 extern int arm_apply_result_size (void); 208 extern opt_machine_mode arm_get_mask_mode (machine_mode mode); 209 210 #endif /* RTX_CODE */ 211 212 /* MVE functions. */ 213 namespace arm_mve { 214 void handle_arm_mve_types_h (); 215 } 216 217 /* Thumb functions. */ 218 extern void arm_init_expanders (void); 219 extern const char *thumb1_unexpanded_epilogue (void); 220 extern void thumb1_expand_prologue (void); 221 extern void thumb1_expand_epilogue (void); 222 extern const char *thumb1_output_interwork (void); 223 extern int thumb_shiftable_const (unsigned HOST_WIDE_INT); 224 #ifdef RTX_CODE 225 extern enum arm_cond_code maybe_get_arm_condition_code (rtx); 226 extern void thumb1_final_prescan_insn (rtx_insn *); 227 extern void thumb2_final_prescan_insn (rtx_insn *); 228 extern const char *thumb_load_double_from_address (rtx *); 229 extern const char *thumb_output_move_mem_multiple (int, rtx *); 230 extern const char *thumb_call_via_reg (rtx); 231 extern void thumb_expand_cpymemqi (rtx *); 232 extern rtx arm_return_addr (int, rtx); 233 extern void thumb_reload_out_hi (rtx *); 234 extern void thumb_set_return_address (rtx, rtx); 235 extern const char *thumb1_output_casesi (rtx *); 236 extern const char *thumb2_output_casesi (rtx *); 237 #endif 238 239 /* Defined in pe.c. */ 240 extern int arm_dllexport_name_p (const char *); 241 extern int arm_dllimport_name_p (const char *); 242 243 #ifdef TREE_CODE 244 extern void arm_pe_unique_section (tree, int); 245 extern void arm_pe_encode_section_info (tree, rtx, int); 246 extern int arm_dllexport_p (tree); 247 extern int arm_dllimport_p (tree); 248 extern void arm_mark_dllexport (tree); 249 extern void arm_mark_dllimport (tree); 250 extern bool arm_change_mode_p (tree); 251 #endif 252 253 extern tree arm_valid_target_attribute_tree (tree, struct gcc_options *, 254 struct gcc_options *); 255 extern void arm_configure_build_target (struct arm_build_target *, 256 struct cl_target_option *, bool); 257 extern void arm_option_reconfigure_globals (void); 258 extern void arm_options_perform_arch_sanity_checks (void); 259 extern void arm_pr_long_calls (struct cpp_reader *); 260 extern void arm_pr_no_long_calls (struct cpp_reader *); 261 extern void arm_pr_long_calls_off (struct cpp_reader *); 262 263 extern const char *arm_mangle_type (const_tree); 264 extern const char *arm_mangle_builtin_type (const_tree); 265 266 extern void arm_order_regs_for_local_alloc (void); 267 268 extern int arm_max_conditional_execute (); 269 270 /* Vectorizer cost model implementation. */ 271 struct cpu_vec_costs { 272 const int scalar_stmt_cost; /* Cost of any scalar operation, excluding 273 load and store. */ 274 const int scalar_load_cost; /* Cost of scalar load. */ 275 const int scalar_store_cost; /* Cost of scalar store. */ 276 const int vec_stmt_cost; /* Cost of any vector operation, excluding 277 load, store, vector-to-scalar and 278 scalar-to-vector operation. */ 279 const int vec_to_scalar_cost; /* Cost of vect-to-scalar operation. */ 280 const int scalar_to_vec_cost; /* Cost of scalar-to-vector operation. */ 281 const int vec_align_load_cost; /* Cost of aligned vector load. */ 282 const int vec_unalign_load_cost; /* Cost of unaligned vector load. */ 283 const int vec_unalign_store_cost; /* Cost of unaligned vector load. */ 284 const int vec_store_cost; /* Cost of vector store. */ 285 const int cond_taken_branch_cost; /* Cost of taken branch for vectorizer 286 cost model. */ 287 const int cond_not_taken_branch_cost;/* Cost of not taken branch for 288 vectorizer cost model. */ 289 }; 290 291 #ifdef RTX_CODE 292 /* This needs to be here because we need RTX_CODE and similar. */ 293 294 struct cpu_cost_table; 295 296 /* Addressing mode operations. Used to index tables in struct 297 addr_mode_cost_table. */ 298 enum arm_addr_mode_op 299 { 300 AMO_DEFAULT, 301 AMO_NO_WB, /* Offset with no writeback. */ 302 AMO_WB, /* Offset with writeback. */ 303 AMO_MAX /* For array size. */ 304 }; 305 306 /* Table of additional costs in units of COSTS_N_INSNS() when using 307 addressing modes for each access type. */ 308 struct addr_mode_cost_table 309 { 310 const int integer[AMO_MAX]; 311 const int fp[AMO_MAX]; 312 const int vector[AMO_MAX]; 313 }; 314 315 /* Dump function ARM_PRINT_TUNE_INFO should be updated whenever this 316 structure is modified. */ 317 318 struct tune_params 319 { 320 const struct cpu_cost_table *insn_extra_cost; 321 const struct addr_mode_cost_table *addr_mode_costs; 322 bool (*sched_adjust_cost) (rtx_insn *, int, rtx_insn *, int *); 323 int (*branch_cost) (bool, bool); 324 /* Vectorizer costs. */ 325 const struct cpu_vec_costs* vec_costs; 326 int constant_limit; 327 /* Maximum number of instructions to conditionalise. */ 328 int max_insns_skipped; 329 /* Maximum number of instructions to inline calls to memset. */ 330 int max_insns_inline_memset; 331 /* Issue rate of the processor. */ 332 unsigned int issue_rate; 333 /* Explicit prefetch data. */ 334 struct 335 { 336 int num_slots; 337 int l1_cache_size; 338 int l1_cache_line_size; 339 } prefetch; 340 enum {PREF_CONST_POOL_FALSE, PREF_CONST_POOL_TRUE} 341 prefer_constant_pool: 1; 342 /* Prefer STRD/LDRD instructions over PUSH/POP/LDM/STM. */ 343 enum {PREF_LDRD_FALSE, PREF_LDRD_TRUE} prefer_ldrd_strd: 1; 344 /* The preference for non short cirtcuit operation when optimizing for 345 performance. The first element covers Thumb state and the second one 346 is for ARM state. */ 347 enum log_op_non_short_circuit {LOG_OP_NON_SHORT_CIRCUIT_FALSE, 348 LOG_OP_NON_SHORT_CIRCUIT_TRUE}; 349 log_op_non_short_circuit logical_op_non_short_circuit_thumb: 1; 350 log_op_non_short_circuit logical_op_non_short_circuit_arm: 1; 351 /* Prefer 32-bit encoding instead of flag-setting 16-bit encoding. */ 352 enum {DISPARAGE_FLAGS_NEITHER, DISPARAGE_FLAGS_PARTIAL, DISPARAGE_FLAGS_ALL} 353 disparage_flag_setting_t16_encodings: 2; 354 /* Prefer to inline string operations like memset by using Neon. */ 355 enum {PREF_NEON_STRINGOPS_FALSE, PREF_NEON_STRINGOPS_TRUE} 356 string_ops_prefer_neon: 1; 357 /* Bitfield encoding the fusible pairs of instructions. Use FUSE_OPS 358 in an initializer if multiple fusion operations are supported on a 359 target. */ 360 enum fuse_ops 361 { 362 FUSE_NOTHING = 0, 363 FUSE_MOVW_MOVT = 1 << 0, 364 FUSE_AES_AESMC = 1 << 1 365 } fusible_ops: 2; 366 /* Depth of scheduling queue to check for L2 autoprefetcher. */ 367 enum {SCHED_AUTOPREF_OFF, SCHED_AUTOPREF_RANK, SCHED_AUTOPREF_FULL} 368 sched_autopref: 2; 369 }; 370 371 /* Smash multiple fusion operations into a type that can be used for an 372 initializer. */ 373 #define FUSE_OPS(x) ((tune_params::fuse_ops) (x)) 374 375 extern const struct tune_params *current_tune; 376 extern int vfp3_const_double_for_fract_bits (rtx); 377 /* return power of two from operand, otherwise 0. */ 378 extern int vfp3_const_double_for_bits (rtx); 379 380 extern void arm_emit_coreregs_64bit_shift (enum rtx_code, rtx, rtx, rtx, rtx, 381 rtx); 382 extern bool arm_fusion_enabled_p (tune_params::fuse_ops); 383 extern bool arm_valid_symbolic_address_p (rtx); 384 extern bool arm_validize_comparison (rtx *, rtx *, rtx *); 385 extern bool arm_expand_vector_compare (rtx, rtx_code, rtx, rtx, bool); 386 #endif /* RTX_CODE */ 387 388 extern bool arm_gen_setmem (rtx *); 389 extern void arm_expand_vcond (rtx *, machine_mode); 390 extern void arm_expand_vec_perm (rtx target, rtx op0, rtx op1, rtx sel); 391 392 extern bool arm_autoinc_modes_ok_p (machine_mode, enum arm_auto_incmodes); 393 394 extern void arm_emit_eabi_attribute (const char *, int, int); 395 396 extern void arm_reset_previous_fndecl (void); 397 extern void save_restore_target_globals (tree); 398 399 /* Defined in gcc/common/config/arm-common.cc. */ 400 extern const char *arm_rewrite_selected_cpu (const char *name); 401 402 /* Defined in gcc/common/config/arm-c.cc. */ 403 extern void arm_lang_object_attributes_init (void); 404 extern void arm_register_target_pragmas (void); 405 extern void arm_cpu_cpp_builtins (struct cpp_reader *); 406 407 extern bool arm_is_constant_pool_ref (rtx); 408 409 /* The bits in this mask specify which instruction scheduling options should 410 be used. */ 411 extern unsigned int tune_flags; 412 413 /* Nonzero if this chip supports the ARM Architecture 4 extensions. */ 414 extern int arm_arch4; 415 416 /* Nonzero if this chip supports the ARM Architecture 4t extensions. */ 417 extern int arm_arch4t; 418 419 /* Nonzero if this chip supports the ARM Architecture 5t extensions. */ 420 extern int arm_arch5t; 421 422 /* Nonzero if this chip supports the ARM Architecture 5te extensions. */ 423 extern int arm_arch5te; 424 425 /* Nonzero if this chip supports the ARM Architecture 6 extensions. */ 426 extern int arm_arch6; 427 428 /* Nonzero if this chip supports the ARM 6K extensions. */ 429 extern int arm_arch6k; 430 431 /* Nonzero if this chip supports the ARM 6KZ extensions. */ 432 extern int arm_arch6kz; 433 434 /* Nonzero if instructions present in ARMv6-M can be used. */ 435 extern int arm_arch6m; 436 437 /* Nonzero if this chip supports the ARM 7 extensions. */ 438 extern int arm_arch7; 439 440 /* Nonzero if this chip supports the Large Physical Address Extension. */ 441 extern int arm_arch_lpae; 442 443 /* Nonzero if instructions not present in the 'M' profile can be used. */ 444 extern int arm_arch_notm; 445 446 /* Nonzero if instructions present in ARMv7E-M can be used. */ 447 extern int arm_arch7em; 448 449 /* Nonzero if instructions present in ARMv8 can be used. */ 450 extern int arm_arch8; 451 452 /* Nonzero if this chip can benefit from load scheduling. */ 453 extern int arm_ld_sched; 454 455 /* Nonzero if this chip is a StrongARM. */ 456 extern int arm_tune_strongarm; 457 458 /* Nonzero if this chip supports Intel Wireless MMX technology. */ 459 extern int arm_arch_iwmmxt; 460 461 /* Nonzero if this chip supports Intel Wireless MMX2 technology. */ 462 extern int arm_arch_iwmmxt2; 463 464 /* Nonzero if this chip is an XScale. */ 465 extern int arm_arch_xscale; 466 467 /* Nonzero if tuning for XScale */ 468 extern int arm_tune_xscale; 469 470 /* Nonzero if we want to tune for stores that access the write-buffer. 471 This typically means an ARM6 or ARM7 with MMU or MPU. */ 472 extern int arm_tune_wbuf; 473 474 /* Nonzero if tuning for Cortex-A9. */ 475 extern int arm_tune_cortex_a9; 476 477 /* Nonzero if we should define __THUMB_INTERWORK__ in the 478 preprocessor. 479 XXX This is a bit of a hack, it's intended to help work around 480 problems in GLD which doesn't understand that armv5t code is 481 interworking clean. */ 482 extern int arm_cpp_interwork; 483 484 /* Nonzero if chip supports Thumb 1. */ 485 extern int arm_arch_thumb1; 486 487 /* Nonzero if chip supports Thumb 2. */ 488 extern int arm_arch_thumb2; 489 490 /* Nonzero if chip supports integer division instruction. */ 491 extern int arm_arch_arm_hwdiv; 492 extern int arm_arch_thumb_hwdiv; 493 494 /* Nonzero if chip disallows volatile memory access in IT block. */ 495 extern int arm_arch_no_volatile_ce; 496 497 /* Structure defining the current overall architectural target and tuning. */ 498 struct arm_build_target 499 { 500 /* Name of the target CPU, if known, or NULL if the target CPU was not 501 specified by the user (and inferred from the -march option). */ 502 const char *core_name; 503 /* Name of the target ARCH. NULL if there is a selected CPU. */ 504 const char *arch_name; 505 /* Preprocessor substring (never NULL). */ 506 const char *arch_pp_name; 507 /* The base architecture value. */ 508 enum base_architecture base_arch; 509 /* The profile letter for the architecture, upper case by convention. */ 510 char profile; 511 /* Bitmap encapsulating the isa_bits for the target environment. */ 512 sbitmap isa; 513 /* Flags used for tuning. Long term, these move into tune_params. */ 514 unsigned int tune_flags; 515 /* Tables with more detailed tuning information. */ 516 const struct tune_params *tune; 517 /* CPU identifier for the tuning target. */ 518 enum processor_type tune_core; 519 }; 520 521 extern struct arm_build_target arm_active_target; 522 523 /* Table entry for a CPU alias. */ 524 struct cpu_alias 525 { 526 /* The alias name. */ 527 const char *const name; 528 /* True if the name should be displayed in help text listing cpu names. */ 529 bool visible; 530 }; 531 532 /* Table entry for an architectural feature extension. */ 533 struct cpu_arch_extension 534 { 535 /* Feature name. */ 536 const char *const name; 537 /* True if the option is negative (removes extensions). */ 538 bool remove; 539 /* True if the option is an alias for another option with identical effect; 540 the option will be ignored for canonicalization. */ 541 bool alias; 542 /* The modifier bits. */ 543 const enum isa_feature isa_bits[isa_num_bits]; 544 }; 545 546 /* Common elements of both CPU and architectural options. */ 547 struct cpu_arch_option 548 { 549 /* Name for this option. */ 550 const char *name; 551 /* List of feature extensions permitted. */ 552 const struct cpu_arch_extension *extensions; 553 /* Standard feature bits. */ 554 enum isa_feature isa_bits[isa_num_bits]; 555 }; 556 557 /* Table entry for an architecture entry. */ 558 struct arch_option 559 { 560 /* Common option fields. */ 561 cpu_arch_option common; 562 /* Short string for this architecture. */ 563 const char *arch; 564 /* Base architecture, from which this specific architecture is derived. */ 565 enum base_architecture base_arch; 566 /* The profile letter for the architecture, upper case by convention. */ 567 const char profile; 568 /* Default tune target (in the absence of any more specific data). */ 569 enum processor_type tune_id; 570 }; 571 572 /* Table entry for a CPU entry. */ 573 struct cpu_option 574 { 575 /* Common option fields. */ 576 cpu_arch_option common; 577 /* List of aliases for this CPU. */ 578 const struct cpu_alias *aliases; 579 /* Architecture upon which this CPU is based. */ 580 enum arch_type arch; 581 }; 582 583 extern const arch_option all_architectures[]; 584 extern const cpu_option all_cores[]; 585 586 const cpu_option *arm_parse_cpu_option_name (const cpu_option *, const char *, 587 const char *, bool = true); 588 const arch_option *arm_parse_arch_option_name (const arch_option *, 589 const char *, const char *, bool = true); 590 void arm_parse_option_features (sbitmap, const cpu_arch_option *, 591 const char *); 592 593 void arm_initialize_isa (sbitmap, const enum isa_feature *); 594 595 const char * arm_gen_far_branch (rtx *, int, const char * , const char *); 596 597 bool arm_mve_immediate_check(rtx, machine_mode, bool); 598 #endif /* ! GCC_ARM_PROTOS_H */ 599