1 /* Save and restore call-clobbered registers which are live across a call.
2    Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998,
3    1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
4 
5 This file is part of GCC.
6 
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
11 
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
15 for more details.
16 
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING.  If not, write to the Free
19 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
20 02110-1301, USA.  */
21 
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "rtl.h"
27 #include "regs.h"
28 #include "insn-config.h"
29 #include "flags.h"
30 #include "hard-reg-set.h"
31 #include "recog.h"
32 #include "basic-block.h"
33 #include "reload.h"
34 #include "function.h"
35 #include "expr.h"
36 #include "toplev.h"
37 #include "tm_p.h"
38 #include "addresses.h"
39 
40 #ifndef MAX_MOVE_MAX
41 #define MAX_MOVE_MAX MOVE_MAX
42 #endif
43 
44 #ifndef MIN_UNITS_PER_WORD
45 #define MIN_UNITS_PER_WORD UNITS_PER_WORD
46 #endif
47 
48 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
49 
50 /* Modes for each hard register that we can save.  The smallest mode is wide
51    enough to save the entire contents of the register.  When saving the
52    register because it is live we first try to save in multi-register modes.
53    If that is not possible the save is done one register at a time.  */
54 
55 static enum machine_mode
56   regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
57 
58 /* For each hard register, a place on the stack where it can be saved,
59    if needed.  */
60 
61 static rtx
62   regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
63 
64 /* We will only make a register eligible for caller-save if it can be
65    saved in its widest mode with a simple SET insn as long as the memory
66    address is valid.  We record the INSN_CODE is those insns here since
67    when we emit them, the addresses might not be valid, so they might not
68    be recognized.  */
69 
70 static int
71   reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
72 static int
73   reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
74 
75 /* Set of hard regs currently residing in save area (during insn scan).  */
76 
77 static HARD_REG_SET hard_regs_saved;
78 
79 /* Number of registers currently in hard_regs_saved.  */
80 
81 static int n_regs_saved;
82 
83 /* Computed by mark_referenced_regs, all regs referenced in a given
84    insn.  */
85 static HARD_REG_SET referenced_regs;
86 
87 
88 static void mark_set_regs (rtx, rtx, void *);
89 static void mark_referenced_regs (rtx);
90 static int insert_save (struct insn_chain *, int, int, HARD_REG_SET *,
91 			enum machine_mode *);
92 static int insert_restore (struct insn_chain *, int, int, int,
93 			   enum machine_mode *);
94 static struct insn_chain *insert_one_insn (struct insn_chain *, int, int,
95 					   rtx);
96 static void add_stored_regs (rtx, rtx, void *);
97 
98 /* Initialize for caller-save.
99 
100    Look at all the hard registers that are used by a call and for which
101    regclass.c has not already excluded from being used across a call.
102 
103    Ensure that we can find a mode to save the register and that there is a
104    simple insn to save and restore the register.  This latter check avoids
105    problems that would occur if we tried to save the MQ register of some
106    machines directly into memory.  */
107 
108 void
init_caller_save(void)109 init_caller_save (void)
110 {
111   rtx addr_reg;
112   int offset;
113   rtx address;
114   int i, j;
115   enum machine_mode mode;
116   rtx savepat, restpat;
117   rtx test_reg, test_mem;
118   rtx saveinsn, restinsn;
119 
120   /* First find all the registers that we need to deal with and all
121      the modes that they can have.  If we can't find a mode to use,
122      we can't have the register live over calls.  */
123 
124   for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
125     {
126       if (call_used_regs[i] && ! call_fixed_regs[i])
127 	{
128 	  for (j = 1; j <= MOVE_MAX_WORDS; j++)
129 	    {
130 	      regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j,
131 								   VOIDmode);
132 	      if (regno_save_mode[i][j] == VOIDmode && j == 1)
133 		{
134 		  call_fixed_regs[i] = 1;
135 		  SET_HARD_REG_BIT (call_fixed_reg_set, i);
136 		}
137 	    }
138 	}
139       else
140 	regno_save_mode[i][1] = VOIDmode;
141     }
142 
143   /* The following code tries to approximate the conditions under which
144      we can easily save and restore a register without scratch registers or
145      other complexities.  It will usually work, except under conditions where
146      the validity of an insn operand is dependent on the address offset.
147      No such cases are currently known.
148 
149      We first find a typical offset from some BASE_REG_CLASS register.
150      This address is chosen by finding the first register in the class
151      and by finding the smallest power of two that is a valid offset from
152      that register in every mode we will use to save registers.  */
153 
154   for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
155     if (TEST_HARD_REG_BIT
156 	(reg_class_contents
157 	 [(int) base_reg_class (regno_save_mode [i][1], PLUS, CONST_INT)], i))
158       break;
159 
160   gcc_assert (i < FIRST_PSEUDO_REGISTER);
161 
162   addr_reg = gen_rtx_REG (Pmode, i);
163 
164   for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
165     {
166       address = gen_rtx_PLUS (Pmode, addr_reg, GEN_INT (offset));
167 
168       for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
169 	if (regno_save_mode[i][1] != VOIDmode
170 	  && ! strict_memory_address_p (regno_save_mode[i][1], address))
171 	  break;
172 
173       if (i == FIRST_PSEUDO_REGISTER)
174 	break;
175     }
176 
177   /* If we didn't find a valid address, we must use register indirect.  */
178   if (offset == 0)
179     address = addr_reg;
180 
181   /* Next we try to form an insn to save and restore the register.  We
182      see if such an insn is recognized and meets its constraints.
183 
184      To avoid lots of unnecessary RTL allocation, we construct all the RTL
185      once, then modify the memory and register operands in-place.  */
186 
187   test_reg = gen_rtx_REG (VOIDmode, 0);
188   test_mem = gen_rtx_MEM (VOIDmode, address);
189   savepat = gen_rtx_SET (VOIDmode, test_mem, test_reg);
190   restpat = gen_rtx_SET (VOIDmode, test_reg, test_mem);
191 
192   saveinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, savepat, -1, 0, 0);
193   restinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, restpat, -1, 0, 0);
194 
195   for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
196     for (mode = 0 ; mode < MAX_MACHINE_MODE; mode++)
197       if (HARD_REGNO_MODE_OK (i, mode))
198 	{
199 	  int ok;
200 
201 	  /* Update the register number and modes of the register
202 	     and memory operand.  */
203 	  REGNO (test_reg) = i;
204 	  PUT_MODE (test_reg, mode);
205 	  PUT_MODE (test_mem, mode);
206 
207 	  /* Force re-recognition of the modified insns.  */
208 	  INSN_CODE (saveinsn) = -1;
209 	  INSN_CODE (restinsn) = -1;
210 
211 	  reg_save_code[i][mode] = recog_memoized (saveinsn);
212 	  reg_restore_code[i][mode] = recog_memoized (restinsn);
213 
214 	  /* Now extract both insns and see if we can meet their
215 	     constraints.  */
216 	  ok = (reg_save_code[i][mode] != -1
217 		&& reg_restore_code[i][mode] != -1);
218 	  if (ok)
219 	    {
220 	      extract_insn (saveinsn);
221 	      ok = constrain_operands (1);
222 	      extract_insn (restinsn);
223 	      ok &= constrain_operands (1);
224 	    }
225 
226 	  if (! ok)
227 	    {
228 	      reg_save_code[i][mode] = -1;
229 	      reg_restore_code[i][mode] = -1;
230 	    }
231 	}
232       else
233 	{
234 	  reg_save_code[i][mode] = -1;
235 	  reg_restore_code[i][mode] = -1;
236 	}
237 
238   for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
239     for (j = 1; j <= MOVE_MAX_WORDS; j++)
240       if (reg_save_code [i][regno_save_mode[i][j]] == -1)
241 	{
242 	  regno_save_mode[i][j] = VOIDmode;
243 	  if (j == 1)
244 	    {
245 	      call_fixed_regs[i] = 1;
246 	      SET_HARD_REG_BIT (call_fixed_reg_set, i);
247 	    }
248 	}
249 }
250 
251 /* Initialize save areas by showing that we haven't allocated any yet.  */
252 
253 void
init_save_areas(void)254 init_save_areas (void)
255 {
256   int i, j;
257 
258   for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
259     for (j = 1; j <= MOVE_MAX_WORDS; j++)
260       regno_save_mem[i][j] = 0;
261 }
262 
263 /* Allocate save areas for any hard registers that might need saving.
264    We take a conservative approach here and look for call-clobbered hard
265    registers that are assigned to pseudos that cross calls.  This may
266    overestimate slightly (especially if some of these registers are later
267    used as spill registers), but it should not be significant.
268 
269    Future work:
270 
271      In the fallback case we should iterate backwards across all possible
272      modes for the save, choosing the largest available one instead of
273      falling back to the smallest mode immediately.  (eg TF -> DF -> SF).
274 
275      We do not try to use "move multiple" instructions that exist
276      on some machines (such as the 68k moveml).  It could be a win to try
277      and use them when possible.  The hard part is doing it in a way that is
278      machine independent since they might be saving non-consecutive
279      registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
280 
281 void
setup_save_areas(void)282 setup_save_areas (void)
283 {
284   int i, j, k;
285   unsigned int r;
286   HARD_REG_SET hard_regs_used;
287 
288   /* Allocate space in the save area for the largest multi-register
289      pseudos first, then work backwards to single register
290      pseudos.  */
291 
292   /* Find and record all call-used hard-registers in this function.  */
293   CLEAR_HARD_REG_SET (hard_regs_used);
294   for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
295     if (reg_renumber[i] >= 0 && REG_N_CALLS_CROSSED (i) > 0)
296       {
297 	unsigned int regno = reg_renumber[i];
298 	unsigned int endregno
299 	  = regno + hard_regno_nregs[regno][GET_MODE (regno_reg_rtx[i])];
300 
301 	for (r = regno; r < endregno; r++)
302 	  if (call_used_regs[r])
303 	    SET_HARD_REG_BIT (hard_regs_used, r);
304       }
305 
306   /* Now run through all the call-used hard-registers and allocate
307      space for them in the caller-save area.  Try to allocate space
308      in a manner which allows multi-register saves/restores to be done.  */
309 
310   for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
311     for (j = MOVE_MAX_WORDS; j > 0; j--)
312       {
313 	int do_save = 1;
314 
315 	/* If no mode exists for this size, try another.  Also break out
316 	   if we have already saved this hard register.  */
317 	if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0)
318 	  continue;
319 
320 	/* See if any register in this group has been saved.  */
321 	for (k = 0; k < j; k++)
322 	  if (regno_save_mem[i + k][1])
323 	    {
324 	      do_save = 0;
325 	      break;
326 	    }
327 	if (! do_save)
328 	  continue;
329 
330 	for (k = 0; k < j; k++)
331 	  if (! TEST_HARD_REG_BIT (hard_regs_used, i + k))
332 	    {
333 	      do_save = 0;
334 	      break;
335 	    }
336 	if (! do_save)
337 	  continue;
338 
339 	/* We have found an acceptable mode to store in.  */
340 	regno_save_mem[i][j]
341 	  = assign_stack_local (regno_save_mode[i][j],
342 				GET_MODE_SIZE (regno_save_mode[i][j]), 0);
343 
344 	/* Setup single word save area just in case...  */
345 	for (k = 0; k < j; k++)
346 	  /* This should not depend on WORDS_BIG_ENDIAN.
347 	     The order of words in regs is the same as in memory.  */
348 	  regno_save_mem[i + k][1]
349 	    = adjust_address_nv (regno_save_mem[i][j],
350 				 regno_save_mode[i + k][1],
351 				 k * UNITS_PER_WORD);
352       }
353 
354   /* Now loop again and set the alias set of any save areas we made to
355      the alias set used to represent frame objects.  */
356   for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
357     for (j = MOVE_MAX_WORDS; j > 0; j--)
358       if (regno_save_mem[i][j] != 0)
359 	set_mem_alias_set (regno_save_mem[i][j], get_frame_alias_set ());
360 }
361 
362 /* Find the places where hard regs are live across calls and save them.  */
363 
364 void
save_call_clobbered_regs(void)365 save_call_clobbered_regs (void)
366 {
367   struct insn_chain *chain, *next;
368   enum machine_mode save_mode [FIRST_PSEUDO_REGISTER];
369 
370   /* Computed in mark_set_regs, holds all registers set by the current
371      instruction.  */
372   HARD_REG_SET this_insn_sets;
373 
374   CLEAR_HARD_REG_SET (hard_regs_saved);
375   n_regs_saved = 0;
376 
377   for (chain = reload_insn_chain; chain != 0; chain = next)
378     {
379       rtx insn = chain->insn;
380       enum rtx_code code = GET_CODE (insn);
381 
382       next = chain->next;
383 
384       gcc_assert (!chain->is_caller_save_insn);
385 
386       if (INSN_P (insn))
387 	{
388 	  /* If some registers have been saved, see if INSN references
389 	     any of them.  We must restore them before the insn if so.  */
390 
391 	  if (n_regs_saved)
392 	    {
393 	      int regno;
394 
395 	      if (code == JUMP_INSN)
396 		/* Restore all registers if this is a JUMP_INSN.  */
397 		COPY_HARD_REG_SET (referenced_regs, hard_regs_saved);
398 	      else
399 		{
400 		  CLEAR_HARD_REG_SET (referenced_regs);
401 		  mark_referenced_regs (PATTERN (insn));
402 		  AND_HARD_REG_SET (referenced_regs, hard_regs_saved);
403 		}
404 
405 	      for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
406 		if (TEST_HARD_REG_BIT (referenced_regs, regno))
407 		  regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS, save_mode);
408 	    }
409 
410 	  if (code == CALL_INSN && ! find_reg_note (insn, REG_NORETURN, NULL))
411 	    {
412 	      unsigned regno;
413 	      HARD_REG_SET hard_regs_to_save;
414 	      reg_set_iterator rsi;
415 
416 	      /* Use the register life information in CHAIN to compute which
417 		 regs are live during the call.  */
418 	      REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
419 				       &chain->live_throughout);
420 	      /* Save hard registers always in the widest mode available.  */
421 	      for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
422 		if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
423 		  save_mode [regno] = regno_save_mode [regno][1];
424 		else
425 		  save_mode [regno] = VOIDmode;
426 
427 	      /* Look through all live pseudos, mark their hard registers
428 		 and choose proper mode for saving.  */
429 	      EXECUTE_IF_SET_IN_REG_SET
430 		(&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
431 		{
432 		  int r = reg_renumber[regno];
433 		  int nregs;
434 		  enum machine_mode mode;
435 
436 		  gcc_assert (r >= 0);
437 		  nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
438 		  mode = HARD_REGNO_CALLER_SAVE_MODE
439 		    (r, nregs, PSEUDO_REGNO_MODE (regno));
440 		  if (GET_MODE_BITSIZE (mode)
441 		      > GET_MODE_BITSIZE (save_mode[r]))
442 		    save_mode[r] = mode;
443 		  while (nregs-- > 0)
444 		    SET_HARD_REG_BIT (hard_regs_to_save, r + nregs);
445 		}
446 
447 	      /* Record all registers set in this call insn.  These don't need
448 		 to be saved.  N.B. the call insn might set a subreg of a
449 		 multi-hard-reg pseudo; then the pseudo is considered live
450 		 during the call, but the subreg that is set isn't.  */
451 	      CLEAR_HARD_REG_SET (this_insn_sets);
452 	      note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
453 	      /* Sibcalls are considered to set the return value,
454 		 compare flow.c:propagate_one_insn.  */
455 	      if (SIBLING_CALL_P (insn) && current_function_return_rtx)
456 		mark_set_regs (current_function_return_rtx, NULL_RTX,
457 			       &this_insn_sets);
458 
459 	      /* Compute which hard regs must be saved before this call.  */
460 	      AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set);
461 	      AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets);
462 	      AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
463 	      AND_HARD_REG_SET (hard_regs_to_save, call_used_reg_set);
464 
465 	      for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
466 		if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
467 		  regno += insert_save (chain, 1, regno, &hard_regs_to_save, save_mode);
468 
469 	      /* Must recompute n_regs_saved.  */
470 	      n_regs_saved = 0;
471 	      for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
472 		if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
473 		  n_regs_saved++;
474 	    }
475 	}
476 
477       if (chain->next == 0 || chain->next->block > chain->block)
478 	{
479 	  int regno;
480 	  /* At the end of the basic block, we must restore any registers that
481 	     remain saved.  If the last insn in the block is a JUMP_INSN, put
482 	     the restore before the insn, otherwise, put it after the insn.  */
483 
484 	  if (n_regs_saved)
485 	    for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
486 	      if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
487 		regno += insert_restore (chain, JUMP_P (insn),
488 					 regno, MOVE_MAX_WORDS, save_mode);
489 	}
490     }
491 }
492 
493 /* Here from note_stores, or directly from save_call_clobbered_regs, when
494    an insn stores a value in a register.
495    Set the proper bit or bits in this_insn_sets.  All pseudos that have
496    been assigned hard regs have had their register number changed already,
497    so we can ignore pseudos.  */
498 static void
mark_set_regs(rtx reg,rtx setter ATTRIBUTE_UNUSED,void * data)499 mark_set_regs (rtx reg, rtx setter ATTRIBUTE_UNUSED, void *data)
500 {
501   int regno, endregno, i;
502   enum machine_mode mode = GET_MODE (reg);
503   HARD_REG_SET *this_insn_sets = data;
504 
505   if (GET_CODE (reg) == SUBREG)
506     {
507       rtx inner = SUBREG_REG (reg);
508       if (!REG_P (inner) || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
509 	return;
510       regno = subreg_regno (reg);
511     }
512   else if (REG_P (reg)
513 	   && REGNO (reg) < FIRST_PSEUDO_REGISTER)
514     regno = REGNO (reg);
515   else
516     return;
517 
518   endregno = regno + hard_regno_nregs[regno][mode];
519 
520   for (i = regno; i < endregno; i++)
521     SET_HARD_REG_BIT (*this_insn_sets, i);
522 }
523 
524 /* Here from note_stores when an insn stores a value in a register.
525    Set the proper bit or bits in the passed regset.  All pseudos that have
526    been assigned hard regs have had their register number changed already,
527    so we can ignore pseudos.  */
528 static void
add_stored_regs(rtx reg,rtx setter,void * data)529 add_stored_regs (rtx reg, rtx setter, void *data)
530 {
531   int regno, endregno, i;
532   enum machine_mode mode = GET_MODE (reg);
533   int offset = 0;
534 
535   if (GET_CODE (setter) == CLOBBER)
536     return;
537 
538   if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
539     {
540       offset = subreg_regno_offset (REGNO (SUBREG_REG (reg)),
541 				    GET_MODE (SUBREG_REG (reg)),
542 				    SUBREG_BYTE (reg),
543 				    GET_MODE (reg));
544       reg = SUBREG_REG (reg);
545     }
546 
547   if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
548     return;
549 
550   regno = REGNO (reg) + offset;
551   endregno = regno + hard_regno_nregs[regno][mode];
552 
553   for (i = regno; i < endregno; i++)
554     SET_REGNO_REG_SET ((regset) data, i);
555 }
556 
557 /* Walk X and record all referenced registers in REFERENCED_REGS.  */
558 static void
mark_referenced_regs(rtx x)559 mark_referenced_regs (rtx x)
560 {
561   enum rtx_code code = GET_CODE (x);
562   const char *fmt;
563   int i, j;
564 
565   if (code == SET)
566     mark_referenced_regs (SET_SRC (x));
567   if (code == SET || code == CLOBBER)
568     {
569       x = SET_DEST (x);
570       code = GET_CODE (x);
571       if ((code == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
572 	  || code == PC || code == CC0
573 	  || (code == SUBREG && REG_P (SUBREG_REG (x))
574 	      && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER
575 	      /* If we're setting only part of a multi-word register,
576 		 we shall mark it as referenced, because the words
577 		 that are not being set should be restored.  */
578 	      && ((GET_MODE_SIZE (GET_MODE (x))
579 		   >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
580 		  || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
581 		      <= UNITS_PER_WORD))))
582 	return;
583     }
584   if (code == MEM || code == SUBREG)
585     {
586       x = XEXP (x, 0);
587       code = GET_CODE (x);
588     }
589 
590   if (code == REG)
591     {
592       int regno = REGNO (x);
593       int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno
594 		       : reg_renumber[regno]);
595 
596       if (hardregno >= 0)
597 	{
598 	  int nregs = hard_regno_nregs[hardregno][GET_MODE (x)];
599 	  while (nregs-- > 0)
600 	    SET_HARD_REG_BIT (referenced_regs, hardregno + nregs);
601 	}
602       /* If this is a pseudo that did not get a hard register, scan its
603 	 memory location, since it might involve the use of another
604 	 register, which might be saved.  */
605       else if (reg_equiv_mem[regno] != 0)
606 	mark_referenced_regs (XEXP (reg_equiv_mem[regno], 0));
607       else if (reg_equiv_address[regno] != 0)
608 	mark_referenced_regs (reg_equiv_address[regno]);
609       return;
610     }
611 
612   fmt = GET_RTX_FORMAT (code);
613   for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
614     {
615       if (fmt[i] == 'e')
616 	mark_referenced_regs (XEXP (x, i));
617       else if (fmt[i] == 'E')
618 	for (j = XVECLEN (x, i) - 1; j >= 0; j--)
619 	  mark_referenced_regs (XVECEXP (x, i, j));
620     }
621 }
622 
623 /* Insert a sequence of insns to restore.  Place these insns in front of
624    CHAIN if BEFORE_P is nonzero, behind the insn otherwise.  MAXRESTORE is
625    the maximum number of registers which should be restored during this call.
626    It should never be less than 1 since we only work with entire registers.
627 
628    Note that we have verified in init_caller_save that we can do this
629    with a simple SET, so use it.  Set INSN_CODE to what we save there
630    since the address might not be valid so the insn might not be recognized.
631    These insns will be reloaded and have register elimination done by
632    find_reload, so we need not worry about that here.
633 
634    Return the extra number of registers saved.  */
635 
636 static int
insert_restore(struct insn_chain * chain,int before_p,int regno,int maxrestore,enum machine_mode * save_mode)637 insert_restore (struct insn_chain *chain, int before_p, int regno,
638 		int maxrestore, enum machine_mode *save_mode)
639 {
640   int i, k;
641   rtx pat = NULL_RTX;
642   int code;
643   unsigned int numregs = 0;
644   struct insn_chain *new;
645   rtx mem;
646 
647   /* A common failure mode if register status is not correct in the
648      RTL is for this routine to be called with a REGNO we didn't
649      expect to save.  That will cause us to write an insn with a (nil)
650      SET_DEST or SET_SRC.  Instead of doing so and causing a crash
651      later, check for this common case here instead.  This will remove
652      one step in debugging such problems.  */
653   gcc_assert (regno_save_mem[regno][1]);
654 
655   /* Get the pattern to emit and update our status.
656 
657      See if we can restore `maxrestore' registers at once.  Work
658      backwards to the single register case.  */
659   for (i = maxrestore; i > 0; i--)
660     {
661       int j;
662       int ok = 1;
663 
664       if (regno_save_mem[regno][i] == 0)
665 	continue;
666 
667       for (j = 0; j < i; j++)
668 	if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j))
669 	  {
670 	    ok = 0;
671 	    break;
672 	  }
673       /* Must do this one restore at a time.  */
674       if (! ok)
675 	continue;
676 
677       numregs = i;
678       break;
679     }
680 
681   mem = regno_save_mem [regno][numregs];
682   if (save_mode [regno] != VOIDmode
683       && save_mode [regno] != GET_MODE (mem)
684       && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]])
685     mem = adjust_address (mem, save_mode[regno], 0);
686   else
687     mem = copy_rtx (mem);
688   pat = gen_rtx_SET (VOIDmode,
689 		     gen_rtx_REG (GET_MODE (mem),
690 				  regno), mem);
691   code = reg_restore_code[regno][GET_MODE (mem)];
692   new = insert_one_insn (chain, before_p, code, pat);
693 
694   /* Clear status for all registers we restored.  */
695   for (k = 0; k < i; k++)
696     {
697       CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k);
698       SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
699       n_regs_saved--;
700     }
701 
702   /* Tell our callers how many extra registers we saved/restored.  */
703   return numregs - 1;
704 }
705 
706 /* Like insert_restore above, but save registers instead.  */
707 
708 static int
insert_save(struct insn_chain * chain,int before_p,int regno,HARD_REG_SET (* to_save),enum machine_mode * save_mode)709 insert_save (struct insn_chain *chain, int before_p, int regno,
710 	     HARD_REG_SET (*to_save), enum machine_mode *save_mode)
711 {
712   int i;
713   unsigned int k;
714   rtx pat = NULL_RTX;
715   int code;
716   unsigned int numregs = 0;
717   struct insn_chain *new;
718   rtx mem;
719 
720   /* A common failure mode if register status is not correct in the
721      RTL is for this routine to be called with a REGNO we didn't
722      expect to save.  That will cause us to write an insn with a (nil)
723      SET_DEST or SET_SRC.  Instead of doing so and causing a crash
724      later, check for this common case here.  This will remove one
725      step in debugging such problems.  */
726   gcc_assert (regno_save_mem[regno][1]);
727 
728   /* Get the pattern to emit and update our status.
729 
730      See if we can save several registers with a single instruction.
731      Work backwards to the single register case.  */
732   for (i = MOVE_MAX_WORDS; i > 0; i--)
733     {
734       int j;
735       int ok = 1;
736       if (regno_save_mem[regno][i] == 0)
737 	continue;
738 
739       for (j = 0; j < i; j++)
740 	if (! TEST_HARD_REG_BIT (*to_save, regno + j))
741 	  {
742 	    ok = 0;
743 	    break;
744 	  }
745       /* Must do this one save at a time.  */
746       if (! ok)
747 	continue;
748 
749       numregs = i;
750       break;
751     }
752 
753   mem = regno_save_mem [regno][numregs];
754   if (save_mode [regno] != VOIDmode
755       && save_mode [regno] != GET_MODE (mem)
756       && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]])
757     mem = adjust_address (mem, save_mode[regno], 0);
758   else
759     mem = copy_rtx (mem);
760   pat = gen_rtx_SET (VOIDmode, mem,
761 		     gen_rtx_REG (GET_MODE (mem),
762 				  regno));
763   code = reg_save_code[regno][GET_MODE (mem)];
764   new = insert_one_insn (chain, before_p, code, pat);
765 
766   /* Set hard_regs_saved and dead_or_set for all the registers we saved.  */
767   for (k = 0; k < numregs; k++)
768     {
769       SET_HARD_REG_BIT (hard_regs_saved, regno + k);
770       SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
771       n_regs_saved++;
772     }
773 
774   /* Tell our callers how many extra registers we saved/restored.  */
775   return numregs - 1;
776 }
777 
778 /* Emit a new caller-save insn and set the code.  */
779 static struct insn_chain *
insert_one_insn(struct insn_chain * chain,int before_p,int code,rtx pat)780 insert_one_insn (struct insn_chain *chain, int before_p, int code, rtx pat)
781 {
782   rtx insn = chain->insn;
783   struct insn_chain *new;
784 
785 #ifdef HAVE_cc0
786   /* If INSN references CC0, put our insns in front of the insn that sets
787      CC0.  This is always safe, since the only way we could be passed an
788      insn that references CC0 is for a restore, and doing a restore earlier
789      isn't a problem.  We do, however, assume here that CALL_INSNs don't
790      reference CC0.  Guard against non-INSN's like CODE_LABEL.  */
791 
792   if ((NONJUMP_INSN_P (insn) || JUMP_P (insn))
793       && before_p
794       && reg_referenced_p (cc0_rtx, PATTERN (insn)))
795     chain = chain->prev, insn = chain->insn;
796 #endif
797 
798   new = new_insn_chain ();
799   if (before_p)
800     {
801       rtx link;
802 
803       new->prev = chain->prev;
804       if (new->prev != 0)
805 	new->prev->next = new;
806       else
807 	reload_insn_chain = new;
808 
809       chain->prev = new;
810       new->next = chain;
811       new->insn = emit_insn_before (pat, insn);
812       /* ??? It would be nice if we could exclude the already / still saved
813 	 registers from the live sets.  */
814       COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
815       /* Registers that die in CHAIN->INSN still live in the new insn.  */
816       for (link = REG_NOTES (chain->insn); link; link = XEXP (link, 1))
817 	{
818 	  if (REG_NOTE_KIND (link) == REG_DEAD)
819 	    {
820 	      rtx reg = XEXP (link, 0);
821 	      int regno, i;
822 
823 	      gcc_assert (REG_P (reg));
824 	      regno = REGNO (reg);
825 	      if (regno >= FIRST_PSEUDO_REGISTER)
826 		regno = reg_renumber[regno];
827 	      if (regno < 0)
828 		continue;
829 	      for (i = hard_regno_nregs[regno][GET_MODE (reg)] - 1;
830 		   i >= 0; i--)
831 		SET_REGNO_REG_SET (&new->live_throughout, regno + i);
832 	    }
833 	}
834       CLEAR_REG_SET (&new->dead_or_set);
835       if (chain->insn == BB_HEAD (BASIC_BLOCK (chain->block)))
836 	BB_HEAD (BASIC_BLOCK (chain->block)) = new->insn;
837     }
838   else
839     {
840       new->next = chain->next;
841       if (new->next != 0)
842 	new->next->prev = new;
843       chain->next = new;
844       new->prev = chain;
845       new->insn = emit_insn_after (pat, insn);
846       /* ??? It would be nice if we could exclude the already / still saved
847 	 registers from the live sets, and observe REG_UNUSED notes.  */
848       COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
849       /* Registers that are set in CHAIN->INSN live in the new insn.
850 	 (Unless there is a REG_UNUSED note for them, but we don't
851 	  look for them here.) */
852       note_stores (PATTERN (chain->insn), add_stored_regs,
853 		   &new->live_throughout);
854       CLEAR_REG_SET (&new->dead_or_set);
855       if (chain->insn == BB_END (BASIC_BLOCK (chain->block)))
856 	BB_END (BASIC_BLOCK (chain->block)) = new->insn;
857     }
858   new->block = chain->block;
859   new->is_caller_save_insn = 1;
860 
861   INSN_CODE (new->insn) = code;
862   return new;
863 }
864